| Message ID | 20241129141419.2142833-1-andre.simoesdiasvieira@arm.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v2,1/3] arm, mve: Fix scan-assembler for test7 in dlstp-compile-asm-2.c | expand |
On 11/29/24 15:14, Andre Vieira wrote: > > After the changes to the vctp intrinsic codegen changed slightly, where we now > unfortunately seem to be generating unneeded moves and extends of the mask. > These are however not incorrect and we don't have a fix for the unneeded > codegen right now, so changing the testcase to accept them so we can catch > other changes if they occur. > > gcc/testsuite/ChangeLog: > > PR target/117814 > * gcc.target/arm/mve/dlstp-compile-asm-2.c (test7): Add an optional > vmsr to the check-function-bodies. This is OK, thanks. > --- > gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c | 5 +++++ > 1 file changed, 5 insertions(+) >
diff --git a/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c b/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c index c62f592a60d..21093044708 100644 --- a/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c +++ b/gcc/testsuite/gcc.target/arm/mve/dlstp-compile-asm-2.c @@ -216,7 +216,12 @@ void test7 (int32_t *a, int32_t *b, int32_t *c, int n, int g) **... ** dlstp.32 lr, r3 ** vldrw.32 q[0-9]+, \[r0\], #16 +** ( +** vmsr p0, .* ** vpst +** | +** vpst +** ) ** vldrwt.32 q[0-9]+, \[r1\], #16 ** vadd.i32 (q[0-9]+), q[0-9]+, q[0-9]+ ** vstrw.32 \1, \[r2\], #16