| Message ID | 20241002171339.299940-2-andre.simoesdiasvieira@arm.com |
|---|---|
| State | New |
| Headers | show |
| Series | aarch64: remove SVE2 requirement from SME and diagnose it as unsupported | expand |
On Wed, Oct 02, 2024 at 06:13:38PM +0100, Andre Vieira wrote: > > This patch splits out FCMA as a feature from Armv8.3-A and adds it as a separate > feature bit which now controls 'TARGET_COMPLEX'. > > gcc/ChangeLog: > > * config/aarch64/aarch64-arches.def (FCMA): New feature bit, can not be > used as an extension in the command-line. > * config/aarch64/aarch64.h (TARGET_COMPLEX): Use FCMA feature bit > rather than ARMV8_3. > --- > gcc/config/aarch64/aarch64-arches.def | 2 +- > gcc/config/aarch64/aarch64-option-extensions.def | 1 + > gcc/config/aarch64/aarch64.h | 2 +- > 3 files changed, 3 insertions(+), 2 deletions(-) > > diff --git a/gcc/config/aarch64/aarch64-arches.def b/gcc/config/aarch64/aarch64-arches.def > index 4634b272e28..fadf9c36b03 100644 > --- a/gcc/config/aarch64/aarch64-arches.def > +++ b/gcc/config/aarch64/aarch64-arches.def > @@ -33,7 +33,7 @@ > AARCH64_ARCH("armv8-a", generic_armv8_a, V8A, 8, (SIMD)) > AARCH64_ARCH("armv8.1-a", generic_armv8_a, V8_1A, 8, (V8A, LSE, CRC, RDMA)) > AARCH64_ARCH("armv8.2-a", generic_armv8_a, V8_2A, 8, (V8_1A)) > -AARCH64_ARCH("armv8.3-a", generic_armv8_a, V8_3A, 8, (V8_2A, PAUTH, RCPC)) > +AARCH64_ARCH("armv8.3-a", generic_armv8_a, V8_3A, 8, (V8_2A, PAUTH, RCPC, FCMA)) > AARCH64_ARCH("armv8.4-a", generic_armv8_a, V8_4A, 8, (V8_3A, F16FML, DOTPROD, FLAGM)) > AARCH64_ARCH("armv8.5-a", generic_armv8_a, V8_5A, 8, (V8_4A, SB, SSBS, PREDRES)) > AARCH64_ARCH("armv8.6-a", generic_armv8_a, V8_6A, 8, (V8_5A, I8MM, BF16)) > diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def > index 6998627f377..4732c20ec96 100644 > --- a/gcc/config/aarch64/aarch64-option-extensions.def > +++ b/gcc/config/aarch64/aarch64-option-extensions.def > @@ -193,6 +193,7 @@ AARCH64_OPT_EXTENSION("sve2-sm4", SVE2_SM4, (SVE2, SM4), (), (), "svesm4") > AARCH64_FMV_FEATURE("sve2-sm4", SVE_SM4, (SVE2_SM4)) > > AARCH64_OPT_FMV_EXTENSION("sme", SME, (BF16, SVE2), (), (), "sme") > +AARCH64_OPT_EXTENSION("", FCMA, (), (), (), "fcma") > > AARCH64_OPT_EXTENSION("memtag", MEMTAG, (), (), (), "") > > diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h > index a99e7bb6c47..c0ad305e324 100644 > --- a/gcc/config/aarch64/aarch64.h > +++ b/gcc/config/aarch64/aarch64.h > @@ -362,7 +362,7 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE ATTRIBUTE_UNUSED > #define TARGET_JSCVT (TARGET_FLOAT && TARGET_ARMV8_3) > > /* Armv8.3-a Complex number extension to AdvSIMD extensions. */ > -#define TARGET_COMPLEX (TARGET_SIMD && TARGET_ARMV8_3) > +#define TARGET_COMPLEX (TARGET_SIMD && AARCH64_HAVE_ISA (FCMA)) > > /* Floating-point rounding instructions from Armv8.5-a. */ > #define TARGET_FRINT (AARCH64_HAVE_ISA (V8_5A) && TARGET_FLOAT) This patch doesn't work (as I know you're already aware). I've posted a more complete patch to split out FCMA, which can replace this one. https://gcc.gnu.org/pipermail/gcc-patches/2024-October/664568.html
diff --git a/gcc/config/aarch64/aarch64-arches.def b/gcc/config/aarch64/aarch64-arches.def index 4634b272e28..fadf9c36b03 100644 --- a/gcc/config/aarch64/aarch64-arches.def +++ b/gcc/config/aarch64/aarch64-arches.def @@ -33,7 +33,7 @@ AARCH64_ARCH("armv8-a", generic_armv8_a, V8A, 8, (SIMD)) AARCH64_ARCH("armv8.1-a", generic_armv8_a, V8_1A, 8, (V8A, LSE, CRC, RDMA)) AARCH64_ARCH("armv8.2-a", generic_armv8_a, V8_2A, 8, (V8_1A)) -AARCH64_ARCH("armv8.3-a", generic_armv8_a, V8_3A, 8, (V8_2A, PAUTH, RCPC)) +AARCH64_ARCH("armv8.3-a", generic_armv8_a, V8_3A, 8, (V8_2A, PAUTH, RCPC, FCMA)) AARCH64_ARCH("armv8.4-a", generic_armv8_a, V8_4A, 8, (V8_3A, F16FML, DOTPROD, FLAGM)) AARCH64_ARCH("armv8.5-a", generic_armv8_a, V8_5A, 8, (V8_4A, SB, SSBS, PREDRES)) AARCH64_ARCH("armv8.6-a", generic_armv8_a, V8_6A, 8, (V8_5A, I8MM, BF16)) diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def index 6998627f377..4732c20ec96 100644 --- a/gcc/config/aarch64/aarch64-option-extensions.def +++ b/gcc/config/aarch64/aarch64-option-extensions.def @@ -193,6 +193,7 @@ AARCH64_OPT_EXTENSION("sve2-sm4", SVE2_SM4, (SVE2, SM4), (), (), "svesm4") AARCH64_FMV_FEATURE("sve2-sm4", SVE_SM4, (SVE2_SM4)) AARCH64_OPT_FMV_EXTENSION("sme", SME, (BF16, SVE2), (), (), "sme") +AARCH64_OPT_EXTENSION("", FCMA, (), (), (), "fcma") AARCH64_OPT_EXTENSION("memtag", MEMTAG, (), (), (), "") diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index a99e7bb6c47..c0ad305e324 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -362,7 +362,7 @@ constexpr auto AARCH64_FL_DEFAULT_ISA_MODE ATTRIBUTE_UNUSED #define TARGET_JSCVT (TARGET_FLOAT && TARGET_ARMV8_3) /* Armv8.3-a Complex number extension to AdvSIMD extensions. */ -#define TARGET_COMPLEX (TARGET_SIMD && TARGET_ARMV8_3) +#define TARGET_COMPLEX (TARGET_SIMD && AARCH64_HAVE_ISA (FCMA)) /* Floating-point rounding instructions from Armv8.5-a. */ #define TARGET_FRINT (AARCH64_HAVE_ISA (V8_5A) && TARGET_FLOAT)