| Message ID | 20210518204758.GB16671@ibm-toto.the-meissners.org |
|---|---|
| State | New |
| Headers | show |
| Series | Move xx* builtins to vsx.md. | expand |
On Tue, 2021-05-18 at 16:47 -0400, Michael Meissner wrote: > [PATCH 2/2] Fix xxeval predicates. > > In doing the patch to move the XX* built-in functions from altivec.md to > vsx.md, I noticed that the xxeval built-in function used the > altivec_register_operand predicate. Since it takes vsx registers, this > might force the register allocate to issue a move when it could use a > traditional floating point register. This patch fixes that. allocator ? > > gcc/ > 2021-05-18 Michael Meissner <meissner@linux.ibm.com> > > * config/rs6000/vsx.md (xxeval): Use register_predicate instead of > altivec_register_predicate. > --- > gcc/config/rs6000/vsx.md | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md > index a859038d399..15a8c0e22d8 100644 > --- a/gcc/config/rs6000/vsx.md > +++ b/gcc/config/rs6000/vsx.md > @@ -6410,9 +6410,9 @@ (define_insn "xxpermx_inst" > ;; XXEVAL built-in function support > (define_insn "xxeval" > [(set (match_operand:V2DI 0 "register_operand" "=wa") > - (unspec:V2DI [(match_operand:V2DI 1 "altivec_register_operand" "wa") > - (match_operand:V2DI 2 "altivec_register_operand" "wa") > - (match_operand:V2DI 3 "altivec_register_operand" "wa") > + (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "wa") > + (match_operand:V2DI 2 "register_operand" "wa") > + (match_operand:V2DI 3 "register_operand" "wa") > (match_operand:QI 4 "u8bit_cint_operand" "n")] > UNSPEC_XXEVAL))] > "TARGET_POWER10" > -- ok Thanks, -Will > 2.31.1 >
On Thu, May 20, 2021 at 02:31:08PM -0500, will schmidt wrote: > On Tue, 2021-05-18 at 16:47 -0400, Michael Meissner wrote: > > [PATCH 2/2] Fix xxeval predicates. > > > > In doing the patch to move the XX* built-in functions from altivec.md to > > vsx.md, I noticed that the xxeval built-in function used the > > altivec_register_operand predicate. Since it takes vsx registers, this > > might force the register allocate to issue a move when it could use a > > traditional floating point register. This patch fixes that. > > allocator ? Thanks.
Ping patch. | Date: Tue, 18 May 2021 16:47:58 -0400 | Subject: [PATCH 2/2] Fix xxeval predicates. | Message-ID: <20210518204758.GB16671@ibm-toto.the-meissners.org> This needs the following patch to have been applied: | Date: Tue, 18 May 2021 16:46:47 -0400 | Subject: [PATCH 1/2] Move xx* builtins to vsx.md. | Message-ID: <20210518204647.GA16671@ibm-toto.the-meissners.org> If the first patch is rejected, this patch should still be considered (but it would be against alivect.md instead of vsx.md).
Ping patch again. Original patch (fix xxevel predicates): | Date: Tue, 18 May 2021 16:47:58 -0400 | Subject: [PATCH 2/2] Fix xxeval predicates. | Message-ID: <20210518204758.GB16671@ibm-toto.the-meissners.org> | https://gcc.gnu.org/pipermail/gcc-patches/2021-May/570683.html
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index a859038d399..15a8c0e22d8 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -6410,9 +6410,9 @@ (define_insn "xxpermx_inst" ;; XXEVAL built-in function support (define_insn "xxeval" [(set (match_operand:V2DI 0 "register_operand" "=wa") - (unspec:V2DI [(match_operand:V2DI 1 "altivec_register_operand" "wa") - (match_operand:V2DI 2 "altivec_register_operand" "wa") - (match_operand:V2DI 3 "altivec_register_operand" "wa") + (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "wa") + (match_operand:V2DI 2 "register_operand" "wa") + (match_operand:V2DI 3 "register_operand" "wa") (match_operand:QI 4 "u8bit_cint_operand" "n")] UNSPEC_XXEVAL))] "TARGET_POWER10"