Show patches with: Submitter = Hu, Lin1       |    State = Action Required       |    Archived = No       |   61 patches
Patch Series A/F/R/T S/W/F Date Submitter Delegate State
i386: Add attr_isa for vaes patterns to sync with attr gpr16. [pr119473] i386: Add attr_isa for vaes patterns to sync with attr gpr16. [pr119473] - - - - --- 2025-03-28 Hu, Lin1 New
i386: Set attr "addr" as "gpr16" for constraint "jm". [PR 119425] i386: Set attr "addr" as "gpr16" for constraint "jm". [PR 119425] - - - - --- 2025-03-26 Hu, Lin1 New
[v2] i386: Add "s_" as Saturation for AVX10.2 Converting Intrinsics. [v2] i386: Add "s_" as Saturation for AVX10.2 Converting Intrinsics. - - - - --- 2025-03-25 Hu, Lin1 New
i386: Add "s_" as Saturation for AVX10.2 Converting Intrinsics. i386: Add "s_" as Saturation for AVX10.2 Converting Intrinsics. - - - - --- 2025-03-25 Hu, Lin1 New
i386: Fix AVX10.2 sat cvt intrinsic. i386: Fix AVX10.2 sat cvt intrinsic. - - - - --- 2025-03-25 Hu, Lin1 New
i386: Fix AVX10.2 SAT CVT testcases. i386: Fix AVX10.2 SAT CVT testcases. - - - - --- 2025-03-20 Hu, Lin1 New
[4/4] i386: Add "s_" as Saturation for AVX10.2 SAT CVT Intrinsics. Fix AVX10.2 SAT CVT. - - - - --- 2025-03-19 Hu, Lin1 New
[3/4] i386: Fix AVX10.2 SAT CVT testcases. Fix AVX10.2 SAT CVT. - - - - --- 2025-03-19 Hu, Lin1 New
[2/4] i386: Add AVX10.2 SAT CVT Intrinsics without Rounding Control Fix AVX10.2 SAT CVT. - - - - --- 2025-03-19 Hu, Lin1 New
[1/4] i386: Update Suffix for AVX10.2 SAT CVT Intrinsics Fix AVX10.2 SAT CVT. - - - - --- 2025-03-19 Hu, Lin1 New
[v3] i386: Zero extend 32-bit address to 64-bit with option -mx32 -maddress-mode=long. [PR 117418] [v3] i386: Zero extend 32-bit address to 64-bit with option -mx32 -maddress-mode=long. [PR 117418] - - - - --- 2024-11-11 Hu, Lin1 New
[v2] i386: Zero extend 32-bit address to 64-bit with option -mx32 -maddress-mode=long. [PR 117418] [v2] i386: Zero extend 32-bit address to 64-bit with option -mx32 -maddress-mode=long. [PR 117418] - - - - --- 2024-11-08 Hu, Lin1 New
i386: Disallow long address mode in the x32 mode. [PR 117418] i386: Disallow long address mode in the x32 mode. [PR 117418] - - - - --- 2024-11-08 Hu, Lin1 New
i386: Modify regexp of pr117304-1.c i386: Modify regexp of pr117304-1.c - - - - --- 2024-11-07 Hu, Lin1 New
i386: Add -mavx512vl for pr117304-1.c i386: Add -mavx512vl for pr117304-1.c - - - - --- 2024-11-07 Hu, Lin1 New
i386: Add OPTION_MASK_ISA2_EVEX512 for some AVX512 instructions. i386: Add OPTION_MASK_ISA2_EVEX512 for some AVX512 instructions. - - - - --- 2024-11-06 Hu, Lin1 New
[v2] i386: Handling exception input of __builtin_ia32_prefetch. [PR117416] [v2] i386: Handling exception input of __builtin_ia32_prefetch. [PR117416] - - - - --- 2024-11-05 Hu, Lin1 New
i386: Handling exception input of __builtin_ia32_prefetch. [PR117416] i386: Handling exception input of __builtin_ia32_prefetch. [PR117416] - - - - --- 2024-11-05 Hu, Lin1 New
i386: Fix some patterns's mem attribute. i386: Fix some patterns's mem attribute. - - - - --- 2024-10-10 Hu, Lin1 New
i386: Add ssemov2, sseicvt2 for some load instructions that use memory on operand2 i386: Add ssemov2, sseicvt2 for some load instructions that use memory on operand2 - - - - --- 2024-09-19 Hu, Lin1 New
testsuite: Fix xorsign.c, vect-double-2.c fails with -march=x86-64-v2 testsuite: Fix xorsign.c, vect-double-2.c fails with -march=x86-64-v2 - - - - --- 2024-09-05 Hu, Lin1 New
Match: Fix ordered and nonequal Match: Fix ordered and nonequal - - - - --- 2024-09-04 Hu, Lin1 New
i386: extend trunc{128}2{16,32,64}'s scope. i386: extend trunc{128}2{16,32,64}'s scope. - - - - --- 2024-07-15 Hu, Lin1 New
[v2] i386: Refactor ssedoublemode [v2] i386: Refactor ssedoublemode - - - - --- 2024-07-05 Hu, Lin1 New
i386: Refactor ssedoublemode i386: Refactor ssedoublemode - - - - --- 2024-07-05 Hu, Lin1 New
vect: Fix ICE caused by missing check for TREE_CODE == SSA_NAME vect: Fix ICE caused by missing check for TREE_CODE == SSA_NAME - - - - --- 2024-07-03 Hu, Lin1 New
i386: Refactor vcvttps2qq/vcvtqq2ps patterns. i386: Refactor vcvttps2qq/vcvtqq2ps patterns. - - - - --- 2024-06-27 Hu, Lin1 New
[1/3,v5] vect: generate suitable convert insn for int -> int, float -> float and int <-> float. [1/3,v5] vect: generate suitable convert insn for int -> int, float -> float and int <-> float. - - - - --- 2024-06-26 Hu, Lin1 New
[1/3,v4] vect: generate suitable convert insn for int -> int, float -> float and int <-> float. [1/3,v4] vect: generate suitable convert insn for int -> int, float -> float and int <-> float. - - - - --- 2024-06-25 Hu, Lin1 New
i386: Refine all cvtt* instructions with UNSPEC instead of FIX/UNSIGNED_FIX. i386: Refine all cvtt* instructions with UNSPEC instead of FIX/UNSIGNED_FIX. - - - - --- 2024-06-13 Hu, Lin1 New
[1/3,v3] vect: generate suitable convert insn for int -> int, float -> float and int <-> float. [1/3,v3] vect: generate suitable convert insn for int -> int, float -> float and int <-> float. - - - - --- 2024-06-11 Hu, Lin1 New
i386: Handle target of __builtin_ia32_cmp[p|s][s|d] from avx into sse/sse2/avx i386: Handle target of __builtin_ia32_cmp[p|s][s|d] from avx into sse/sse2/avx - - - - --- 2024-05-30 Hu, Lin1 New
[3/3,v2] vect: support direct conversion under x86-64-v3. Untitled series #408662 - - - - --- 2024-05-29 Hu, Lin1 New
[2/3,v2] vect: Support v4hi -> v4qi. Untitled series #408662 - - - - --- 2024-05-29 Hu, Lin1 New
i386: Optimize EQ/NE comparison between avx512 kmask and -1. i386: Optimize EQ/NE comparison between avx512 kmask and -1. - - - - --- 2024-05-28 Hu, Lin1 New
[3/3] vect: support direct conversion under x86-64-v3. Optimize __builtin_convertvector for x86-64-v4 and - - - - --- 2024-05-23 Hu, Lin1 New
[2/3] vect: Support v4hi -> v4qi. Optimize __builtin_convertvector for x86-64-v4 and - - - - --- 2024-05-23 Hu, Lin1 New
[1/3] vect: generate suitable convert insn for int -> int, float -> float and int <-> float. Optimize __builtin_convertvector for x86-64-v4 and - - - - --- 2024-05-23 Hu, Lin1 New
i386: Fix some intrinsics without alignment requirements. i386: Fix some intrinsics without alignment requirements. - - - - --- 2024-05-08 Hu, Lin1 New
vect: generate suitable convert insn for int -> int, float -> float and int <-> float. vect: generate suitable convert insn for int -> int, float -> float and int <-> float. - - - - --- 2024-05-08 Hu, Lin1 New
i386: Fix CPUID of USER_MSR. i386: Fix CPUID of USER_MSR. - - - - --- 2023-11-29 Hu, Lin1 New
Avoid generate vblendps with ymm16+ Avoid generate vblendps with ymm16+ - - - - --- 2023-11-09 Hu, Lin1 New
Fix testcases that are raised by support -mevex512 Fix testcases that are raised by support -mevex512 - - - - --- 2023-10-11 Hu, Lin1 New
Support Intel USER_MSR Support Intel USER_MSR - - - - --- 2023-10-10 Hu, Lin1 New
[18/18] Allow -mno-evex512 usage Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[17/18] Support -mevex512 for AVX512FP16 intrins Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[16/18] Support -mevex512 for AVX512{IFMA, VBMI, VNNI, BF16, VPOPCNTDQ, VBMI2, BITALG, VP2INTERSECT… Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[15/18] Support -mevex512 for AVX512BW intrins Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[14/18] Support -mevex512 for AVX512DQ intrins Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[13/18] Support -mevex512 for AVX512F intrins Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[12/18] Disable zmm register and 512 bit libmvec call when !TARGET_EVEX512 Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[11/18,5/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[10/18,4/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[09/18,3/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[08/18,2/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[07/18,1/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[06/18,5/5] Push evex512 target for 512 bit intrins Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[05/18,4/5] Push evex512 target for 512 bit intrins Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[04/18,3/5] Push evex512 target for 512 bit intrins Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[03/18,2/5] Push evex512 target for 512 bit intrins Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New
[01/18] Initial support for -mevex512 Support -mevex512 for AVX512 - - - - --- 2023-09-21 Hu, Lin1 New