Show patches with: Submitter = Li, Pan2       |    State = Action Required       |    Archived = No       |   498 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
[v1] RISC-V: Fix incorrect optimization options passing to cond and builtin [v1] RISC-V: Fix incorrect optimization options passing to cond and builtin - - - - --- 2024-12-02 Li, Pan2 New
[v1] Match: Refactor the unsigned SAT_SUB match patterns [NFC] [v1] Match: Refactor the unsigned SAT_SUB match patterns [NFC] - - - - --- 2024-11-29 Li, Pan2 New
[v1] RISC-V: Fix RVV strided load/store testcases failure [v1] RISC-V: Fix RVV strided load/store testcases failure - - - - --- 2024-11-29 Li, Pan2 New
[v1] RISC-V: Fix incorrect optimization options passing to widden [v1] RISC-V: Fix incorrect optimization options passing to widden - - - - --- 2024-11-29 Li, Pan2 New
[v1] RISC-V: Fix incorrect optimization options passing to widden [v1] RISC-V: Fix incorrect optimization options passing to widden - - - - --- 2024-11-29 Li, Pan2 New
[v1,3/3] RISC-V: Add testcases for vec_duplicate + vadd.vv combine to vadd.vx [v1,1/3] RISC-V: Combine vec_duplicate + vadd.vv to vadd.vx - - - - --- 2024-11-27 Li, Pan2 New
[v1,2/3] RISC-V: Adjust the testcases after vec_duplicate + vadd.vv combine [v1,1/3] RISC-V: Combine vec_duplicate + vadd.vv to vadd.vx - - - - --- 2024-11-27 Li, Pan2 New
[v1,1/3] RISC-V: Combine vec_duplicate + vadd.vv to vadd.vx [v1,1/3] RISC-V: Combine vec_duplicate + vadd.vv to vadd.vx - - - - --- 2024-11-27 Li, Pan2 New
[v4] I386: Add more testcases for unsigned SAT_ADD vector pattern [v4] I386: Add more testcases for unsigned SAT_ADD vector pattern - - - - --- 2024-11-27 Li, Pan2 New
[v3] I386: Add more testcases for unsigned SAT_ADD vector pattern [v3] I386: Add more testcases for unsigned SAT_ADD vector pattern - - - - --- 2024-11-26 Li, Pan2 New
[v1,2/2] RISC-V: Refactor the testcases for RVV gather/scatter [v1,1/2] RISC-V: Fix incorrect optimization options passing to gather/scatter - - - - --- 2024-11-25 Li, Pan2 New
[v1,1/2] RISC-V: Fix incorrect optimization options passing to gather/scatter [v1,1/2] RISC-V: Fix incorrect optimization options passing to gather/scatter - - - - --- 2024-11-25 Li, Pan2 New
[v2] I386: Add more testcases for unsigned SAT_ADD vector pattern [v2] I386: Add more testcases for unsigned SAT_ADD vector pattern - - - - --- 2024-11-25 Li, Pan2 New
[v1] I386: Add more testcases for unsigned SAT_ADD vector pattern [v1] I386: Add more testcases for unsigned SAT_ADD vector pattern - - - - --- 2024-11-25 Li, Pan2 New
[v1] Match: Refactor the unsigned SAT_ADD match ADD_OVERFLOW pattern [NFC] [v1] Match: Refactor the unsigned SAT_ADD match ADD_OVERFLOW pattern [NFC] - - - - --- 2024-11-25 Li, Pan2 New
[v1,7/7] RISC-V: Refine the vector stride load/store testcases [v1,1/7] RISC-V: Rearrange the test files for vector SAT_SUB [NFC] - - - - --- 2024-11-21 Li, Pan2 New
[v1,6/7] RISC-V: Refactor the test files for all other vector SAT ALU [v1,1/7] RISC-V: Rearrange the test files for vector SAT_SUB [NFC] - - - - --- 2024-11-21 Li, Pan2 New
[v1,5/7] RISC-V: Rearrange the test files for all other vector SAT ALU [NFC] [v1,1/7] RISC-V: Rearrange the test files for vector SAT_SUB [NFC] - - - - --- 2024-11-21 Li, Pan2 New
[v1,4/7] RISC-V: Refactor the testcases for vector SAT_TRUNC [v1,1/7] RISC-V: Rearrange the test files for vector SAT_SUB [NFC] - - - - --- 2024-11-21 Li, Pan2 New
[v1,3/7] RISC-V: Rearrange the test files for vector SAT_TRUNC [NFC] [v1,1/7] RISC-V: Rearrange the test files for vector SAT_SUB [NFC] - - - - --- 2024-11-21 Li, Pan2 New
[v1,2/7] RISC-V: Refactor the testcases for vector SAT_SUB [v1,1/7] RISC-V: Rearrange the test files for vector SAT_SUB [NFC] - - - - --- 2024-11-21 Li, Pan2 New
[v1,1/7] RISC-V: Rearrange the test files for vector SAT_SUB [NFC] [v1,1/7] RISC-V: Rearrange the test files for vector SAT_SUB [NFC] - - - - --- 2024-11-21 Li, Pan2 New
[v1,3/3] RISC-V: Refine the rtl dump expand check for vector SAT_ADD [v1,1/3] RISC-V: Rearrange the test files for vector SAT_ADD [NFC] - - - - --- 2024-11-20 Li, Pan2 New
[v1,2/3] RISC-V: Introduce riscv/rvv/autovec/sat folder to rvv.exp testsuite [v1,1/3] RISC-V: Rearrange the test files for vector SAT_ADD [NFC] - - - - --- 2024-11-20 Li, Pan2 New
[v1,1/3] RISC-V: Rearrange the test files for vector SAT_ADD [NFC] [v1,1/3] RISC-V: Rearrange the test files for vector SAT_ADD [NFC] - - - - --- 2024-11-20 Li, Pan2 New
[v1,2/2] RISC-V: Refine the rtl expand check for strided ld/st [v1,1/2] RISC-V: Fix incorrect optimization options passing to strided ld/st test - - - - --- 2024-11-19 Li, Pan2 New
[v1,1/2] RISC-V: Fix incorrect optimization options passing to strided ld/st test [v1,1/2] RISC-V: Fix incorrect optimization options passing to strided ld/st test - - - - --- 2024-11-19 Li, Pan2 New
[v1,2/2] RISC-V: Remove unnecessary option for all other scalar SAT_* testcase [v1,1/2] RISC-V: Rearrange the rest of test files for scalar SAT_* [NFC] - - - - --- 2024-11-18 Li, Pan2 New
[v1,1/2] RISC-V: Rearrange the rest of test files for scalar SAT_* [NFC] [v1,1/2] RISC-V: Rearrange the rest of test files for scalar SAT_* [NFC] - - - - --- 2024-11-18 Li, Pan2 New
[v1,2/2] RISC-V: Remove unnecessary option for scalar SAT_TRUNC testcase [v1,1/2] RISC-V: Rearrange the test files for scalar SAT_TRUNC [NFC] - - - - --- 2024-11-16 Li, Pan2 New
[v1,1/2] RISC-V: Rearrange the test files for scalar SAT_TRUNC [NFC] [v1,1/2] RISC-V: Rearrange the test files for scalar SAT_TRUNC [NFC] - - - - --- 2024-11-16 Li, Pan2 New
[v1,2/2] RISC-V: Remove unnecessary option for scalar SAT_SUB testcase [v1,1/2] RISC-V: Rearrange the test files for scalar SAT_SUB [NFC] - - - - --- 2024-11-15 Li, Pan2 New
[v1,1/2] RISC-V: Rearrange the test files for scalar SAT_SUB [NFC] [v1,1/2] RISC-V: Rearrange the test files for scalar SAT_SUB [NFC] - - - - --- 2024-11-15 Li, Pan2 New
[v1] RISC-V: Remove unnecessary option for scalar SAT_ADD testcase [v1] RISC-V: Remove unnecessary option for scalar SAT_ADD testcase - - - - --- 2024-11-15 Li, Pan2 New
[COMMITTED] RISC-V: Move scalar SAT_ADD test cases to a isolated folder [COMMITTED] RISC-V: Move scalar SAT_ADD test cases to a isolated folder - - - - --- 2024-11-15 Li, Pan2 New
[v1] RISC-V: Rearrange the test files for scalar SAT_ADD [NFC] [v1] RISC-V: Rearrange the test files for scalar SAT_ADD [NFC] - - - - --- 2024-11-14 Li, Pan2 New
[v1] RISC-V: Fix one nit indent issue of ustrunc pattern [NFC] [v1] RISC-V: Fix one nit indent issue of ustrunc pattern [NFC] - - - - --- 2024-11-11 Li, Pan2 New
[v1,2/2] Match: Refactor the unsigned SAT_ADD match pattern [NFC] [v1,1/2] Revert "Match: Simplify branch form 3 of unsigned SAT_ADD into branchless" - - - - --- 2024-11-11 Li, Pan2 New
[v1,1/2] Revert "Match: Simplify branch form 3 of unsigned SAT_ADD into branchless" [v1,1/2] Revert "Match: Simplify branch form 3 of unsigned SAT_ADD into branchless" - - - - --- 2024-11-11 Li, Pan2 New
[v1,5/5] Test: Add testcases for form 16 of unsigned integer SAT_ADD simplify [v1,1/5] Match: Simplify branch form 6 of unsigned SAT_ADD into branchless - - - - --- 2024-11-05 Li, Pan2 New
[v1,4/5] Test: Add testcases for form 15 of unsigned integer SAT_ADD simplify [v1,1/5] Match: Simplify branch form 6 of unsigned SAT_ADD into branchless - - - - --- 2024-11-05 Li, Pan2 New
[v1,3/5] Test: Add testcases for form 14 of unsigned integer SAT_ADD simplify [v1,1/5] Match: Simplify branch form 6 of unsigned SAT_ADD into branchless - - - - --- 2024-11-05 Li, Pan2 New
[v1,2/5] Test: Add testcases for form 13 of unsigned integer SAT_ADD simplify [v1,1/5] Match: Simplify branch form 6 of unsigned SAT_ADD into branchless - - - - --- 2024-11-05 Li, Pan2 New
[v1,1/5] Match: Simplify branch form 6 of unsigned SAT_ADD into branchless [v1,1/5] Match: Simplify branch form 6 of unsigned SAT_ADD into branchless - - - - --- 2024-11-05 Li, Pan2 New
[v1,5/5] Test: Add testcases for form 12 of unsigned integer SAT_ADD simplify [v1,1/5] Match: Simplify branch form 5 of unsigned SAT_ADD into branchless - - - - --- 2024-11-04 Li, Pan2 New
[v1,4/5] Test: Add testcases for form 11 of unsigned integer SAT_ADD simplify [v1,1/5] Match: Simplify branch form 5 of unsigned SAT_ADD into branchless - - - - --- 2024-11-04 Li, Pan2 New
[v1,3/5] Test: Add testcases for form 10 of unsigned integer SAT_ADD simplify [v1,1/5] Match: Simplify branch form 5 of unsigned SAT_ADD into branchless - - - - --- 2024-11-04 Li, Pan2 New
[v1,2/5] Test: Add testcases for form 9 of unsigned integer SAT_ADD simplify [v1,1/5] Match: Simplify branch form 5 of unsigned SAT_ADD into branchless - - - - --- 2024-11-04 Li, Pan2 New
[v1,1/5] Match: Simplify branch form 5 of unsigned SAT_ADD into branchless [v1,1/5] Match: Simplify branch form 5 of unsigned SAT_ADD into branchless - - - - --- 2024-11-04 Li, Pan2 New
[v2,10/10] Test: Add testcases for form 8 of unsigned integer SAT_ADD simplify [v2,01/10] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless - - - - --- 2024-10-31 Li, Pan2 New
[v2,09/10] Test: Add testcases for form 7 of unsigned integer SAT_ADD simplify [v2,01/10] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless - - - - --- 2024-10-31 Li, Pan2 New
[v2,08/10] Test: Add testcases for form 6 of unsigned integer SAT_ADD simplify [v2,01/10] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless - - - - --- 2024-10-31 Li, Pan2 New
[v2,07/10] Test: Add testcases for form 5 of unsigned integer SAT_ADD simplify [v2,01/10] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless - - - - --- 2024-10-31 Li, Pan2 New
[v2,06/10] Test: Move unsigned integer SAT_ADD simplify testcases to gcc.dg [v2,01/10] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless - - - - --- 2024-10-31 Li, Pan2 New
[v2,05/10] Match: Update the comments of unsigned integer SAT_ADD [NFC] [v2,01/10] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless - - - - --- 2024-10-31 Li, Pan2 New
[v2,04/10] Match: Remove usadd_left_part_1 as it has only one reference [NFC] [v2,01/10] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless - - - - --- 2024-10-31 Li, Pan2 New
[v2,03/10] Match: Simplify branch form 8 of unsigned SAT_ADD into branchless [v2,01/10] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless - - - - --- 2024-10-31 Li, Pan2 New
[v2,02/10] Match: Simplify branch form 7 of unsigned SAT_ADD into branchless [v2,01/10] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless - - - - --- 2024-10-31 Li, Pan2 New
[v2,01/10] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless [v2,01/10] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless - - - - --- 2024-10-31 Li, Pan2 New
[v2] Doc: Add doc for standard name mask_len_strided_load{store}m [v2] Doc: Add doc for standard name mask_len_strided_load{store}m - - - - --- 2024-10-30 Li, Pan2 New
[v1] Doc: Add doc for standard name mask_len_strided_load{store}m [v1] Doc: Add doc for standard name mask_len_strided_load{store}m - - - - --- 2024-10-30 Li, Pan2 New
[5/5] Match: Update the comments of unsigned integer SAT_ADD [NFC] [1/5] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless - - - - --- 2024-10-29 Li, Pan2 New
[4/5] Match: Remove usadd_left_part_1 as it has only one reference [NFC] [1/5] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless - - - - --- 2024-10-29 Li, Pan2 New
[3/5] Match: Simplify branch form 8 of unsigned SAT_ADD into branchless [1/5] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless - - - - --- 2024-10-29 Li, Pan2 New
[2/5] Match: Simplify branch form 7 of unsigned SAT_ADD into branchless [1/5] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless - - - - --- 2024-10-29 Li, Pan2 New
[1/5] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless [1/5] Match: Simplify branch form 4 of unsigned SAT_ADD into branchless - - - - --- 2024-10-29 Li, Pan2 New
Match: Simplify branch form 3 of unsigned SAT_ADD into branchless Match: Simplify branch form 3 of unsigned SAT_ADD into branchless - - - - --- 2024-10-24 Li, Pan2 New
[5/5] RISC-V: Add testcases for form 1 of MASK_LEN_STRIDED_LOAD{STORE} [1/5] Internal-fn: Introduce new IFN MASK_LEN_STRIDED_LOAD{STORE} - - - - --- 2024-10-23 Li, Pan2 New
[4/5] RISC-V: Implement the MASK_LEN_STRIDED_LOAD{STORE} [1/5] Internal-fn: Introduce new IFN MASK_LEN_STRIDED_LOAD{STORE} - - - - --- 2024-10-23 Li, Pan2 New
[3/5] RISC-V: Adjust the gather-scatter testcases due to middle-end change [1/5] Internal-fn: Introduce new IFN MASK_LEN_STRIDED_LOAD{STORE} - - - - --- 2024-10-23 Li, Pan2 New
[2/5] Vect: Introduce MASK_LEN_STRIDED_LOAD{STORE} to loop vectorizer [1/5] Internal-fn: Introduce new IFN MASK_LEN_STRIDED_LOAD{STORE} - - - - --- 2024-10-23 Li, Pan2 New
[1/5] Internal-fn: Introduce new IFN MASK_LEN_STRIDED_LOAD{STORE} [1/5] Internal-fn: Introduce new IFN MASK_LEN_STRIDED_LOAD{STORE} - - - - --- 2024-10-23 Li, Pan2 New
RISC-V: Fix UNRESOLVED testcases for SAT alu vector mode RISC-V: Fix UNRESOLVED testcases for SAT alu vector mode - - - - --- 2024-10-15 Li, Pan2 New
Match: Remove dup match pattern for signed_integer_sat_sub [PR117141] Match: Remove dup match pattern for signed_integer_sat_sub [PR117141] - - - - --- 2024-10-14 Li, Pan2 New
[11/11] RISC-V: Add testcases for form 8 of vector signed SAT_TRUNC [01/11] Match: Support form 1 for vector signed integer SAT_TRUNC - - - - --- 2024-10-14 Li, Pan2 New
[10/11] RISC-V: Add testcases for form 7 of vector signed SAT_TRUNC [01/11] Match: Support form 1 for vector signed integer SAT_TRUNC - - - - --- 2024-10-14 Li, Pan2 New
[09/11] RISC-V: Add testcases for form 6 of vector signed SAT_TRUNC [01/11] Match: Support form 1 for vector signed integer SAT_TRUNC - - - - --- 2024-10-14 Li, Pan2 New
[08/11] RISC-V: Add testcases for form 5 of vector signed SAT_TRUNC [01/11] Match: Support form 1 for vector signed integer SAT_TRUNC - - - - --- 2024-10-14 Li, Pan2 New
[07/11] RISC-V: Add testcases for form 4 of vector signed SAT_TRUNC [01/11] Match: Support form 1 for vector signed integer SAT_TRUNC - - - - --- 2024-10-14 Li, Pan2 New
[06/11] RISC-V: Add testcases for form 3 of vector signed SAT_TRUNC [01/11] Match: Support form 1 for vector signed integer SAT_TRUNC - - - - --- 2024-10-14 Li, Pan2 New
[05/11] RISC-V: Add testcases for form 2 of vector signed SAT_TRUNC [01/11] Match: Support form 1 for vector signed integer SAT_TRUNC - - - - --- 2024-10-14 Li, Pan2 New
[04/11] RISC-V: Add testcases for form 1 of vector signed SAT_TRUNC [01/11] Match: Support form 1 for vector signed integer SAT_TRUNC - - - - --- 2024-10-14 Li, Pan2 New
[03/11] RISC-V: Implement vector SAT_TRUNC for signed integer [01/11] Match: Support form 1 for vector signed integer SAT_TRUNC - - - - --- 2024-10-14 Li, Pan2 New
[02/11] Vect: Try the pattern of vector signed integer SAT_TRUNC [01/11] Match: Support form 1 for vector signed integer SAT_TRUNC - - - - --- 2024-10-14 Li, Pan2 New
[01/11] Match: Support form 1 for vector signed integer SAT_TRUNC [01/11] Match: Support form 1 for vector signed integer SAT_TRUNC - - - - --- 2024-10-14 Li, Pan2 New
[4/4] RISC-V: Add testcases for form 4 of vector signed SAT_SUB [1/4] RISC-V: Add testcases for form 2 of vector signed SAT_SUB - - - - --- 2024-10-12 Li, Pan2 New
[3/4] RISC-V: Add testcases for form 3 of vector signed SAT_SUB [1/4] RISC-V: Add testcases for form 2 of vector signed SAT_SUB - - - - --- 2024-10-12 Li, Pan2 New
[2/4] Match: Support form 3 for vector signed integer SAT_SUB [1/4] RISC-V: Add testcases for form 2 of vector signed SAT_SUB - - - - --- 2024-10-12 Li, Pan2 New
[1/4] RISC-V: Add testcases for form 2 of vector signed SAT_SUB [1/4] RISC-V: Add testcases for form 2 of vector signed SAT_SUB - - - - --- 2024-10-12 Li, Pan2 New
[v1,4/4] RISC-V: Add testcases for form 1 of vector signed SAT_SUB [v1,1/4] Match: Support form 1 for vector signed integer SAT_SUB - - - - --- 2024-10-11 Li, Pan2 New
[v1,3/4] RISC-V: Implement vector SAT_SUB for signed integer [v1,1/4] Match: Support form 1 for vector signed integer SAT_SUB - - - - --- 2024-10-11 Li, Pan2 New
[v1,2/4] Vect: Try the pattern of vector signed integer SAT_SUB [v1,1/4] Match: Support form 1 for vector signed integer SAT_SUB - - - - --- 2024-10-11 Li, Pan2 New
[v1,1/4] Match: Support form 1 for vector signed integer SAT_SUB [v1,1/4] Match: Support form 1 for vector signed integer SAT_SUB - - - - --- 2024-10-11 Li, Pan2 New
[v1,4/4] RISC-V: Add testcases for form 8 of scalar signed SAT_TRUNC [v1,1/4] RISC-V: Add testcases for form 5 of scalar signed SAT_TRUNC - - - - --- 2024-10-10 Li, Pan2 New
[v1,3/4] RISC-V: Add testcases for form 7 of scalar signed SAT_TRUNC [v1,1/4] RISC-V: Add testcases for form 5 of scalar signed SAT_TRUNC - - - - --- 2024-10-10 Li, Pan2 New
[v1,2/4] RISC-V: Add testcases for form 6 of scalar signed SAT_TRUNC [v1,1/4] RISC-V: Add testcases for form 5 of scalar signed SAT_TRUNC - - - - --- 2024-10-10 Li, Pan2 New
[v1,1/4] RISC-V: Add testcases for form 5 of scalar signed SAT_TRUNC [v1,1/4] RISC-V: Add testcases for form 5 of scalar signed SAT_TRUNC - - - - --- 2024-10-10 Li, Pan2 New
[v1,2/2] RISC-V: Add testcases for form 4 of scalar signed SAT_TRUNC [v1,1/2] Match: Support form 4 for scalar signed integer SAT_TRUNC - - - - --- 2024-10-10 Li, Pan2 New
[v1,1/2] Match: Support form 4 for scalar signed integer SAT_TRUNC [v1,1/2] Match: Support form 4 for scalar signed integer SAT_TRUNC - - - - --- 2024-10-10 Li, Pan2 New
[v1,2/2] RISC-V: Add testcases for form 3 of scalar signed SAT_TRUNC [v1,1/2] Match: Support form 3 for scalar signed integer SAT_TRUNC - - - - --- 2024-10-09 Li, Pan2 New
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