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: Submitter =
Jeff Law
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| 107 patches
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0andriy
981213
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monstr
snowpatch_ozlabs
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atishp04
shemminger
blocktrron
vigneshr
juju
mraynal
chunkeey
stewart
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horms
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jacmet
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rfried
ivanhu
ukleinek
ukleinek
ag
xypron
kevery
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jagan
rsalvaterra
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hegdevasant
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metan
wsa
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prom
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Jaehoon
rmilecki
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sjg
akumar
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wbx
trini
chleroy
legoater
legoater
legoater
pablo
pablo
abelloni
svanheule
rw
rw
bjonglez
ynezz
xback
xback
richiejp
aik
dangole
dangole
sbabic
sbabic
pevik
forty
echaudron
anuppatel
anuppatel
acer
Hauke
Hauke
next_ghost
benh
rgrimm
segher
pratyush
passgat
jms
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ymorin
mans0n
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festevam
linusw
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Andes
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conchuod
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strlen
strlen
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apalos
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Apply
«
1
2
»
Patch
Series
A/F/R/T
S/W/F
Date
Submitter
Delegate
State
[committed,PR,tree-optimization/117895] Fix sparc libgo build failure with CRC opts enabled
[committed,PR,tree-optimization/117895] Fix sparc libgo build failure with CRC opts enabled
- - - -
-
-
-
2024-12-06
Jeff Law
New
[to-be-committed,RISC-V,PR,target/117690] Add missing shift in constant synthesis
[to-be-committed,RISC-V,PR,target/117690] Add missing shift in constant synthesis
- - - -
-
-
-
2024-11-21
Jeff Law
New
[to-be-committed,RISC-V,PR,target/116590] Avoid emitting multiple instructions from fmacc patterns
[to-be-committed,RISC-V,PR,target/116590] Avoid emitting multiple instructions from fmacc patterns
- - - -
-
-
-
2024-11-20
Jeff Law
New
[to-be-committed,RISC-V,PR,target/117649] Fix branch on masked values splitter
[to-be-committed,RISC-V,PR,target/117649] Fix branch on masked values splitter
- - - -
-
-
-
2024-11-19
Jeff Law
New
[committed] Improve ext-dce's ability to eliminate more extensions
[committed] Improve ext-dce's ability to eliminate more extensions
- - - -
-
-
-
2024-11-18
Jeff Law
New
[RFC,RISC-V] Add target dependent pass to optimize related permutation constants
[RFC,RISC-V] Add target dependent pass to optimize related permutation constants
- - - -
-
-
-
2024-11-14
Jeff Law
New
[RFA/RFC,RISC-V] Fix type on vector move pattern
[RFA/RFC,RISC-V] Fix type on vector move pattern
- - - -
-
-
-
2024-11-12
Jeff Law
New
[to-be-committed,RISC-V] Drop undesirable two instruction macc alternatives
[to-be-committed,RISC-V] Drop undesirable two instruction macc alternatives
- - - -
-
-
-
2024-11-11
Jeff Law
New
[to-be-committed,RISC-V] Aggressively hoist VXRM assignments
[to-be-committed,RISC-V] Aggressively hoist VXRM assignments
- - - -
-
-
-
2024-10-29
Jeff Law
New
[to-be-committed,RISC-V] Avoid unnecessary extensions when value is already extended
[to-be-committed,RISC-V] Avoid unnecessary extensions when value is already extended
- - - -
-
-
-
2024-10-12
Jeff Law
New
[to-be-committed,RISC-V] Slightly improve broadcasting small constants into vectors
[to-be-committed,RISC-V] Slightly improve broadcasting small constants into vectors
- - - -
-
-
-
2024-10-11
Jeff Law
New
[to-be-committed,RISC-V] Add splitters to restore condops generation after recent phiopt changes
[to-be-committed,RISC-V] Add splitters to restore condops generation after recent phiopt changes
- - - -
-
-
-
2024-10-03
Jeff Law
New
[committed,RISC-V] Fix scan test output after recent path-splitting changes
[committed,RISC-V] Fix scan test output after recent path-splitting changes
- - - -
-
-
-
2024-09-04
Jeff Law
New
[committed] Fix assembly scan for RISC-V VLS tests
[committed] Fix assembly scan for RISC-V VLS tests
- - - -
-
-
-
2024-08-25
Jeff Law
New
[committed] Turn off late-combine for a few risc-v specific tests
[committed] Turn off late-combine for a few risc-v specific tests
- - - -
-
-
-
2024-08-25
Jeff Law
New
[committed,rtl-optimization/116244] Don't create bogus regs in alter_subreg
[committed,rtl-optimization/116244] Don't create bogus regs in alter_subreg
- - - -
-
-
-
2024-08-12
Jeff Law
New
[to-be-committed,RISC-V,PR,target/116283] Fix split code for recent Zbs improvements with masked bi…
[to-be-committed,RISC-V,PR,target/116283] Fix split code for recent Zbs improvements with masked bi…
- - - -
-
-
-
2024-08-09
Jeff Law
New
[RFA,PR,rtl-optimization/116136] Fix previously latent SUBREG simplification bug
[RFA,PR,rtl-optimization/116136] Fix previously latent SUBREG simplification bug
- - - -
-
-
-
2024-07-30
Jeff Law
New
[committed,rtl-optimization/116037] Explicitly track if a destination was skipped in ext-dce
[committed,rtl-optimization/116037] Explicitly track if a destination was skipped in ext-dce
- - - -
-
-
-
2024-07-24
Jeff Law
New
[committed,4/n,PR,rtl-optimization/115877] Correct SUBREG handling in a destination
[committed,4/n,PR,rtl-optimization/115877] Correct SUBREG handling in a destination
- - - -
-
-
-
2024-07-22
Jeff Law
New
[committed,PR,rtl-optimization/115877] Fix livein computation for ext-dce
[committed,PR,rtl-optimization/115877] Fix livein computation for ext-dce
- - - -
-
-
-
2024-07-21
Jeff Law
New
[committed,PR,rtl-optimization/115876] Fix one of two ubsan reported issues in new ext-dce.cc code
[committed,PR,rtl-optimization/115876] Fix one of two ubsan reported issues in new ext-dce.cc code
- - - -
-
-
-
2024-07-12
Jeff Law
New
[committed] Fix m68k bootstrap segfault with late-combine
[committed] Fix m68k bootstrap segfault with late-combine
- - - -
-
-
-
2024-07-12
Jeff Law
New
[to-be-committed,RISC-V] Eliminate unnecessary sign extension after inlined str[n]cmp
[to-be-committed,RISC-V] Eliminate unnecessary sign extension after inlined str[n]cmp
- - - -
-
-
-
2024-07-10
Jeff Law
New
[to-be-committed,RISC-V] Improve bset generation for another case
[to-be-committed,RISC-V] Improve bset generation for another case
- - - -
-
-
-
2024-07-09
Jeff Law
New
[to-be-committed,RISC-V,V2] Minor cleanup/improvement to bset/binv patterns
[to-be-committed,RISC-V,V2] Minor cleanup/improvement to bset/binv patterns
- - - -
-
-
-
2024-06-19
Jeff Law
New
[to-be-committed,RISC-V] Improve (1 << N) | C for rv64
[to-be-committed,RISC-V] Improve (1 << N) | C for rv64
- - - -
-
-
-
2024-06-10
Jeff Law
New
[to-be-committed,RISC-V] Use bext for extracting a bit into a SImode object
[to-be-committed,RISC-V] Use bext for extracting a bit into a SImode object
- - - -
-
-
-
2024-06-09
Jeff Law
New
[to-be-committed,RISC-V] Use pack to handle repeating constants
[to-be-committed,RISC-V] Use pack to handle repeating constants
- - - -
-
-
-
2024-05-29
Jeff Law
New
[to-be-committed,RISC-V] Some basic patterns for zbkb code generation
[to-be-committed,RISC-V] Some basic patterns for zbkb code generation
- - - -
-
-
-
2024-05-27
Jeff Law
New
[to-be-committed,RISC-V] Reassociate constants in logical ops
[to-be-committed,RISC-V] Reassociate constants in logical ops
- - - -
-
-
-
2024-05-26
Jeff Law
New
[to-be-committed,RISC-V] Try inverting for constant synthesis
[to-be-committed,RISC-V] Try inverting for constant synthesis
- - - -
-
-
-
2024-05-26
Jeff Law
New
[committed,v2] More logical op simplifications in simplify-rtx.cc
[committed,v2] More logical op simplifications in simplify-rtx.cc
- - - -
-
-
-
2024-05-25
Jeff Law
New
[to-be-committed,RISC-V] Generate nearby constant, then adjust to our final desired constant
[to-be-committed,RISC-V] Generate nearby constant, then adjust to our final desired constant
- - - -
-
-
-
2024-05-25
Jeff Law
New
[to-be-committed,RISC-V] Use bclri in constant synthesis
[to-be-committed,RISC-V] Use bclri in constant synthesis
- - - -
-
-
-
2024-05-23
Jeff Law
New
[to-be-committed,RISC-V] Eliminate redundant bitmanip operation
[to-be-committed,RISC-V] Eliminate redundant bitmanip operation
- - - -
-
-
-
2024-05-19
Jeff Law
New
[to-be-committed,RISC-V,PR,target/115142] Do not create invalidate shift-add insn
[to-be-committed,RISC-V,PR,target/115142] Do not create invalidate shift-add insn
- - - -
-
-
-
2024-05-19
Jeff Law
New
[to-be-committed,PR,target/115142] Do not create invalidate shift-add insn
[to-be-committed,PR,target/115142] Do not create invalidate shift-add insn
- - - -
-
-
-
2024-05-18
Jeff Law
New
[to-be-committed,RISC-V] Improve some shift-add sequences
[to-be-committed,RISC-V] Improve some shift-add sequences
- - - -
-
-
-
2024-05-15
Jeff Law
New
[committed] Fix rv32 issues with recent zicboz work
[committed] Fix rv32 issues with recent zicboz work
- - - -
-
-
-
2024-05-15
Jeff Law
New
[to-be-committed,RISC-V] Remove redundant AND in shift-add sequence
[to-be-committed,RISC-V] Remove redundant AND in shift-add sequence
- - - -
-
-
-
2024-05-14
Jeff Law
New
[to-be-committed,RISC-V] Improve AND with some constants
[to-be-committed,RISC-V] Improve AND with some constants
- - - -
-
-
-
2024-05-13
Jeff Law
New
[to-be-committed,RISC-V] Improve single inverted bit extraction - v3
[to-be-committed,RISC-V] Improve single inverted bit extraction - v3
- - - -
-
-
-
2024-05-13
Jeff Law
New
[to-be-committed,RISC-V] Improve single inverted bit extraction - v2
[to-be-committed,RISC-V] Improve single inverted bit extraction - v2
- - - -
-
-
-
2024-05-12
Jeff Law
New
[to-be-committed,RISC-V] Improve single inverted bit extraction
[to-be-committed,RISC-V] Improve single inverted bit extraction
- - - -
-
-
-
2024-05-12
Jeff Law
New
[to-be-committed,RISC-V] Improve usage of slli.uw in constant synthesis
[to-be-committed,RISC-V] Improve usage of slli.uw in constant synthesis
- - - -
-
-
-
2024-05-12
Jeff Law
New
[to-be-committed] RISC-V Fix minor regression in synthesis WRT bseti usage
[to-be-committed] RISC-V Fix minor regression in synthesis WRT bseti usage
- - - -
-
-
-
2024-05-12
Jeff Law
New
[RISC-V] Use shNadd for constant synthesis
[RISC-V] Use shNadd for constant synthesis
- - - -
-
-
-
2024-05-10
Jeff Law
New
[committed,RISC-V] Provide splitting guidance to combine to faciliate shNadd.uw generation
[committed,RISC-V] Provide splitting guidance to combine to faciliate shNadd.uw generation
- - - -
-
-
-
2024-05-08
Jeff Law
New
[committed,RISC-V] Turn on overlap_op_by_pieces for generic-ooo tuning
[committed,RISC-V] Turn on overlap_op_by_pieces for generic-ooo tuning
- - - -
-
-
-
2024-05-07
Jeff Law
New
[committed,RISC-V] Allow uarchs to set TARGET_OVERLAP_OP_BY_PIECES_P
[committed,RISC-V] Allow uarchs to set TARGET_OVERLAP_OP_BY_PIECES_P
- - - -
-
-
-
2024-05-07
Jeff Law
New
[RISC-V,V2] Fix incorrect if-then-else nesting of Zbs usage in constant synthesis
[RISC-V,V2] Fix incorrect if-then-else nesting of Zbs usage in constant synthesis
- - - -
-
-
-
2024-05-07
Jeff Law
New
[RISC-V] Fix incorrect if-then-else nesting of Zbs usage in constant synthesis
[RISC-V] Fix incorrect if-then-else nesting of Zbs usage in constant synthesis
- - - -
-
-
-
2024-05-06
Jeff Law
New
[RFA,RISC-V] Use "uw" forms for constant synthesis
[RFA,RISC-V] Use "uw" forms for constant synthesis
- - - -
-
-
-
2024-05-05
Jeff Law
New
[RFA,RISC-V,v2] Enable inlining str* by default
[RFA,RISC-V,v2] Enable inlining str* by default
- - - -
-
-
-
2024-05-04
Jeff Law
New
[RFA,RISC-V] Enable inlining str* by default
[RFA,RISC-V] Enable inlining str* by default
- - - -
-
-
-
2024-05-03
Jeff Law
New
[committed,RISC-V] Fix nearbyint failure on rv32 and formatting nits
[committed,RISC-V] Fix nearbyint failure on rv32 and formatting nits
- - - -
-
-
-
2024-05-02
Jeff Law
New
[committed,RISC-V] Don't run new rounding tests on newlib risc-v targets
[committed,RISC-V] Don't run new rounding tests on newlib risc-v targets
- - - -
-
-
-
2024-05-02
Jeff Law
New
[committed,RISC-V] Trivial pattern cleanup
[committed,RISC-V] Trivial pattern cleanup
- - - -
-
-
-
2024-05-01
Jeff Law
New
[committed,RISC-V] Fix detection of store pair fusion cases
[committed,RISC-V] Fix detection of store pair fusion cases
- - - -
-
-
-
2024-05-01
Jeff Law
New
[RFA,RISC-V] Improve constant synthesis for constants with 2 bits set
[RFA,RISC-V] Improve constant synthesis for constants with 2 bits set
1 - 1 -
-
-
-
2024-05-01
Jeff Law
New
[committed,RISC-V] Improve floor, ceil & related operations for RISC-V
[committed,RISC-V] Improve floor, ceil & related operations for RISC-V
- - - -
-
-
-
2024-04-30
Jeff Law
New
[committed] RISC-V: Add missing insn types to XiangShan Nanhu scheduler model
[committed] RISC-V: Add missing insn types to XiangShan Nanhu scheduler model
- - - -
-
-
-
2024-03-31
Jeff Law
New
[committed] Fix RISC-V missing stack tie
[committed] Fix RISC-V missing stack tie
- - - -
-
-
-
2024-03-22
Jeff Law
New
[committed,PR,tree-optimization/110199] Simplify MIN/MAX more often
[committed,PR,tree-optimization/110199] Simplify MIN/MAX more often
- - - -
-
-
-
2024-03-10
Jeff Law
New
Reverting recent adjustment to expected output of sh port tests
Reverting recent adjustment to expected output of sh port tests
- - - -
-
-
-
2024-03-10
Jeff Law
New
[committed,PR,target/111362] Fix compare-debug issue with mode switching
[committed,PR,target/111362] Fix compare-debug issue with mode switching
- - - -
-
-
-
2024-03-10
Jeff Law
New
[PR,target/113001] Fix incorrect operand swapping in conditional move
[PR,target/113001] Fix incorrect operand swapping in conditional move
- - - -
-
-
-
2024-03-06
Jeff Law
New
[14,regression] Fix insn types in risc-v port
[14,regression] Fix insn types in risc-v port
- - - -
-
-
-
2024-03-01
Jeff Law
New
[committed] Reasonably handle SUBREGs in risc-v cost modeling
[committed] Reasonably handle SUBREGs in risc-v cost modeling
- - - -
-
-
-
2024-02-04
Jeff Law
New
[committed,NFC] Fix riscv_init_cumulative_args for unused arguments
[committed,NFC] Fix riscv_init_cumulative_args for unused arguments
- - - -
-
-
-
2024-01-21
Jeff Law
New
[RFA,V3] new pass for sign/zero extension elimination
[RFA,V3] new pass for sign/zero extension elimination
- - - -
-
-
-
2024-01-01
Jeff Law
New
[RFA] New pass for sign/zero extension elimination
[RFA] New pass for sign/zero extension elimination
- - - -
-
-
-
2023-11-20
Jeff Law
New
[committed] RISC-V: Infrastructure for instruction fusion
[committed] RISC-V: Infrastructure for instruction fusion
- - - -
-
-
-
2023-11-19
Jeff Law
New
[committed] Fix minor problem in stack probing
[committed] Fix minor problem in stack probing
- - - -
-
-
-
2023-10-16
Jeff Law
New
[committed] RISC-V: NFC: Move scalar block move expansion code into riscv-string.cc
[committed] RISC-V: NFC: Move scalar block move expansion code into riscv-string.cc
- - - -
-
-
-
2023-10-16
Jeff Law
New
[committed] RISC-V: Adjust long unconditional branch sequence
[committed] RISC-V: Adjust long unconditional branch sequence
- - - -
-
-
-
2023-10-11
Jeff Law
New
[committed,PR,target/93062] RISC-V: Handle long conditional branches for RISC-V
[committed,PR,target/93062] RISC-V: Handle long conditional branches for RISC-V
- - - -
-
-
-
2023-10-10
Jeff Law
New
[committed] RISC-V: Use splitter to generate zicond in another case
[committed] RISC-V: Use splitter to generate zicond in another case
- - - -
-
-
-
2023-08-29
Jeff Law
New
[committed] RISC-V: Fix spill-11.c testsuite failure
[committed] RISC-V: Fix spill-11.c testsuite failure
- - - -
-
-
-
2023-08-27
Jeff Law
New
[committed] RISC-V: Fix spill-12 test
[committed] RISC-V: Fix spill-12 test
- - - -
-
-
-
2023-08-27
Jeff Law
New
[committed] RISC-V: Fix xtheadcondmov-indirect.c
[committed] RISC-V: Fix xtheadcondmov-indirect.c
- - - -
-
-
-
2023-08-27
Jeff Law
New
[committed] RISC-V: Make stack_save_restore tests more robust
[committed] RISC-V: Make stack_save_restore tests more robust
- - - -
-
-
-
2023-08-25
Jeff Law
New
[committed] RISC-V: Fix minor testsuite problem with zicond
[committed] RISC-V: Fix minor testsuite problem with zicond
- - - -
-
-
-
2023-08-25
Jeff Law
New
[committed] Improve quality of code from LRA register elimination
[committed] Improve quality of code from LRA register elimination
- - - -
-
-
-
2023-08-23
Jeff Law
New
[committed] RISC-V: Add multiarch support on riscv-linux-gnu
[committed] RISC-V: Add multiarch support on riscv-linux-gnu
- - - -
-
-
-
2023-08-22
Jeff Law
New
[committed,RISC-V] Fix bug in condition canonicalization for zicond
[committed,RISC-V] Fix bug in condition canonicalization for zicond
- - - -
-
-
-
2023-08-08
Jeff Law
New
[committed,RISC-V] Don't reject constants in cmov condition
[committed,RISC-V] Don't reject constants in cmov condition
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2023-08-07
Jeff Law
New
[committed,RISC-V] Avoid sub-word mode comparisons with Zicond
[committed,RISC-V] Avoid sub-word mode comparisons with Zicond
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2023-08-02
Jeff Law
New
[committed,RISC-V] Fix expected diagnostic messages in testsuite
[committed,RISC-V] Fix expected diagnostic messages in testsuite
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2023-07-27
Jeff Law
New
[committed] Enable LRA on several ports
[committed] Enable LRA on several ports
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2023-05-01
Jeff Law
New
[committed,PR,target/109549] Adjust mips test for recent ifcvt costing changes
[committed,PR,target/109549] Adjust mips test for recent ifcvt costing changes
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2023-04-29
Jeff Law
New
[committed,PR,testsuite/109549] Adjust x86 testsuite for recent if-conversion cost checking
[committed,PR,testsuite/109549] Adjust x86 testsuite for recent if-conversion cost checking
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2023-04-21
Jeff Law
New
[RFA,PR,target/108248,RISC-V] Break down some bitmanip insn types
[RFA,PR,target/108248,RISC-V] Break down some bitmanip insn types
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2023-04-20
Jeff Law
New
[committed,PR,target/109508] Adjust conditional move expansion for SFB
[committed,PR,target/109508] Adjust conditional move expansion for SFB
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2023-04-16
Jeff Law
New
[RFA,Bug,target/108892,13,regression] Force re-recognition after changing RTL structure of an insn
[RFA,Bug,target/108892,13,regression] Force re-recognition after changing RTL structure of an insn
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2023-03-29
Jeff Law
New
[committed] Fix comment typos noticed by Bernhard
[committed] Fix comment typos noticed by Bernhard
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2022-11-22
Jeff Law
New
[committed,RISC-V] Fix recent rvv/base/spill testcase failures
[committed,RISC-V] Fix recent rvv/base/spill testcase failures
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2022-11-22
Jeff Law
New
[committed,PR,other/104044] Remove extraneous semicolons
[committed,PR,other/104044] Remove extraneous semicolons
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2022-11-20
Jeff Law
New
[committed] Fix test to not depend on DECL_UIDs
[committed] Fix test to not depend on DECL_UIDs
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2022-11-20
Jeff Law
New
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