Show patches with: Submitter = Xi Ruoyao       |    State = Action Required       |    Archived = No       |   296 patches
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Patch Series A/F/R/T S/W/F Date Submitter Delegate State
ext-dce: Only transform extend to subreg if TRULY_NOOP_TRUNCATION [PR 120050] ext-dce: Only transform extend to subreg if TRULY_NOOP_TRUNCATION [PR 120050] - - - - --- 2025-05-12 Xi Ruoyao New
LoongArch: Make gen-evolution.awk compatible with FreeBSD awk LoongArch: Make gen-evolution.awk compatible with FreeBSD awk - - - - --- 2025-04-02 Xi Ruoyao New
[gcc-14] Reuse scratch registers generated by LRA [gcc-14] Reuse scratch registers generated by LRA - - - - --- 2025-03-27 Xi Ruoyao New
LoongArch: Add ABI names for FPR LoongArch: Add ABI names for FPR - - - - --- 2025-03-16 Xi Ruoyao New
LoongArch: Don't use C++17 feature [PR119238] LoongArch: Don't use C++17 feature [PR119238] - - - - --- 2025-03-12 Xi Ruoyao New
LoongArch: Fix ICE when trying to recognize bitwise + alsl.w pair [PR119127] LoongArch: Fix ICE when trying to recognize bitwise + alsl.w pair [PR119127] - - - - --- 2025-03-10 Xi Ruoyao New
LoongArch: Fix incorrect reorder of __lsx_vldx and __lasx_xvldx [PR119084] LoongArch: Fix incorrect reorder of __lsx_vldx and __lasx_xvldx [PR119084] - - - - --- 2025-03-03 Xi Ruoyao New
[17/17] LoongArch: Implement 16-byte atomic add, sub, and, or, xor, and nand with sc.q LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[16/17] LoongArch: Implement 16-byte atomic exchange with sc.q LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[15/17] LoongArch: Implement 16-byte CAS with sc.q LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[14/17] LoongArch: Implement 16-byte atomic store with sc.q LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[13/17] LoongArch: Add -m[no-]scq option LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[12/17] LoongArch: Implement 16-byte atomic store with LSX LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[11/17] LoongArch: Implement 16-byte atomic load with LSX LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[10/17] LoongArch: Implement atomic_fetch_nand<GPR:mode> LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[09/17] LoongArch: Don't expand atomic_fetch_sub_{hi, qi} to LL-SC loop if -mlam-bh LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[08/17] LoongArch: Implement subword atomic_fetch_{and, or, xor} with am*.w instructions LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[07/17] LoongArch: Remove unneeded "andi offset, addr, 3" instruction in atomic_test_and_set LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[06/17] LoongArch: Remove unneeded "b 3f" instruction after LL-SC loops LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[05/17] LoongArch: Don't emit overly-restrictive barrier for LL-SC loops LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[04/17] LoongArch: Allow using bstrins for masking the address in atomic_test_and_set LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[03/17] LoongArch: Don't use "+" for atomic_{load, store} "m" constraint LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[02/17] LoongArch: (NFC) Remove amo and use size instead LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
[01/17] LoongArch: (NFC) Remove atomic_optab and use amop instead LoongArch: Clean up atomic operations and implement 16-byte atomic operations - - - - --- 2025-03-01 Xi Ruoyao New
LoongArch: Add a dedicated pattern for bitwise + alsl LoongArch: Add a dedicated pattern for bitwise + alsl - - - - --- 2025-03-01 Xi Ruoyao New
LoongArch: Avoid unnecessary zero-initialization using LSX for scalar popcount LoongArch: Avoid unnecessary zero-initialization using LSX for scalar popcount - - - - --- 2025-02-22 Xi Ruoyao New
LoongArch: Use normal RTL pattern instead of UNSPEC for {x, }vsr{a, l}ri instructions LoongArch: Use normal RTL pattern instead of UNSPEC for {x, }vsr{a, l}ri instructions - - - - --- 2025-02-14 Xi Ruoyao New
[v3,8/8] LoongArch: Implement [su]dot_prod* for LSX and LASX modes LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-14 Xi Ruoyao New
[v3,7/8] LoongArch: Implement vec_widen_mult_{even, odd}_* for LSX and LASX modes LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-14 Xi Ruoyao New
[v3,6/8] LoongArch: Simplify lsx_vpick description LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-14 Xi Ruoyao New
[v3,5/8] LoongArch: Simplify {lsx_,lasx_x}vmaddw description LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-14 Xi Ruoyao New
[v3,4/8] LoongArch: Simplify {lsx_, lasx_x}vh{add, sub}w description LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-14 Xi Ruoyao New
[v3,3/8] LoongArch: Simplify {lsx_, lasx_x}v{add, sub, mul}l{ev, od} description LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-14 Xi Ruoyao New
[v3,2/8] LoongArch: Allow moving TImode vectors LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-14 Xi Ruoyao New
[v3,1/8] LoongArch: Try harder using vrepli instructions to materialize const vectors LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-14 Xi Ruoyao New
[v2,8/8] LoongArch: Implement [su]dot_prod* for LSX and LASX modes LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-13 Xi Ruoyao New
[v2,7/8] LoongArch: Implement vec_widen_mult_{even, odd}_* for LSX and LASX modes LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-13 Xi Ruoyao New
[v2,6/8] LoongArch: Simplify lsx_vpick description LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-13 Xi Ruoyao New
[v2,5/8] LoongArch: Simplify {lsx_,lasx_x}vmaddw description LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-13 Xi Ruoyao New
[v2,4/8] LoongArch: Simplify {lsx_, lasx_x}vh{add, sub}w description LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-13 Xi Ruoyao New
[v2,3/8] LoongArch: Simplify {lsx_, lasx_x}v{add, sub, mul}l{ev, od} description LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-13 Xi Ruoyao New
[v2,2/8] LoongArch: Allow moving TImode vectors LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-13 Xi Ruoyao New
[v2,1/8] LoongArch: Try harder using vrepli instructions to materialize const vectors LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-13 Xi Ruoyao New
LoongArch: Accept ADD, IOR or XOR when combining objects with no bits in common [PR115478] LoongArch: Accept ADD, IOR or XOR when combining objects with no bits in common [PR115478] - - - - --- 2025-02-11 Xi Ruoyao New
[8/8] LoongArch: Implement [su]dot_prod* for LSX and LASX modes LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-07 Xi Ruoyao New
[7/8] LoongArch: Implement vec_widen_mult_{even, odd}_* for LSX and LASX modes LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-07 Xi Ruoyao New
[6/8] LoongArch: Simplify {lsx,lasx_x}vpick description LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-07 Xi Ruoyao New
[5/8] LoongArch: Simplify {lsx_,lasx_x}maddw description LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-07 Xi Ruoyao New
[4/8] LoongArch: Simplify {lsx_, lasx_x}hv{add, sub}w description LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-07 Xi Ruoyao New
[3/8] LoongArch: Simplify {lsx_, lasx_x}v{add, sub, mul}l{ev, od} description LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-07 Xi Ruoyao New
[2/8] LoongArch: Allow moving TImode vectors LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-07 Xi Ruoyao New
[1/8] LoongArch: Try harder using vrepli instructions to materialize const vectors LoongArch: SIMD odd/even/horizontal widening arithmetic cleanup and optimization - - - - --- 2025-02-07 Xi Ruoyao New
testsuite: LoongArch: Remove from btrunc, ceil, and floor effective target allowlist testsuite: LoongArch: Remove from btrunc, ceil, and floor effective target allowlist - - - - --- 2025-02-07 Xi Ruoyao New
testsuite: Fix up toplevel-asm-1.c for LoongArch testsuite: Fix up toplevel-asm-1.c for LoongArch - - - - --- 2025-02-05 Xi Ruoyao New
vect: Fix wrong code with pr108692.c on targets with only non-widening ABD [PR118727] vect: Fix wrong code with pr108692.c on targets with only non-widening ABD [PR118727] - - - - --- 2025-02-05 Xi Ruoyao New
[5/5] LoongArch: Remove "b 3f" instruction if unneeded LoongArch: Atomic operation clean-up and micro-optimization - - - - --- 2025-01-22 Xi Ruoyao New
[4/5] LoongArch: Don't emit overly-restrictive barrier for LL-SC loops LoongArch: Atomic operation clean-up and micro-optimization - - - - --- 2025-01-22 Xi Ruoyao New
[3/5] LoongArch: Allow using bstrins for masking the address in atomic_test_and_set LoongArch: Atomic operation clean-up and micro-optimization - - - - --- 2025-01-22 Xi Ruoyao New
[2/5] LoongArch: Don't use "+" for atomic_{load, store} "m" constraint LoongArch: Atomic operation clean-up and micro-optimization - - - - --- 2025-01-22 Xi Ruoyao New
[1/5] LoongArch: (NFC) Remove atomic_optab and use amop instead LoongArch: Atomic operation clean-up and micro-optimization - - - - --- 2025-01-22 Xi Ruoyao New
LoongArch: Fix invalid subregs in xorsign [PR118501] LoongArch: Fix invalid subregs in xorsign [PR118501] - - - - --- 2025-01-22 Xi Ruoyao New
[2/2] LoongArch: Partially fix code regression from r15-7062 LoongArch: Bitwise and shift reassoc fixes - - - - --- 2025-01-22 Xi Ruoyao New
[1/2] LoongArch: Fix wrong code with <optab>_alsl_reversesi_extended LoongArch: Bitwise and shift reassoc fixes - - - - --- 2025-01-22 Xi Ruoyao New
LoongArch: Correct the mode for mask{eq,ne}z LoongArch: Correct the mode for mask{eq,ne}z - - - - --- 2025-01-20 Xi Ruoyao New
[v2,2/2] LoongArch: Improve reassociation for bitwise operation and left shift [PR 115921] [v2,1/2] LoongArch: Simplify using bstr{ins, pick} instructions for and - - - - --- 2025-01-18 Xi Ruoyao New
[v2,1/2] LoongArch: Simplify using bstr{ins, pick} instructions for and [v2,1/2] LoongArch: Simplify using bstr{ins, pick} instructions for and - - - - --- 2025-01-18 Xi Ruoyao New
[2/2] LoongArch: Improve reassociation for bitwise operation and left shift [PR 115921] [1/2] LoongArch: Simplify using bstr{ins, pick} instructions for and - - - - --- 2025-01-15 Xi Ruoyao New
[1/2] LoongArch: Simplify using bstr{ins, pick} instructions for and [1/2] LoongArch: Simplify using bstr{ins, pick} instructions for and - - - - --- 2025-01-15 Xi Ruoyao New
LoongArch: Fix cost model for alsl LoongArch: Fix cost model for alsl - - - - --- 2025-01-15 Xi Ruoyao New
LoongArch: Add alsl.wu LoongArch: Add alsl.wu - - - - --- 2025-01-15 Xi Ruoyao New
[2/2] RISC-V: Remove zba check in bitwise and ashift reassociation [PR 115921] RISC-V bitwise-ashift reassoc improvements [PR 115921] - - - - --- 2025-01-12 Xi Ruoyao New
[1/2] RISC-V: Improve bitwise and ashift reassociation for single-bit immediate without zbs [PR 115… RISC-V bitwise-ashift reassoc improvements [PR 115921] - - - - --- 2025-01-12 Xi Ruoyao New
[5/5] LoongArch: Add crc tests LoongArch: CRC optimization - - - - --- 2024-12-16 Xi Ruoyao New
[4/5] LoongArch: Combine xor and crc instructions LoongArch: CRC optimization - - - - --- 2024-12-16 Xi Ruoyao New
[3/5] LoongArch: Add CRC expander to generate faster CRC LoongArch: CRC optimization - - - - --- 2024-12-16 Xi Ruoyao New
[2/5] LoongArch: Add bit reverse operations LoongArch: CRC optimization - - - - --- 2024-12-16 Xi Ruoyao New
[1/5] LoongArch: Remove QHSD and use QHWD instead LoongArch: CRC optimization - - - - --- 2024-12-16 Xi Ruoyao New
pa: Remove pa_section_type_flags pa: Remove pa_section_type_flags - - - - --- 2024-11-21 Xi Ruoyao New
LoongArch: Add backward compatibility for signed vector arguments calling LSX/LASX vorn builtins LoongArch: Add backward compatibility for signed vector arguments calling LSX/LASX vorn builtins - - - - --- 2024-11-02 Xi Ruoyao New
Pushed: [PATCH] LoongArch: testsuite: Add -O for jump-table-annotate.c Pushed: [PATCH] LoongArch: testsuite: Add -O for jump-table-annotate.c - - - - --- 2024-11-01 Xi Ruoyao New
testsuite: Fix up builtin-prefetch-1.c tests testsuite: Fix up builtin-prefetch-1.c tests - - - - --- 2024-11-01 Xi Ruoyao New
LoongArch: Make __builtin_lsx_vorn_v and __builtin_lasx_xvorn_v arguments and return values unsigned LoongArch: Make __builtin_lsx_vorn_v and __builtin_lasx_xvorn_v arguments and return values unsigned - - - - --- 2024-10-31 Xi Ruoyao New
Always set SECTION_RELRO for or .data.rel.ro{, .local} [PR116887] Always set SECTION_RELRO for or .data.rel.ro{, .local} [PR116887] - - - - --- 2024-10-10 Xi Ruoyao New
vect: Fix STMT_VINFO_DEF_TYPE check for odd/even widen mult [PR116348] vect: Fix STMT_VINFO_DEF_TYPE check for odd/even widen mult [PR116348] - - - - --- 2024-08-25 Xi Ruoyao New
vect: Fix vect_reduction_def check for odd/even widen mult [PR116142] vect: Fix vect_reduction_def check for odd/even widen mult [PR116142] - - - - --- 2024-08-07 Xi Ruoyao New
LoongArch: Relax ins_zero_bitmask_operand and remove and<mode>3_align LoongArch: Relax ins_zero_bitmask_operand and remove and<mode>3_align - - - - --- 2024-07-29 Xi Ruoyao New
LoongArch: Rework bswap{hi,si,di}2 definition LoongArch: Rework bswap{hi,si,di}2 definition - - - - --- 2024-07-29 Xi Ruoyao New
LoongArch: Expand some SImode operations through "si3_extend" instructions if TARGET_64BIT LoongArch: Expand some SImode operations through "si3_extend" instructions if TARGET_64BIT - - - - --- 2024-07-26 Xi Ruoyao New
[v2] LoongArch: Add support to annotate tablejump [v2] LoongArch: Add support to annotate tablejump - - - - --- 2024-07-18 Xi Ruoyao New
LoongArch: Implement scalar isinf, isnormal, and isfinite via fclass LoongArch: Implement scalar isinf, isnormal, and isfinite via fclass - - - - --- 2024-07-11 Xi Ruoyao New
LoongArch: Add support to annotate tablejump LoongArch: Add support to annotate tablejump - - - - --- 2024-07-11 Xi Ruoyao New
Pushed: [PATCH] doc: gccint: Fix typos in jump_table_data description Pushed: [PATCH] doc: gccint: Fix typos in jump_table_data description - - - - --- 2024-06-25 Xi Ruoyao New
LoongArch: NFC: Dedup and sort the comment in loongarch_print_operand_reloc LoongArch: NFC: Dedup and sort the comment in loongarch_print_operand_reloc - - - - --- 2024-06-16 Xi Ruoyao New
[v2] LoongArch: Tweak IOR rtx_cost for bstrins [v2] LoongArch: Tweak IOR rtx_cost for bstrins - - - - --- 2024-06-15 Xi Ruoyao New
LoongArch: Only transform move/move/bstrins to srai/bstrins when -Os LoongArch: Only transform move/move/bstrins to srai/bstrins when -Os - - - - --- 2024-06-15 Xi Ruoyao New
LoongArch: Tweak IOR rtx_cost for bstrins LoongArch: Tweak IOR rtx_cost for bstrins - - - - --- 2024-06-15 Xi Ruoyao New
LoongArch: Fix mode size comparision in loongarch_expand_conditional_move LoongArch: Fix mode size comparision in loongarch_expand_conditional_move - - - - --- 2024-06-12 Xi Ruoyao New
LoongArch: Use bstrins for "value & (-1u << const)" LoongArch: Use bstrins for "value & (-1u << const)" - - - - --- 2024-06-09 Xi Ruoyao New
pushed: wwwdocs: [PATCH] gcc-14/changes: Fix mislocated </code> in RISC-V changes pushed: wwwdocs: [PATCH] gcc-14/changes: Fix mislocated </code> in RISC-V changes - - - - --- 2024-06-05 Xi Ruoyao New
LoongArch: Guard REGNO with REG_P in loongarch_expand_conditional_move [PR115169] LoongArch: Guard REGNO with REG_P in loongarch_expand_conditional_move [PR115169] - - - - --- 2024-05-22 Xi Ruoyao New
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