From patchwork Fri Nov 8 19:26:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Meissner X-Patchwork-Id: 2008736 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=CtQzL5Rq; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4XlTTh3xHmz1xy5 for ; Sat, 9 Nov 2024 06:27:01 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 88223385840D for ; Fri, 8 Nov 2024 19:26:53 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by sourceware.org (Postfix) with ESMTPS id 1D9DE3858D21 for ; Fri, 8 Nov 2024 19:26:14 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 1D9DE3858D21 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=linux.ibm.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 1D9DE3858D21 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=148.163.158.5 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1731093977; cv=none; b=VmFig/xowY9Ui5h1cwoIagau8qkFvn9Aojmozx/l5/d7wWCdhvQ+oLsVI5K+keZBPqIuPJQk/I1tkuqRvU4g2mrpNacoa4o5rF4tj9BQl3lXmT8ZxGvG8fMg2//mpCu60Q5NqbYdZPwl7VlGVbxMBy0F1FDq8dB3B+fpGe0hyFo= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1731093977; c=relaxed/simple; bh=pjcgKFnVIxB8gYDpPk53tZrgNm4Aorh/EdWJNfnbtjo=; h=DKIM-Signature:Date:From:To:Subject:Message-ID:MIME-Version; b=lzPA56/vjhFMZoHMWX68kVIWAL2uXSiBO3xfMG/2x8yzO3F+kd9kAQOKFnMOmu3dzDEOJ98FQvtetKpqFue5NH4KpLsIypQorVhY4smMTiKe6sCjftpBcKPIndrlkNzdY2T22A5IGtpQHOB7PBv6Hb59XmOpAM+4KRPqTLKmn5o= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from pps.filterd (m0353725.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4A8JAUis023657; Fri, 8 Nov 2024 19:26:13 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h= content-type:date:from:message-id:mime-version:subject:to; s= pp1; bh=JehDXzhgxLtEDuvIo9R05fgpx3XWG9mflQA9p0IMWYw=; b=CtQzL5Rq yhWARy37jrDGdMThq8jADvXLRv2u3Qk5tUr3hJxEYOxOUiD0RJsMDmrfz3/zGPNn zAprasUGt+mugtDO1NwVBzFkywFtijp8nTz6Arxrf1/7rvxfgQNPlfKb4id67ykQ tcgdGmS74Dl+k3Q1k69rfaDC+NM5zbKt51dl0uZJCmzwCSnrif5xB4b10lDwQZEB 6WqyqvzO2iyS35OXdBhlTohKxg6DUixrXs/D4j8JUkKpdCPWIWQdMFUUNHr21FfQ JMLKk4mK4d9rnI3s+tZaT9EyJ+7gqxGPJO7Fv9N04jwH+Sl926InOmVYBsCSNXe8 L2GLw1o2WSRWNA== Received: from ppma12.dal12v.mail.ibm.com (dc.9e.1632.ip4.static.sl-reverse.com [50.22.158.220]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 42srjdr274-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 08 Nov 2024 19:26:13 +0000 (GMT) Received: from pps.filterd (ppma12.dal12v.mail.ibm.com [127.0.0.1]) by ppma12.dal12v.mail.ibm.com (8.18.1.2/8.18.1.2) with ESMTP id 4A8IjMWG024707; Fri, 8 Nov 2024 19:26:12 GMT Received: from smtprelay04.wdc07v.mail.ibm.com ([172.16.1.71]) by ppma12.dal12v.mail.ibm.com (PPS) with ESMTPS id 42nxdsax7k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 08 Nov 2024 19:26:12 +0000 Received: from smtpav03.wdc07v.mail.ibm.com (smtpav03.wdc07v.mail.ibm.com [10.39.53.230]) by smtprelay04.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 4A8JQBdY33751640 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 8 Nov 2024 19:26:11 GMT Received: from smtpav03.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 537A65805C; Fri, 8 Nov 2024 19:26:11 +0000 (GMT) Received: from smtpav03.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CE4BC58054; Fri, 8 Nov 2024 19:26:10 +0000 (GMT) Received: from cowardly-lion.the-meissners.org (unknown [9.61.109.186]) by smtpav03.wdc07v.mail.ibm.com (Postfix) with ESMTPS; Fri, 8 Nov 2024 19:26:10 +0000 (GMT) Date: Fri, 8 Nov 2024 14:26:09 -0500 From: Michael Meissner To: gcc-patches@gcc.gnu.org, Michael Meissner , Segher Boessenkool , Peter Bergner Subject: [PATCH V2 0/11] Separate PowerPC archiecture bits from ISA flags that use command line options Message-ID: Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , Peter Bergner Content-Disposition: inline X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: GMETbG7NxnrnVIJk0rAOkGWnvjOlHag_ X-Proofpoint-GUID: GMETbG7NxnrnVIJk0rAOkGWnvjOlHag_ X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1051,Hydra:6.0.680,FMLib:17.12.62.30 definitions=2024-10-15_01,2024-10-11_01,2024-09-30_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 lowpriorityscore=0 mlxlogscore=569 priorityscore=1501 impostorscore=0 clxscore=1015 adultscore=0 phishscore=0 spamscore=0 bulkscore=0 suspectscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411080157 X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org These patches are a clean up in the PowerPC port to move architecture bits that are not user ISA options from rs6000_isa_flags to a new targt variable rs6000_arch_flags. The intention is to remove switches that are currently isa options, but the user should not be using this particular option. For example, we want users to use -mcpu=power10 and not just -mpower10. This is version 2 of my patches. The difference between this patch and the previous patch is if you configure a GCC compiler on a little endian server without using --with-cpu, the previous patch would set the .machine option to powerpc. This patch now sets the .machine option to power8, which is the minimum ISA level for little endian 32-bit. The previous patches were at: https://gcc.gnu.org/pipermail/gcc-patches/2024-October/666529.html There are 11 patches in this series. I have tested these patches on both little endian and big endian systems and there are no regressions. Can I apply these patches to the trunk? I don't see the need to backport these changes to the earlier branches, but if desired I can do that. The patches are: Patch #1: This patch sets up the infrastructure to have a separate architecture flags. It moves the target_clones attribute to use this new architecture flags. The generation of ".machine" now also uses this table. Patch #2: For newer PowerPC architectures, the architecture flags are used for defining '_ARCH_PWR' instead of the isa flags. The -mpower10 and -mpower11 options are removed. Patch #3: The code is restructured so that -mvsx does not convert the processor to power7. Thus using -mvsx is not allowed unless the user uses -mcpu=power7 or later. Patch #4: Change uses of TARGET_POPCNTB to TARGET_POWER5. Patch #5: Change uses of TARGET_FPRND to TARGET_POWER5X. Patch #6: Change uses of TARGET_CMPB to TARGET_POWER6. Patch #7: Change uses of TARGET_POPCNTD to TARGET_POWER7. Patch #8: Change uses of TARGET_MODULO to TARGET_POWER9. Patch #9: Rework tests that use -mvsx to raise the cpu to power7 to explicitly add an appropriate #pragma to force the code generation to a power7. Patch #10: Add support for a -mcpu=future option. Patch #11: Make -mtune=future (and -mcpu=future without an explicit -mtune= option) automatically schedudle insns like -mtune=power10 or -mtune=power11.