Message ID | jMo1gqrFLL2HrK9ABTTFMguCNpaq-ihftP0FiQSOr2Xi-9D4fvg82c3ZJ49bEto4oq66FNCHWi65z5gdsvzZfaRwsrav_BRdH-CffLOBVL4=@protonmail.com |
---|---|
State | New |
Headers | show |
Series | Opinions on it87spi.c hack to support IT8686E? | expand |
Hey Pete, Send the patch to gerrit, some support seems better than no support imho. Kind regards, Edward. On Sat, 9 Jan 2021 at 08:06, Pete Smith via flashrom <flashrom@flashrom.org> wrote: > > Hi, > > I have a a GIGABYTE GA-H270N-WIFI motherboard with DualBIOS feature. > Flashrom 1.2 is unable to select between the two flash chips with > dualbiosindex parameter, as the Super I/O chip (ITE IT8686E) is > unsupported: > > "Super I/O ID 0x8686 is not on the list of flash-capable controllers." > > In a naive attempt, I just tried to add the chip ID to the list: > > --- a/it87spi.c > +++ b/it87spi.c > @@ -256,6 +256,7 @@ int init_superio_ite(void) > case 0x8718: > case 0x8720: > case 0x8728: > + case 0x8686: > ret |= it87spi_probe(superios[i].port); > break; > default: > > This modification made flashrom able to select between the flash chips: > > # flashrom -p internal:dualbiosindex= > DualBIOS: Selected chip: 0 > > # flashrom -p internal:dualbiosindex=1 > DualBIOS: Selected chip: 1 > > # flashrom -p internal:dualbiosindex= > DualBIOS: Selected chip: 1 > > Reading the flash content also seems to work: > > # flashrom -p internal:dualbiosindex=0 -r M_BIOS.bin > Enabling flash write... SPI Configuration is locked down. > Enabling hardware sequencing because some important opcode is locked. > OK. > DualBIOS: Selected chip: 0 > Found Programmer flash chip "Opaque flash chip" (16384 kB, > Programmer-specific) mapped at physical address 0x0000000000000000. > Reading flash... done. > > # flashrom -p internal:dualbiosindex=1 -r B_BIOS.bin > Enabling flash write... SPI Configuration is locked down. > Enabling hardware sequencing because some important opcode is locked. > OK. > DualBIOS: Selected chip: 1 > Found Programmer flash chip "Opaque flash chip" (16384 kB, > Programmer-specific) mapped at physical address 0x0000000000000000. > Reading flash... done. > > Comparing the two firmware dumps, I find the only difference is that > M_BIOS.bin contains my current BIOS settings which B_BIOS.bin does not, > so I'm quite sure that these dumps are actually from two different > flash chips. > > However, if enabling verbose (-VV) output while reading flash, I also > see this message, which I don't know if normal or not: > > "No IT87* serial flash segment enabled." > > I have not yet tried writing to any of the flash chips, as I would > really appreciate if someone with more experience than me could comment > on this modification first, and maybe highlight problems I'm not > currently aware of? > > Thanks in advance. > > > Best regards, > Pete Smith > _______________________________________________ > flashrom mailing list -- flashrom@flashrom.org > To unsubscribe send an email to flashrom-leave@flashrom.org
--- a/it87spi.c +++ b/it87spi.c @@ -256,6 +256,7 @@ int init_superio_ite(void) case 0x8718: case 0x8720: case 0x8728: + case 0x8686: ret |= it87spi_probe(superios[i].port); break; default: