Message ID | 5186bb9c7feebb87136eb5e5e117fb1142dba4c2.1731296803.git.unicorn_wang@outlook.com |
---|---|
State | Changes Requested |
Headers | show |
Series | irqchip: Add Sophgo SG2042 MSI controller | expand |
Context | Check | Description |
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robh/checkpatch | success | |
robh/patch-applied | success | |
robh/dtbs-check | warning | build log |
robh/dt-meta-schema | success |
On Mon, Nov 11, 2024 at 12:01:36PM +0800, Chen Wang wrote: > From: Chen Wang <unicorn_wang@outlook.com> > > Add binding for Sophgo SG2042 MSI controller. > > Signed-off-by: Chen Wang <unicorn_wang@outlook.com> > --- > .../sophgo,sg2042-msi.yaml | 78 +++++++++++++++++++ > 1 file changed, 78 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml > new file mode 100644 > index 000000000000..9fe99b74c211 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml > @@ -0,0 +1,78 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/sophgo,sg2042-msi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sophgo SG2042 MSI Controller > + > +maintainers: > + - Chen Wang <unicorn_wang@outlook.com> > + > +description: > + This interrupt controller is in Sophgo SG2042 for transforming interrupts from > + PCIe MSI to PLIC interrupts. > + > +allOf: > + - $ref: /schemas/interrupts.yaml# > + - $ref: /schemas/interrupt-controller/msi-controller.yaml# > + > +properties: > + compatible: > + const: sophgo,sg2042-msi > + > + reg: > + items: > + - description: clear register > + > + reg-names: > + items: > + - const: clr > + > + sophgo,msi-doorbell-addr: > + description: > + u64 value of the MSI doorbell address > + $ref: /schemas/types.yaml#/definitions/uint64 Why not use a 'reg' entry? In any case, this should be a translatable address (i.e. honor #address-cells/#size-cells and ranges). > + > + sophgo,msi-base-vec: > + description: > + u32 value of the base of parent PLIC vector allocated > + to MSI. > + $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 64 > + maximum: 95 > + > + sophgo,msi-num-vecs: > + description: > + u32 value of the number of parent PLIC vectors allocated > + to MSI. > + $ref: /schemas/types.yaml#/definitions/uint32 > + minimum: 1 > + maximum: 32 Use 'msi-ranges' for these. > + > + msi-controller: true > + > +required: > + - compatible > + - reg > + - reg-names > + - msi-controller > + - sophgo,msi-doorbell-addr > + - sophgo,msi-base-vec > + - sophgo,msi-num-vecs > + > +additionalProperties: true > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/irq.h> > + msi: msi-controller@30000000 { > + compatible = "sophgo,sg2042-msi"; > + reg = <0x30000000 0x4>; > + reg-names = "clr"; > + msi-controller; > + sophgo,msi-doorbell-addr = <0x00000070 0x30010300>; > + sophgo,msi-base-vec = <64>; > + sophgo,msi-num-vecs = <32>; > + interrupt-parent = <&plic>; > + }; > -- > 2.34.1 >
On 2024/11/12 23:52, Rob Herring wrote: > On Mon, Nov 11, 2024 at 12:01:36PM +0800, Chen Wang wrote: >> From: Chen Wang <unicorn_wang@outlook.com> >> >> Add binding for Sophgo SG2042 MSI controller. >> >> Signed-off-by: Chen Wang <unicorn_wang@outlook.com> >> --- >> .../sophgo,sg2042-msi.yaml | 78 +++++++++++++++++++ >> 1 file changed, 78 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml >> >> diff --git a/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml >> new file mode 100644 >> index 000000000000..9fe99b74c211 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml >> @@ -0,0 +1,78 @@ >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/interrupt-controller/sophgo,sg2042-msi.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Sophgo SG2042 MSI Controller >> + >> +maintainers: >> + - Chen Wang <unicorn_wang@outlook.com> >> + >> +description: >> + This interrupt controller is in Sophgo SG2042 for transforming interrupts from >> + PCIe MSI to PLIC interrupts. >> + >> +allOf: >> + - $ref: /schemas/interrupts.yaml# >> + - $ref: /schemas/interrupt-controller/msi-controller.yaml# >> + >> +properties: >> + compatible: >> + const: sophgo,sg2042-msi >> + >> + reg: >> + items: >> + - description: clear register >> + >> + reg-names: >> + items: >> + - const: clr >> + >> + sophgo,msi-doorbell-addr: >> + description: >> + u64 value of the MSI doorbell address >> + $ref: /schemas/types.yaml#/definitions/uint64 > Why not use a 'reg' entry? > > In any case, this should be a translatable address (i.e. honor > #address-cells/#size-cells and ranges). This is just a address to write MSI data, but not a register for driver access. So I think it seems better to configure it separately, rather than as other registers. This address does not need ioremap. What do you think? I would like to hear your opinion. Regards Chen >> + >> + sophgo,msi-base-vec: >> + description: >> + u32 value of the base of parent PLIC vector allocated >> + to MSI. >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + minimum: 64 >> + maximum: 95 >> + >> + sophgo,msi-num-vecs: >> + description: >> + u32 value of the number of parent PLIC vectors allocated >> + to MSI. >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + minimum: 1 >> + maximum: 32 > Use 'msi-ranges' for these. Got, will fix this and thanks. >> + >> + msi-controller: true >> + >> +required: >> + - compatible >> + - reg >> + - reg-names >> + - msi-controller >> + - sophgo,msi-doorbell-addr >> + - sophgo,msi-base-vec >> + - sophgo,msi-num-vecs >> + >> +additionalProperties: true >> + >> +examples: >> + - | >> + #include <dt-bindings/interrupt-controller/irq.h> >> + msi: msi-controller@30000000 { >> + compatible = "sophgo,sg2042-msi"; >> + reg = <0x30000000 0x4>; >> + reg-names = "clr"; >> + msi-controller; >> + sophgo,msi-doorbell-addr = <0x00000070 0x30010300>; >> + sophgo,msi-base-vec = <64>; >> + sophgo,msi-num-vecs = <32>; >> + interrupt-parent = <&plic>; >> + }; >> -- >> 2.34.1 >>
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml new file mode 100644 index 000000000000..9fe99b74c211 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/sophgo,sg2042-msi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SG2042 MSI Controller + +maintainers: + - Chen Wang <unicorn_wang@outlook.com> + +description: + This interrupt controller is in Sophgo SG2042 for transforming interrupts from + PCIe MSI to PLIC interrupts. + +allOf: + - $ref: /schemas/interrupts.yaml# + - $ref: /schemas/interrupt-controller/msi-controller.yaml# + +properties: + compatible: + const: sophgo,sg2042-msi + + reg: + items: + - description: clear register + + reg-names: + items: + - const: clr + + sophgo,msi-doorbell-addr: + description: + u64 value of the MSI doorbell address + $ref: /schemas/types.yaml#/definitions/uint64 + + sophgo,msi-base-vec: + description: + u32 value of the base of parent PLIC vector allocated + to MSI. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 64 + maximum: 95 + + sophgo,msi-num-vecs: + description: + u32 value of the number of parent PLIC vectors allocated + to MSI. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 1 + maximum: 32 + + msi-controller: true + +required: + - compatible + - reg + - reg-names + - msi-controller + - sophgo,msi-doorbell-addr + - sophgo,msi-base-vec + - sophgo,msi-num-vecs + +additionalProperties: true + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + msi: msi-controller@30000000 { + compatible = "sophgo,sg2042-msi"; + reg = <0x30000000 0x4>; + reg-names = "clr"; + msi-controller; + sophgo,msi-doorbell-addr = <0x00000070 0x30010300>; + sophgo,msi-base-vec = <64>; + sophgo,msi-num-vecs = <32>; + interrupt-parent = <&plic>; + };