@@ -95,6 +95,14 @@ config BR2_ARM_CPU_ARMV8A
bool
select BR2_USE_MMU
+# Armv9.0-A base specification is a super-set of Armv8.5-A. It is
+# fully compatible with Armv8. This symbol is defined to allow checks
+# for doing Armv9 optimization. Armv8 is also selected for
+# compatibility.
+config BR2_ARM_CPU_ARMV9A
+ bool
+ select BR2_ARM_CPU_ARMV8A
+
choice
prompt "Target Architecture Variant"
default BR2_cortex_a53 if BR2_ARCH_IS_64
@@ -488,6 +496,14 @@ config BR2_saphira
select BR2_ARM_CPU_HAS_FP_ARMV8
select BR2_ARM_CPU_ARMV8A
select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
+
+comment "armv9.0a cores"
+config BR2_neoverse_n2
+ bool "neoverse-N2 (aka perseus)"
+ depends on BR2_ARCH_IS_64
+ select BR2_ARM_CPU_HAS_FP_ARMV8
+ select BR2_ARM_CPU_ARMV9A
+ select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
endchoice
config BR2_ARM_ENABLE_NEON
@@ -880,6 +896,8 @@ config BR2_GCC_TARGET_CPU
default "tsv110" if BR2_tsv110
# armv8.4a
default "saphira" if BR2_saphira
+ # armv9.0a
+ default "neoverse-n2" if BR2_neoverse_n2
config BR2_GCC_TARGET_ABI
default "aapcs-linux" if BR2_arm || BR2_armeb
This commit adds the Neoverse N2 core, which is a armv9.0a ISA. See: [1] [2]. This CPU support was added in GCC 11. See [3]. The Neoverse N2 CPU is included in the Arm sbsa-ref platform in Qemu. The Armv9.0-A Buildroot support will be needed to update those SBSA related components. See the note in commit log [4]. This commit introduces the BR2_ARM_CPU_ARMV9A Kconfig symbol, which just selects BR2_ARM_CPU_ARMV8A. This is because Armv9.0-A is a superset of Armv8.5-A. This symbol can help package recipes to detect this new base architecture. Neoverse-N2 support has been added in QEmu in commit [5], first included in v8.2.0. This CPU supports Aarch32 only in EL0 (user-space). This means it's technically possible to compile Aarch32 code targeting it. GCC has the support to do so. Since Buildroot recompiles a full system (ATF, Kernel, user-space) this support has limited value. This is why this CPU is limited to 64bit builds only. [1] https://developer.arm.com/Processors/Neoverse%20N2 [2] https://developer.arm.com/documentation/102099/0003/The-Neoverse-N2--core/Neoverse-N2--core-features [3] https://gcc.gnu.org/gcc-11/changes.html [4] https://gitlab.com/buildroot.org/buildroot/-/commit/c58a2a9687c045379c0f768c8c6c1c1a41842a85 [5] https://gitlab.com/qemu-project/qemu/-/commit/dfff1000fef24f6686e0be5e6472613985a363dc Signed-off-by: Julien Olivain <ju.o@free.fr> --- Patch tested on branch next at commit c0a5fcf with commands: make qemu_aarch64_sbsa_defconfig utils/config -k -d BR2_neoverse_n1 -e BR2_neoverse_n2 make olddefconfig make The generated toolchains targets Armv9.0-A by default: output/host/bin/aarch64-buildroot-linux-gnu-gcc \ -dM -E - </dev/null | grep -E 'ARM_ARCH|SVE2' ... #define __ARM_ARCH 9 ... #define __ARM_FEATURE_SVE2 1 ... The system can boot using the sbsa-ref machine with neoverse-n2 cpu: sed -i 's/neoverse-n1/neoverse-n2/g' output/images/start-qemu.sh output/images/start-qemu.sh # login as root cat /proc/cpuinfo processor : 0 BogoMIPS : 2000.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 sve asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp sve2 sveaes svepmull svebitperm svesha3 svesm4 flagm2 frint svei8mm svebf16 i8mm bf16 dgh rng bti CPU implementer : 0x41 CPU architecture: 8 CPU variant : 0x0 CPU part : 0xd49 CPU revision : 3 ... For comparison, see: https://gitlab.com/buildroot.org/buildroot/-/commit/c58a2a9687c045379c0f768c8c6c1c1a41842a85 --- arch/Config.in.arm | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)