diff mbox

[v2,1/1] char: cadence_uart: Convert to realize()

Message ID 889eb6b5efba83c8bb85435fe832eaefc2e70c14.1424926336.git.alistair.francis@xilinx.com
State New
Headers show

Commit Message

Alistair Francis Feb. 26, 2015, 5:07 a.m. UTC
Use the DeviceClass realize() and init() instead of
the deprecated SysBusDevice init().

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
---
V2:
 - Simplify commit message
 - Fix function typo

 hw/char/cadence_uart.c | 29 ++++++++++++++++-------------
 1 file changed, 16 insertions(+), 13 deletions(-)

Comments

Andreas Färber Feb. 26, 2015, 7:57 a.m. UTC | #1
Am 26.02.2015 um 06:07 schrieb Alistair Francis:
> Use the DeviceClass realize() and init() instead of
> the deprecated SysBusDevice init().
> 
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
> ---
> V2:
>  - Simplify commit message
>  - Fix function typo
> 
>  hw/char/cadence_uart.c | 29 ++++++++++++++++-------------
>  1 file changed, 16 insertions(+), 13 deletions(-)
> 
> diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
> index 7044b35..b6ccd72 100644
> --- a/hw/char/cadence_uart.c
> +++ b/hw/char/cadence_uart.c
> @@ -476,27 +476,30 @@ static void cadence_uart_reset(DeviceState *dev)
>      uart_update_status(s);
>  }
>  
> -static int cadence_uart_init(SysBusDevice *dev)
> +static void cadence_uart_realize(DeviceState *dev, Error **errp)
>  {
>      UartState *s = CADENCE_UART(dev);
>  
> -    memory_region_init_io(&s->iomem, OBJECT(s), &uart_ops, s, "uart", 0x1000);
> -    sysbus_init_mmio(dev, &s->iomem);
> -    sysbus_init_irq(dev, &s->irq);
> -
> -    s->fifo_trigger_handle = timer_new_ns(QEMU_CLOCK_VIRTUAL,
> -            (QEMUTimerCB *)fifo_trigger_update, s);
> -
> -    s->char_tx_time = (get_ticks_per_sec() / 9600) * 10;
> -
>      s->chr = qemu_char_get_next_serial();
>  
>      if (s->chr) {
>          qemu_chr_add_handlers(s->chr, uart_can_receive, uart_receive,
>                                uart_event, s);
>      }
> +}
>  
> -    return 0;
> +static void cadence_uart_init(Object *obj)
> +{
> +    UartState *s = CADENCE_UART(obj);
> +
> +    memory_region_init_io(&s->iomem, obj, &uart_ops, s, "uart", 0x1000);
> +    sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem);
> +    sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
> +
> +    s->fifo_trigger_handle = timer_new_ns(QEMU_CLOCK_VIRTUAL,
> +            (QEMUTimerCB *)fifo_trigger_update, s);

Is the timer created in a non-running state? Otherwise it should
probably remain in realize.

Also, why is the cast necessary?

Otherwise looks good. Via qom-next tree or ARM tree?

Regards,
Andreas

> +
> +    s->char_tx_time = (get_ticks_per_sec() / 9600) * 10;
>  }
>  
>  static int cadence_uart_post_load(void *opaque, int version_id)
> @@ -528,9 +531,8 @@ static const VMStateDescription vmstate_cadence_uart = {
>  static void cadence_uart_class_init(ObjectClass *klass, void *data)
>  {
>      DeviceClass *dc = DEVICE_CLASS(klass);
> -    SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
>  
> -    sdc->init = cadence_uart_init;
> +    dc->realize = cadence_uart_realize;
>      dc->vmsd = &vmstate_cadence_uart;
>      dc->reset = cadence_uart_reset;
>  }
> @@ -539,6 +541,7 @@ static const TypeInfo cadence_uart_info = {
>      .name          = TYPE_CADENCE_UART,
>      .parent        = TYPE_SYS_BUS_DEVICE,
>      .instance_size = sizeof(UartState),
> +    .instance_init = cadence_uart_init,
>      .class_init    = cadence_uart_class_init,
>  };
>  
>
Peter Crosthwaite Feb. 26, 2015, 8:24 a.m. UTC | #2
On Wed, Feb 25, 2015 at 9:07 PM, Alistair Francis
<alistair.francis@xilinx.com> wrote:
> Use the DeviceClass realize() and init() instead of
> the deprecated SysBusDevice init().
>
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>

With Andreas' comments addressed:

Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>

Regards,
Peter

> ---
> V2:
>  - Simplify commit message
>  - Fix function typo
>
>  hw/char/cadence_uart.c | 29 ++++++++++++++++-------------
>  1 file changed, 16 insertions(+), 13 deletions(-)
>
> diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
> index 7044b35..b6ccd72 100644
> --- a/hw/char/cadence_uart.c
> +++ b/hw/char/cadence_uart.c
> @@ -476,27 +476,30 @@ static void cadence_uart_reset(DeviceState *dev)
>      uart_update_status(s);
>  }
>
> -static int cadence_uart_init(SysBusDevice *dev)
> +static void cadence_uart_realize(DeviceState *dev, Error **errp)
>  {
>      UartState *s = CADENCE_UART(dev);
>
> -    memory_region_init_io(&s->iomem, OBJECT(s), &uart_ops, s, "uart", 0x1000);
> -    sysbus_init_mmio(dev, &s->iomem);
> -    sysbus_init_irq(dev, &s->irq);
> -
> -    s->fifo_trigger_handle = timer_new_ns(QEMU_CLOCK_VIRTUAL,
> -            (QEMUTimerCB *)fifo_trigger_update, s);
> -
> -    s->char_tx_time = (get_ticks_per_sec() / 9600) * 10;
> -
>      s->chr = qemu_char_get_next_serial();
>
>      if (s->chr) {
>          qemu_chr_add_handlers(s->chr, uart_can_receive, uart_receive,
>                                uart_event, s);
>      }
> +}
>
> -    return 0;
> +static void cadence_uart_init(Object *obj)
> +{
> +    UartState *s = CADENCE_UART(obj);
> +
> +    memory_region_init_io(&s->iomem, obj, &uart_ops, s, "uart", 0x1000);
> +    sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem);
> +    sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
> +
> +    s->fifo_trigger_handle = timer_new_ns(QEMU_CLOCK_VIRTUAL,
> +            (QEMUTimerCB *)fifo_trigger_update, s);
> +
> +    s->char_tx_time = (get_ticks_per_sec() / 9600) * 10;
>  }
>
>  static int cadence_uart_post_load(void *opaque, int version_id)
> @@ -528,9 +531,8 @@ static const VMStateDescription vmstate_cadence_uart = {
>  static void cadence_uart_class_init(ObjectClass *klass, void *data)
>  {
>      DeviceClass *dc = DEVICE_CLASS(klass);
> -    SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
>
> -    sdc->init = cadence_uart_init;
> +    dc->realize = cadence_uart_realize;
>      dc->vmsd = &vmstate_cadence_uart;
>      dc->reset = cadence_uart_reset;
>  }
> @@ -539,6 +541,7 @@ static const TypeInfo cadence_uart_info = {
>      .name          = TYPE_CADENCE_UART,
>      .parent        = TYPE_SYS_BUS_DEVICE,
>      .instance_size = sizeof(UartState),
> +    .instance_init = cadence_uart_init,
>      .class_init    = cadence_uart_class_init,
>  };
>
> --
> 2.1.1
>
>
Alistair Francis Feb. 26, 2015, 11:49 p.m. UTC | #3
On Thu, Feb 26, 2015 at 5:57 PM, Andreas Färber <afaerber@suse.de> wrote:
> Am 26.02.2015 um 06:07 schrieb Alistair Francis:
>> Use the DeviceClass realize() and init() instead of
>> the deprecated SysBusDevice init().
>>
>> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
>> ---
>> V2:
>>  - Simplify commit message
>>  - Fix function typo
>>
>>  hw/char/cadence_uart.c | 29 ++++++++++++++++-------------
>>  1 file changed, 16 insertions(+), 13 deletions(-)
>>
>> diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
>> index 7044b35..b6ccd72 100644
>> --- a/hw/char/cadence_uart.c
>> +++ b/hw/char/cadence_uart.c
>> @@ -476,27 +476,30 @@ static void cadence_uart_reset(DeviceState *dev)
>>      uart_update_status(s);
>>  }
>>
>> -static int cadence_uart_init(SysBusDevice *dev)
>> +static void cadence_uart_realize(DeviceState *dev, Error **errp)
>>  {
>>      UartState *s = CADENCE_UART(dev);
>>
>> -    memory_region_init_io(&s->iomem, OBJECT(s), &uart_ops, s, "uart", 0x1000);
>> -    sysbus_init_mmio(dev, &s->iomem);
>> -    sysbus_init_irq(dev, &s->irq);
>> -
>> -    s->fifo_trigger_handle = timer_new_ns(QEMU_CLOCK_VIRTUAL,
>> -            (QEMUTimerCB *)fifo_trigger_update, s);
>> -
>> -    s->char_tx_time = (get_ticks_per_sec() / 9600) * 10;
>> -
>>      s->chr = qemu_char_get_next_serial();
>>
>>      if (s->chr) {
>>          qemu_chr_add_handlers(s->chr, uart_can_receive, uart_receive,
>>                                uart_event, s);
>>      }
>> +}
>>
>> -    return 0;
>> +static void cadence_uart_init(Object *obj)
>> +{
>> +    UartState *s = CADENCE_UART(obj);
>> +
>> +    memory_region_init_io(&s->iomem, obj, &uart_ops, s, "uart", 0x1000);
>> +    sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem);
>> +    sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
>> +
>> +    s->fifo_trigger_handle = timer_new_ns(QEMU_CLOCK_VIRTUAL,
>> +            (QEMUTimerCB *)fifo_trigger_update, s);
>
> Is the timer created in a non-running state? Otherwise it should
> probably remain in realize.

Not that I'm aware of, I will move it to realize.

>
> Also, why is the cast necessary?

It's not really, it was just already in the code, I will remove it.

>
> Otherwise looks good. Via qom-next tree or ARM tree?

qom-next would be best as Peter is away for the next week.

Thanks,

Alistair

>
> Regards,
> Andreas
>
>> +
>> +    s->char_tx_time = (get_ticks_per_sec() / 9600) * 10;
>>  }
>>
>>  static int cadence_uart_post_load(void *opaque, int version_id)
>> @@ -528,9 +531,8 @@ static const VMStateDescription vmstate_cadence_uart = {
>>  static void cadence_uart_class_init(ObjectClass *klass, void *data)
>>  {
>>      DeviceClass *dc = DEVICE_CLASS(klass);
>> -    SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
>>
>> -    sdc->init = cadence_uart_init;
>> +    dc->realize = cadence_uart_realize;
>>      dc->vmsd = &vmstate_cadence_uart;
>>      dc->reset = cadence_uart_reset;
>>  }
>> @@ -539,6 +541,7 @@ static const TypeInfo cadence_uart_info = {
>>      .name          = TYPE_CADENCE_UART,
>>      .parent        = TYPE_SYS_BUS_DEVICE,
>>      .instance_size = sizeof(UartState),
>> +    .instance_init = cadence_uart_init,
>>      .class_init    = cadence_uart_class_init,
>>  };
>>
>>
>
>
> --
> SUSE Linux GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Felix Imendörffer, Jane Smithard, Jennifer Guild, Dilip Upmanyu,
> Graham Norton; HRB 21284 (AG Nürnberg)
>
diff mbox

Patch

diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index 7044b35..b6ccd72 100644
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -476,27 +476,30 @@  static void cadence_uart_reset(DeviceState *dev)
     uart_update_status(s);
 }
 
-static int cadence_uart_init(SysBusDevice *dev)
+static void cadence_uart_realize(DeviceState *dev, Error **errp)
 {
     UartState *s = CADENCE_UART(dev);
 
-    memory_region_init_io(&s->iomem, OBJECT(s), &uart_ops, s, "uart", 0x1000);
-    sysbus_init_mmio(dev, &s->iomem);
-    sysbus_init_irq(dev, &s->irq);
-
-    s->fifo_trigger_handle = timer_new_ns(QEMU_CLOCK_VIRTUAL,
-            (QEMUTimerCB *)fifo_trigger_update, s);
-
-    s->char_tx_time = (get_ticks_per_sec() / 9600) * 10;
-
     s->chr = qemu_char_get_next_serial();
 
     if (s->chr) {
         qemu_chr_add_handlers(s->chr, uart_can_receive, uart_receive,
                               uart_event, s);
     }
+}
 
-    return 0;
+static void cadence_uart_init(Object *obj)
+{
+    UartState *s = CADENCE_UART(obj);
+
+    memory_region_init_io(&s->iomem, obj, &uart_ops, s, "uart", 0x1000);
+    sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->iomem);
+    sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
+
+    s->fifo_trigger_handle = timer_new_ns(QEMU_CLOCK_VIRTUAL,
+            (QEMUTimerCB *)fifo_trigger_update, s);
+
+    s->char_tx_time = (get_ticks_per_sec() / 9600) * 10;
 }
 
 static int cadence_uart_post_load(void *opaque, int version_id)
@@ -528,9 +531,8 @@  static const VMStateDescription vmstate_cadence_uart = {
 static void cadence_uart_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
-    SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
 
-    sdc->init = cadence_uart_init;
+    dc->realize = cadence_uart_realize;
     dc->vmsd = &vmstate_cadence_uart;
     dc->reset = cadence_uart_reset;
 }
@@ -539,6 +541,7 @@  static const TypeInfo cadence_uart_info = {
     .name          = TYPE_CADENCE_UART,
     .parent        = TYPE_SYS_BUS_DEVICE,
     .instance_size = sizeof(UartState),
+    .instance_init = cadence_uart_init,
     .class_init    = cadence_uart_class_init,
 };