Message ID | 1370774260-31072-1-git-send-email-dongsheng.wang@freescale.com (mailing list archive) |
---|---|
State | Superseded, archived |
Headers | show |
> -----Original Message----- > From: Wood Scott-B07421 > Sent: Thursday, June 13, 2013 6:04 AM > To: Wang Dongsheng-B40534 > Cc: benh@kernel.crashing.org; johannes@sipsolutions.net; anton@enomsg.org; > galak@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org; Wang Dongsheng- > B40534 > Subject: Re: [PATCH 1/2] powerpc: add Book E support to 64-bit > hibernation > > On 06/09/2013 05:37:39 AM, Wang Dongsheng wrote: > > /* these macros rely on the save area being > > * pointed to by r11 */ > > + > > +#define SAVE_SPR(register) \ > > + mfspr r0,SPRN_##register ;\ > > + std r0,SL_##register(r11) > > +#define RESTORE_SPR(register) \ > > + ld r0,SL_##register(r11) ;\ > > + mtspr SPRN_##register,r0 > > +#define RESTORE_SPRG(n) \ > > + ld r0,SL_SPRG##n(r11) ;\ > > + mtsprg n,r0 > > #define SAVE_SPECIAL(special) \ > > mf##special r0 ;\ > > std r0, SL_##special(r11) > > Is there a particular SPR that you're trying to save, for which > SAVE_SPECIAL doesn't work? > Yes, like pid, tcr. > > +#else > > + /* Save SPRGs */ > > + RESTORE_SPRG(0) > > + RESTORE_SPRG(1) > > + RESTORE_SPRG(2) > > + RESTORE_SPRG(3) > > + RESTORE_SPRG(4) > > + RESTORE_SPRG(5) > > + RESTORE_SPRG(6) > > + RESTORE_SPRG(7) > > Why do we need this on book3e and not on book3s? > Book3e: SPRG1 used save paca, SPRG2 be defined SPRN_SPRG_TLB_EXFRAME,... I think those register should be save, even now some SPRG register not be use. Book3s: Sorry, I not clear why book3s not do this. I think Anton or Ben could know the reason. > > + > > + RESTORE_SPECIAL(MSR) > > + > > + /* Restore TCR and clear any pending bits in TSR. */ > > + RESTORE_SPR(TCR) > > + lis r0, (TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS)@h > > + mtspr SPRN_TSR,r0 > > Please be internally consistent with whitespace after commas, even if the > rest of the file is already inconsistent. :-P > Thanks. > > + > > + /* Kick decrementer */ > > + li r0,1 > > + mtdec r0 > > Why doesn't book3s need to kick the decrementer? > Sorry, I not clear why book3s not do this. I think Anton or Ben could know the reason. > -Scott
On 06/13/2013 04:55:43 AM, Wang Dongsheng-B40534 wrote: > > > +#else > > > + /* Save SPRGs */ > > > + RESTORE_SPRG(0) > > > + RESTORE_SPRG(1) > > > + RESTORE_SPRG(2) > > > + RESTORE_SPRG(3) > > > + RESTORE_SPRG(4) > > > + RESTORE_SPRG(5) > > > + RESTORE_SPRG(6) > > > + RESTORE_SPRG(7) > > > > Why do we need this on book3e and not on book3s? > > > Book3e: SPRG1 used save paca, SPRG2 be defined > SPRN_SPRG_TLB_EXFRAME,... > I think those register should be save, even now some SPRG register > not be use. Are those expected/allowed to change as a result of the restore? -Scott
> -----Original Message----- > From: Wood Scott-B07421 > Sent: Friday, June 14, 2013 12:51 AM > To: Wang Dongsheng-B40534 > Cc: Wood Scott-B07421; benh@kernel.crashing.org; > johannes@sipsolutions.net; anton@enomsg.org; galak@kernel.crashing.org; > linuxppc-dev@lists.ozlabs.org > Subject: Re: [PATCH 1/2] powerpc: add Book E support to 64-bit > hibernation > > On 06/13/2013 04:55:43 AM, Wang Dongsheng-B40534 wrote: > > > > +#else > > > > + /* Save SPRGs */ > > > > + RESTORE_SPRG(0) > > > > + RESTORE_SPRG(1) > > > > + RESTORE_SPRG(2) > > > > + RESTORE_SPRG(3) > > > > + RESTORE_SPRG(4) > > > > + RESTORE_SPRG(5) > > > > + RESTORE_SPRG(6) > > > > + RESTORE_SPRG(7) > > > > > > Why do we need this on book3e and not on book3s? > > > > > Book3e: SPRG1 used save paca, SPRG2 be defined > > SPRN_SPRG_TLB_EXFRAME,... > > I think those register should be save, even now some SPRG register not > > be use. > > Are those expected/allowed to change as a result of the restore? > Those registers are used by software, some allowed to change. Exception handling is used in some registers, see exception-64e.h These registers can be modified and saved. > -Scott
Hi scott, Could you apply this patch? Thanks. -dongsheng > -----Original Message----- > From: Wang Dongsheng-B40534 > Sent: Sunday, June 09, 2013 6:38 PM > To: benh@kernel.crashing.org > Cc: johannes@sipsolutions.net; anton@enomsg.org; Wood Scott-B07421; > galak@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org; Wang Dongsheng- > B40534 > Subject: [PATCH 1/2] powerpc: add Book E support to 64-bit hibernation > > Update the 64-bit hibernation code to support Book E CPUs. > Some registers and instructions are not defined for Book3e > (SDR reg, tlbia instruction). > > SDR: Storage Description Register. Book3S and Book3E have different > address translation mode, we do not need HTABORG & HTABSIZE to > translate virtual address to real address. > > More registers are saved in BookE-64bit.(TCR, SPRGx, ...) > > Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> > --- > * History: > * Wood Scott(A): Please investigate the issue of whether we are loading > * kernel module code in this step > * R: Kernel will allocate the memory for module code segment and data > * segment. First allocate a memory, and copy the umod to hdr members > * of the struct load_info. Due to the temporary assigned module > belongs > * to the kernel space, so it belongs to the kernel data. > * > * The kernel of all data will be saved when hibernation suspend. So > * the module which has already been inserted will be saved. > > arch/powerpc/kernel/swsusp_asm64.S | 64 > ++++++++++++++++++++++++++++++++++++-- > 1 file changed, 62 insertions(+), 2 deletions(-) > > diff --git a/arch/powerpc/kernel/swsusp_asm64.S > b/arch/powerpc/kernel/swsusp_asm64.S > index 86ac1d9..608e4ceb 100644 > --- a/arch/powerpc/kernel/swsusp_asm64.S > +++ b/arch/powerpc/kernel/swsusp_asm64.S > @@ -46,10 +46,29 @@ > #define SL_r29 0xe8 > #define SL_r30 0xf0 > #define SL_r31 0xf8 > -#define SL_SIZE SL_r31+8 > +#define SL_SPRG0 0x100 > +#define SL_SPRG1 0x108 > +#define SL_SPRG2 0x110 > +#define SL_SPRG3 0x118 > +#define SL_SPRG4 0x120 > +#define SL_SPRG5 0x128 > +#define SL_SPRG6 0x130 > +#define SL_SPRG7 0x138 > +#define SL_TCR 0x140 > +#define SL_SIZE SL_TCR+8 > > /* these macros rely on the save area being > * pointed to by r11 */ > + > +#define SAVE_SPR(register) \ > + mfspr r0,SPRN_##register ;\ > + std r0,SL_##register(r11) > +#define RESTORE_SPR(register) \ > + ld r0,SL_##register(r11) ;\ > + mtspr SPRN_##register,r0 > +#define RESTORE_SPRG(n) \ > + ld r0,SL_SPRG##n(r11) ;\ > + mtsprg n,r0 > #define SAVE_SPECIAL(special) \ > mf##special r0 ;\ > std r0, SL_##special(r11) > @@ -103,8 +122,21 @@ _GLOBAL(swsusp_arch_suspend) > SAVE_REGISTER(r30) > SAVE_REGISTER(r31) > SAVE_SPECIAL(MSR) > - SAVE_SPECIAL(SDR1) > SAVE_SPECIAL(XER) > +#ifdef CONFIG_PPC_BOOK3S_64 > + SAVE_SPECIAL(SDR1) > +#else > + SAVE_SPR(TCR) > + /* Save SPRGs */ > + SAVE_SPR(SPRG0) > + SAVE_SPR(SPRG1) > + SAVE_SPR(SPRG2) > + SAVE_SPR(SPRG3) > + SAVE_SPR(SPRG4) > + SAVE_SPR(SPRG5) > + SAVE_SPR(SPRG6) > + SAVE_SPR(SPRG7) > +#endif > > /* we push the stack up 128 bytes but don't store the > * stack pointer on the stack like a real stackframe */ > @@ -151,6 +183,7 @@ copy_page_loop: > bne+ copyloop > nothing_to_copy: > > +#ifdef CONFIG_PPC_BOOK3S_64 > /* flush caches */ > lis r3, 0x10 > mtctr r3 > @@ -167,6 +200,7 @@ nothing_to_copy: > sync > > tlbia > +#endif > > ld r11,swsusp_save_area_ptr@toc(r2) > > @@ -208,16 +242,42 @@ nothing_to_copy: > RESTORE_REGISTER(r29) > RESTORE_REGISTER(r30) > RESTORE_REGISTER(r31) > + > +#ifdef CONFIG_PPC_BOOK3S_64 > /* can't use RESTORE_SPECIAL(MSR) */ > ld r0, SL_MSR(r11) > mtmsrd r0, 0 > RESTORE_SPECIAL(SDR1) > +#else > + /* Save SPRGs */ > + RESTORE_SPRG(0) > + RESTORE_SPRG(1) > + RESTORE_SPRG(2) > + RESTORE_SPRG(3) > + RESTORE_SPRG(4) > + RESTORE_SPRG(5) > + RESTORE_SPRG(6) > + RESTORE_SPRG(7) > + > + RESTORE_SPECIAL(MSR) > + > + /* Restore TCR and clear any pending bits in TSR. */ > + RESTORE_SPR(TCR) > + lis r0, (TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS)@h > + mtspr SPRN_TSR,r0 > + > + /* Kick decrementer */ > + li r0,1 > + mtdec r0 > +#endif > RESTORE_SPECIAL(XER) > > sync > > addi r1,r1,-128 > +#ifdef CONFIG_PPC_BOOK3S_64 > bl slb_flush_and_rebolt > +#endif > bl do_after_copyback > addi r1,r1,128 > > -- > 1.8.0
On Wed, 2013-07-10 at 09:41 +0000, Wang Dongsheng-B40534 wrote: > Hi scott, > > Could you apply this patch? There were a numbre of comments, were there addressed ? Do you need to save all the SPRGs for example ? Ben. > Thanks. > > -dongsheng > > > -----Original Message----- > > From: Wang Dongsheng-B40534 > > Sent: Sunday, June 09, 2013 6:38 PM > > To: benh@kernel.crashing.org > > Cc: johannes@sipsolutions.net; anton@enomsg.org; Wood Scott-B07421; > > galak@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org; Wang Dongsheng- > > B40534 > > Subject: [PATCH 1/2] powerpc: add Book E support to 64-bit hibernation > > > > Update the 64-bit hibernation code to support Book E CPUs. > > Some registers and instructions are not defined for Book3e > > (SDR reg, tlbia instruction). > > > > SDR: Storage Description Register. Book3S and Book3E have different > > address translation mode, we do not need HTABORG & HTABSIZE to > > translate virtual address to real address. > > > > More registers are saved in BookE-64bit.(TCR, SPRGx, ...) > > > > Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> > > --- > > * History: > > * Wood Scott(A): Please investigate the issue of whether we are loading > > * kernel module code in this step > > * R: Kernel will allocate the memory for module code segment and data > > * segment. First allocate a memory, and copy the umod to hdr members > > * of the struct load_info. Due to the temporary assigned module > > belongs > > * to the kernel space, so it belongs to the kernel data. > > * > > * The kernel of all data will be saved when hibernation suspend. So > > * the module which has already been inserted will be saved. > > > > arch/powerpc/kernel/swsusp_asm64.S | 64 > > ++++++++++++++++++++++++++++++++++++-- > > 1 file changed, 62 insertions(+), 2 deletions(-) > > > > diff --git a/arch/powerpc/kernel/swsusp_asm64.S > > b/arch/powerpc/kernel/swsusp_asm64.S > > index 86ac1d9..608e4ceb 100644 > > --- a/arch/powerpc/kernel/swsusp_asm64.S > > +++ b/arch/powerpc/kernel/swsusp_asm64.S > > @@ -46,10 +46,29 @@ > > #define SL_r29 0xe8 > > #define SL_r30 0xf0 > > #define SL_r31 0xf8 > > -#define SL_SIZE SL_r31+8 > > +#define SL_SPRG0 0x100 > > +#define SL_SPRG1 0x108 > > +#define SL_SPRG2 0x110 > > +#define SL_SPRG3 0x118 > > +#define SL_SPRG4 0x120 > > +#define SL_SPRG5 0x128 > > +#define SL_SPRG6 0x130 > > +#define SL_SPRG7 0x138 > > +#define SL_TCR 0x140 > > +#define SL_SIZE SL_TCR+8 > > > > /* these macros rely on the save area being > > * pointed to by r11 */ > > + > > +#define SAVE_SPR(register) \ > > + mfspr r0,SPRN_##register ;\ > > + std r0,SL_##register(r11) > > +#define RESTORE_SPR(register) \ > > + ld r0,SL_##register(r11) ;\ > > + mtspr SPRN_##register,r0 > > +#define RESTORE_SPRG(n) \ > > + ld r0,SL_SPRG##n(r11) ;\ > > + mtsprg n,r0 > > #define SAVE_SPECIAL(special) \ > > mf##special r0 ;\ > > std r0, SL_##special(r11) > > @@ -103,8 +122,21 @@ _GLOBAL(swsusp_arch_suspend) > > SAVE_REGISTER(r30) > > SAVE_REGISTER(r31) > > SAVE_SPECIAL(MSR) > > - SAVE_SPECIAL(SDR1) > > SAVE_SPECIAL(XER) > > +#ifdef CONFIG_PPC_BOOK3S_64 > > + SAVE_SPECIAL(SDR1) > > +#else > > + SAVE_SPR(TCR) > > + /* Save SPRGs */ > > + SAVE_SPR(SPRG0) > > + SAVE_SPR(SPRG1) > > + SAVE_SPR(SPRG2) > > + SAVE_SPR(SPRG3) > > + SAVE_SPR(SPRG4) > > + SAVE_SPR(SPRG5) > > + SAVE_SPR(SPRG6) > > + SAVE_SPR(SPRG7) > > +#endif > > > > /* we push the stack up 128 bytes but don't store the > > * stack pointer on the stack like a real stackframe */ > > @@ -151,6 +183,7 @@ copy_page_loop: > > bne+ copyloop > > nothing_to_copy: > > > > +#ifdef CONFIG_PPC_BOOK3S_64 > > /* flush caches */ > > lis r3, 0x10 > > mtctr r3 > > @@ -167,6 +200,7 @@ nothing_to_copy: > > sync > > > > tlbia > > +#endif > > > > ld r11,swsusp_save_area_ptr@toc(r2) > > > > @@ -208,16 +242,42 @@ nothing_to_copy: > > RESTORE_REGISTER(r29) > > RESTORE_REGISTER(r30) > > RESTORE_REGISTER(r31) > > + > > +#ifdef CONFIG_PPC_BOOK3S_64 > > /* can't use RESTORE_SPECIAL(MSR) */ > > ld r0, SL_MSR(r11) > > mtmsrd r0, 0 > > RESTORE_SPECIAL(SDR1) > > +#else > > + /* Save SPRGs */ > > + RESTORE_SPRG(0) > > + RESTORE_SPRG(1) > > + RESTORE_SPRG(2) > > + RESTORE_SPRG(3) > > + RESTORE_SPRG(4) > > + RESTORE_SPRG(5) > > + RESTORE_SPRG(6) > > + RESTORE_SPRG(7) > > + > > + RESTORE_SPECIAL(MSR) > > + > > + /* Restore TCR and clear any pending bits in TSR. */ > > + RESTORE_SPR(TCR) > > + lis r0, (TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS)@h > > + mtspr SPRN_TSR,r0 > > + > > + /* Kick decrementer */ > > + li r0,1 > > + mtdec r0 > > +#endif > > RESTORE_SPECIAL(XER) > > > > sync > > > > addi r1,r1,-128 > > +#ifdef CONFIG_PPC_BOOK3S_64 > > bl slb_flush_and_rebolt > > +#endif > > bl do_after_copyback > > addi r1,r1,128 > > > > -- > > 1.8.0 >
> -----Original Message----- > From: Benjamin Herrenschmidt [mailto:benh@kernel.crashing.org] > Sent: Wednesday, July 10, 2013 5:52 PM > To: Wang Dongsheng-B40534 > Cc: Wood Scott-B07421; johannes@sipsolutions.net; anton@enomsg.org; > galak@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org > Subject: Re: [PATCH 1/2] powerpc: add Book E support to 64-bit > hibernation > > On Wed, 2013-07-10 at 09:41 +0000, Wang Dongsheng-B40534 wrote: > > Hi scott, > > > > Could you apply this patch? > > There were a numbre of comments, were there addressed ? Do you need to > save all the SPRGs for example ? > > Ben. > Um...yes, sorry, not all of the SPRGs. the discussion about SPRG1 and SPRG2. I can fix them, just to save SRPG1 & SPRG2. But those registers can be used by software, I think those register should be save, even now some SPRG register not be use. > > Thanks. > > > > -dongsheng > > > > > -----Original Message----- > > > From: Wang Dongsheng-B40534 > > > Sent: Sunday, June 09, 2013 6:38 PM > > > To: benh@kernel.crashing.org > > > Cc: johannes@sipsolutions.net; anton@enomsg.org; Wood Scott-B07421; > > > galak@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org; Wang > > > Dongsheng- > > > B40534 > > > Subject: [PATCH 1/2] powerpc: add Book E support to 64-bit > > > hibernation > > > > > > Update the 64-bit hibernation code to support Book E CPUs. > > > Some registers and instructions are not defined for Book3e (SDR reg, > > > tlbia instruction). > > > > > > SDR: Storage Description Register. Book3S and Book3E have different > > > address translation mode, we do not need HTABORG & HTABSIZE to > > > translate virtual address to real address. > > > > > > More registers are saved in BookE-64bit.(TCR, SPRGx, ...) > > > > > > Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> > > > --- > > > * History: > > > * Wood Scott(A): Please investigate the issue of whether we are > loading > > > * kernel module code in this step > > > * R: Kernel will allocate the memory for module code segment and data > > > * segment. First allocate a memory, and copy the umod to hdr > members > > > * of the struct load_info. Due to the temporary assigned module > > > belongs > > > * to the kernel space, so it belongs to the kernel data. > > > * > > > * The kernel of all data will be saved when hibernation suspend. > So > > > * the module which has already been inserted will be saved. > > > > > > arch/powerpc/kernel/swsusp_asm64.S | 64 > > > ++++++++++++++++++++++++++++++++++++-- > > > 1 file changed, 62 insertions(+), 2 deletions(-) > > > > > > diff --git a/arch/powerpc/kernel/swsusp_asm64.S > > > b/arch/powerpc/kernel/swsusp_asm64.S > > > index 86ac1d9..608e4ceb 100644 > > > --- a/arch/powerpc/kernel/swsusp_asm64.S > > > +++ b/arch/powerpc/kernel/swsusp_asm64.S > > > @@ -46,10 +46,29 @@ > > > #define SL_r29 0xe8 > > > #define SL_r30 0xf0 > > > #define SL_r31 0xf8 > > > -#define SL_SIZE SL_r31+8 > > > +#define SL_SPRG0 0x100 > > > +#define SL_SPRG1 0x108 > > > +#define SL_SPRG2 0x110 > > > +#define SL_SPRG3 0x118 > > > +#define SL_SPRG4 0x120 > > > +#define SL_SPRG5 0x128 > > > +#define SL_SPRG6 0x130 > > > +#define SL_SPRG7 0x138 > > > +#define SL_TCR 0x140 > > > +#define SL_SIZE SL_TCR+8 > > > > > > /* these macros rely on the save area being > > > * pointed to by r11 */ > > > + > > > +#define SAVE_SPR(register) \ > > > + mfspr r0,SPRN_##register ;\ > > > + std r0,SL_##register(r11) > > > +#define RESTORE_SPR(register) \ > > > + ld r0,SL_##register(r11) ;\ > > > + mtspr SPRN_##register,r0 > > > +#define RESTORE_SPRG(n) \ > > > + ld r0,SL_SPRG##n(r11) ;\ > > > + mtsprg n,r0 > > > #define SAVE_SPECIAL(special) \ > > > mf##special r0 ;\ > > > std r0, SL_##special(r11) > > > @@ -103,8 +122,21 @@ _GLOBAL(swsusp_arch_suspend) > > > SAVE_REGISTER(r30) > > > SAVE_REGISTER(r31) > > > SAVE_SPECIAL(MSR) > > > - SAVE_SPECIAL(SDR1) > > > SAVE_SPECIAL(XER) > > > +#ifdef CONFIG_PPC_BOOK3S_64 > > > + SAVE_SPECIAL(SDR1) > > > +#else > > > + SAVE_SPR(TCR) > > > + /* Save SPRGs */ > > > + SAVE_SPR(SPRG0) > > > + SAVE_SPR(SPRG1) > > > + SAVE_SPR(SPRG2) > > > + SAVE_SPR(SPRG3) > > > + SAVE_SPR(SPRG4) > > > + SAVE_SPR(SPRG5) > > > + SAVE_SPR(SPRG6) > > > + SAVE_SPR(SPRG7) > > > +#endif > > > > > > /* we push the stack up 128 bytes but don't store the > > > * stack pointer on the stack like a real stackframe */ @@ -151,6 > > > +183,7 @@ copy_page_loop: > > > bne+ copyloop > > > nothing_to_copy: > > > > > > +#ifdef CONFIG_PPC_BOOK3S_64 > > > /* flush caches */ > > > lis r3, 0x10 > > > mtctr r3 > > > @@ -167,6 +200,7 @@ nothing_to_copy: > > > sync > > > > > > tlbia > > > +#endif > > > > > > ld r11,swsusp_save_area_ptr@toc(r2) > > > > > > @@ -208,16 +242,42 @@ nothing_to_copy: > > > RESTORE_REGISTER(r29) > > > RESTORE_REGISTER(r30) > > > RESTORE_REGISTER(r31) > > > + > > > +#ifdef CONFIG_PPC_BOOK3S_64 > > > /* can't use RESTORE_SPECIAL(MSR) */ > > > ld r0, SL_MSR(r11) > > > mtmsrd r0, 0 > > > RESTORE_SPECIAL(SDR1) > > > +#else > > > + /* Save SPRGs */ > > > + RESTORE_SPRG(0) > > > + RESTORE_SPRG(1) > > > + RESTORE_SPRG(2) > > > + RESTORE_SPRG(3) > > > + RESTORE_SPRG(4) > > > + RESTORE_SPRG(5) > > > + RESTORE_SPRG(6) > > > + RESTORE_SPRG(7) > > > + > > > + RESTORE_SPECIAL(MSR) > > > + > > > + /* Restore TCR and clear any pending bits in TSR. */ > > > + RESTORE_SPR(TCR) > > > + lis r0, (TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS)@h > > > + mtspr SPRN_TSR,r0 > > > + > > > + /* Kick decrementer */ > > > + li r0,1 > > > + mtdec r0 > > > +#endif > > > RESTORE_SPECIAL(XER) > > > > > > sync > > > > > > addi r1,r1,-128 > > > +#ifdef CONFIG_PPC_BOOK3S_64 > > > bl slb_flush_and_rebolt > > > +#endif > > > bl do_after_copyback > > > addi r1,r1,128 > > > > > > -- > > > 1.8.0 > > > >
diff --git a/arch/powerpc/kernel/swsusp_asm64.S b/arch/powerpc/kernel/swsusp_asm64.S index 86ac1d9..608e4ceb 100644 --- a/arch/powerpc/kernel/swsusp_asm64.S +++ b/arch/powerpc/kernel/swsusp_asm64.S @@ -46,10 +46,29 @@ #define SL_r29 0xe8 #define SL_r30 0xf0 #define SL_r31 0xf8 -#define SL_SIZE SL_r31+8 +#define SL_SPRG0 0x100 +#define SL_SPRG1 0x108 +#define SL_SPRG2 0x110 +#define SL_SPRG3 0x118 +#define SL_SPRG4 0x120 +#define SL_SPRG5 0x128 +#define SL_SPRG6 0x130 +#define SL_SPRG7 0x138 +#define SL_TCR 0x140 +#define SL_SIZE SL_TCR+8 /* these macros rely on the save area being * pointed to by r11 */ + +#define SAVE_SPR(register) \ + mfspr r0,SPRN_##register ;\ + std r0,SL_##register(r11) +#define RESTORE_SPR(register) \ + ld r0,SL_##register(r11) ;\ + mtspr SPRN_##register,r0 +#define RESTORE_SPRG(n) \ + ld r0,SL_SPRG##n(r11) ;\ + mtsprg n,r0 #define SAVE_SPECIAL(special) \ mf##special r0 ;\ std r0, SL_##special(r11) @@ -103,8 +122,21 @@ _GLOBAL(swsusp_arch_suspend) SAVE_REGISTER(r30) SAVE_REGISTER(r31) SAVE_SPECIAL(MSR) - SAVE_SPECIAL(SDR1) SAVE_SPECIAL(XER) +#ifdef CONFIG_PPC_BOOK3S_64 + SAVE_SPECIAL(SDR1) +#else + SAVE_SPR(TCR) + /* Save SPRGs */ + SAVE_SPR(SPRG0) + SAVE_SPR(SPRG1) + SAVE_SPR(SPRG2) + SAVE_SPR(SPRG3) + SAVE_SPR(SPRG4) + SAVE_SPR(SPRG5) + SAVE_SPR(SPRG6) + SAVE_SPR(SPRG7) +#endif /* we push the stack up 128 bytes but don't store the * stack pointer on the stack like a real stackframe */ @@ -151,6 +183,7 @@ copy_page_loop: bne+ copyloop nothing_to_copy: +#ifdef CONFIG_PPC_BOOK3S_64 /* flush caches */ lis r3, 0x10 mtctr r3 @@ -167,6 +200,7 @@ nothing_to_copy: sync tlbia +#endif ld r11,swsusp_save_area_ptr@toc(r2) @@ -208,16 +242,42 @@ nothing_to_copy: RESTORE_REGISTER(r29) RESTORE_REGISTER(r30) RESTORE_REGISTER(r31) + +#ifdef CONFIG_PPC_BOOK3S_64 /* can't use RESTORE_SPECIAL(MSR) */ ld r0, SL_MSR(r11) mtmsrd r0, 0 RESTORE_SPECIAL(SDR1) +#else + /* Save SPRGs */ + RESTORE_SPRG(0) + RESTORE_SPRG(1) + RESTORE_SPRG(2) + RESTORE_SPRG(3) + RESTORE_SPRG(4) + RESTORE_SPRG(5) + RESTORE_SPRG(6) + RESTORE_SPRG(7) + + RESTORE_SPECIAL(MSR) + + /* Restore TCR and clear any pending bits in TSR. */ + RESTORE_SPR(TCR) + lis r0, (TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS)@h + mtspr SPRN_TSR,r0 + + /* Kick decrementer */ + li r0,1 + mtdec r0 +#endif RESTORE_SPECIAL(XER) sync addi r1,r1,-128 +#ifdef CONFIG_PPC_BOOK3S_64 bl slb_flush_and_rebolt +#endif bl do_after_copyback addi r1,r1,128
Update the 64-bit hibernation code to support Book E CPUs. Some registers and instructions are not defined for Book3e (SDR reg, tlbia instruction). SDR: Storage Description Register. Book3S and Book3E have different address translation mode, we do not need HTABORG & HTABSIZE to translate virtual address to real address. More registers are saved in BookE-64bit.(TCR, SPRGx, ...) Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> --- * History: * Wood Scott(A): Please investigate the issue of whether we are loading * kernel module code in this step * R: Kernel will allocate the memory for module code segment and data * segment. First allocate a memory, and copy the umod to hdr members * of the struct load_info. Due to the temporary assigned module belongs * to the kernel space, so it belongs to the kernel data. * * The kernel of all data will be saved when hibernation suspend. So * the module which has already been inserted will be saved. arch/powerpc/kernel/swsusp_asm64.S | 64 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 62 insertions(+), 2 deletions(-)