| Message ID | 1343988851-884-4-git-send-email-B38951@freescale.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Delegated to: | Kumar Gala |
| Headers | show |
On 08/03/2012 05:14 AM, Jia Hongtao wrote: > -void __devinit fsl_pci_init(void) > +/* Checkout if PCI contains ISA node */ > +static int of_pci_has_isa(struct device_node *pci_node) > +{ > + struct device_node *np; > + int ret = 0; > + > + if (!pci_node) > + return 0; > + > + read_lock(&devtree_lock); > + np = pci_node->allnext; > + > + /* Only scan the children of PCI node */ > + for (; np != pci_node->sibling; np = np->allnext) { > + if (np->type && (of_node_cmp(np->type, "isa") == 0) > + && of_node_get(np)) { > + ret = 1; > + break; > + } > + } > + > + of_node_put(pci_node); > + read_unlock(&devtree_lock); > + > + return ret; > +} Why do you keep insisting on substituting your ISA search code here? What advantages does it have over the code that is already there? It unnecessarily digs into the internals of the tree representation. > + > +static int __devinit fsl_pci_probe(struct platform_device *pdev) > { > int ret; > - struct device_node *node; > struct pci_controller *hose; > - dma_addr_t max = 0xffffffff; > + int is_primary = 0; > > - /* Callers can specify the primary bus using other means. */ > if (!fsl_pci_primary) { > - /* If a PCI host bridge contains an ISA node, it's primary. */ > - node = of_find_node_by_type(NULL, "isa"); > - while ((fsl_pci_primary = of_get_parent(node))) { > - of_node_put(node); > - node = fsl_pci_primary; > - > - if (of_match_node(pci_ids, node)) > - break; > - } > + is_primary = of_pci_has_isa(pdev->dev.of_node); > + if (is_primary) > + fsl_pci_primary = pdev->dev.of_node; > } As I explained before, this has to be done globally, not from the probe function, so we can assign a default primary bus if there isn't any ISA. There are bugs in the Linux PPC PCI code relating to not having any primary bus. -Scott
> -----Original Message----- > From: Wood Scott-B07421 > Sent: Saturday, August 04, 2012 12:28 AM > To: Jia Hongtao-B38951 > Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Li Yang- > R58472; Wood Scott-B07421 > Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie > initialization code > > On 08/03/2012 05:14 AM, Jia Hongtao wrote: > > -void __devinit fsl_pci_init(void) > > +/* Checkout if PCI contains ISA node */ > > +static int of_pci_has_isa(struct device_node *pci_node) > > +{ > > + struct device_node *np; > > + int ret = 0; > > + > > + if (!pci_node) > > + return 0; > > + > > + read_lock(&devtree_lock); > > + np = pci_node->allnext; > > + > > + /* Only scan the children of PCI node */ > > + for (; np != pci_node->sibling; np = np->allnext) { > > + if (np->type && (of_node_cmp(np->type, "isa") == 0) > > + && of_node_get(np)) { > > + ret = 1; > > + break; > > + } > > + } > > + > > + of_node_put(pci_node); > > + read_unlock(&devtree_lock); > > + > > + return ret; > > +} > > Why do you keep insisting on substituting your ISA search code here? > What advantages does it have over the code that is already there? It > unnecessarily digs into the internals of the tree representation. > I want ISA search is done from probe. Also this way is more efficient due to we just search the children of PCI. > > + > > +static int __devinit fsl_pci_probe(struct platform_device *pdev) > > { > > int ret; > > - struct device_node *node; > > struct pci_controller *hose; > > - dma_addr_t max = 0xffffffff; > > + int is_primary = 0; > > > > - /* Callers can specify the primary bus using other means. */ > > if (!fsl_pci_primary) { > > - /* If a PCI host bridge contains an ISA node, it's primary. > */ > > - node = of_find_node_by_type(NULL, "isa"); > > - while ((fsl_pci_primary = of_get_parent(node))) { > > - of_node_put(node); > > - node = fsl_pci_primary; > > - > > - if (of_match_node(pci_ids, node)) > > - break; > > - } > > + is_primary = of_pci_has_isa(pdev->dev.of_node); > > + if (is_primary) > > + fsl_pci_primary = pdev->dev.of_node; > > } > > As I explained before, this has to be done globally, not from the probe > function, so we can assign a default primary bus if there isn't any ISA. > There are bugs in the Linux PPC PCI code relating to not having any > primary bus. > > -Scott In my way of searching ISA you can also assign a default primary bus in board specific files. I read your code and found that if there is no ISA node you will assign the first PCI bus scanned as primary. It's not all right. Take ge_imp3a as an example: The second PCI bus (9000) is primary not the first one. I doubt that there are bugs if no primary assigned. Like mpc85xx_rdb assigned no primary at all. Some other boards has no primary ether like p1022ds, p1021mds, p1010rdb, p1023rds, all corenet boards (p2041_rdb, p3041_ds, p4080_ds, p5020_ds, p5040_ds). If no primary is a bug then all these boards above are not correctly setting up. -Hongtao.
On 08/05/2012 10:07 PM, Jia Hongtao-B38951 wrote: > > >> -----Original Message----- >> From: Wood Scott-B07421 >> Sent: Saturday, August 04, 2012 12:28 AM >> To: Jia Hongtao-B38951 >> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Li Yang- >> R58472; Wood Scott-B07421 >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >> initialization code >> >> On 08/03/2012 05:14 AM, Jia Hongtao wrote: >>> -void __devinit fsl_pci_init(void) >>> +/* Checkout if PCI contains ISA node */ >>> +static int of_pci_has_isa(struct device_node *pci_node) >>> +{ >>> + struct device_node *np; >>> + int ret = 0; >>> + >>> + if (!pci_node) >>> + return 0; >>> + >>> + read_lock(&devtree_lock); >>> + np = pci_node->allnext; >>> + >>> + /* Only scan the children of PCI node */ >>> + for (; np != pci_node->sibling; np = np->allnext) { >>> + if (np->type && (of_node_cmp(np->type, "isa") == 0) >>> + && of_node_get(np)) { >>> + ret = 1; >>> + break; >>> + } >>> + } >>> + >>> + of_node_put(pci_node); >>> + read_unlock(&devtree_lock); >>> + >>> + return ret; >>> +} >> >> Why do you keep insisting on substituting your ISA search code here? >> What advantages does it have over the code that is already there? It >> unnecessarily digs into the internals of the tree representation. >> > > I want ISA search is done from probe. Too bad. You're breaking the case where there's no ISA node. > Also this way is more efficient due > to we just search the children of PCI. It is not more efficient, because you're doing the search for every PCIe bus rather than once. Not that it matters in this context. >>> + >>> +static int __devinit fsl_pci_probe(struct platform_device *pdev) >>> { >>> int ret; >>> - struct device_node *node; >>> struct pci_controller *hose; >>> - dma_addr_t max = 0xffffffff; >>> + int is_primary = 0; >>> >>> - /* Callers can specify the primary bus using other means. */ >>> if (!fsl_pci_primary) { >>> - /* If a PCI host bridge contains an ISA node, it's primary. >> */ >>> - node = of_find_node_by_type(NULL, "isa"); >>> - while ((fsl_pci_primary = of_get_parent(node))) { >>> - of_node_put(node); >>> - node = fsl_pci_primary; >>> - >>> - if (of_match_node(pci_ids, node)) >>> - break; >>> - } >>> + is_primary = of_pci_has_isa(pdev->dev.of_node); >>> + if (is_primary) >>> + fsl_pci_primary = pdev->dev.of_node; >>> } >> >> As I explained before, this has to be done globally, not from the probe >> function, so we can assign a default primary bus if there isn't any ISA. >> There are bugs in the Linux PPC PCI code relating to not having any >> primary bus. >> >> -Scott > > In my way of searching ISA you can also assign a default primary bus in board > specific files. That was meant for when the board file had an alternate way of searching for the primary bus (e.g. look for i8259), not as a replacement for the mechanism that guarantees there's a primary bus. You are causing a regression in the qemu_e500.c platform. > I read your code and found that if there is no ISA node you will assign the > first PCI bus scanned as primary. It's not all right. Take ge_imp3a as an > example: The second PCI bus (9000) is primary not the first one. Does that board have ISA on it, that isn't described by the device tree? If so, before converting to the new init mechanism, the board code will need to set fsl_pci_primary based on its own knowledge of where that ISA is. If it doesn't have ISA, it doesn't matter which one we designate as primary. > I doubt that there are bugs if no primary assigned. Yeah, I just implemented the fallback for fun. Come on. It was recently discussed on this list. PCI under QEMU did not work without it. > Like mpc85xx_rdb assigned > no primary at all. Some other boards has no primary ether like p1022ds, p1021mds, > p1010rdb, p1023rds, all corenet boards (p2041_rdb, p3041_ds, p4080_ds, p5020_ds, > p5040_ds). If no primary is a bug then all these boards above are not correctly > setting up. Those boards are not being correctly set up. On real hardware things work by chance, but not under QEMU. -Scott
On Mon, Aug 6, 2012 at 11:09 PM, Scott Wood <scottwood@freescale.com> wrote: > On 08/05/2012 10:07 PM, Jia Hongtao-B38951 wrote: >> >> >>> -----Original Message----- >>> From: Wood Scott-B07421 >>> Sent: Saturday, August 04, 2012 12:28 AM >>> To: Jia Hongtao-B38951 >>> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Li Yang- >>> R58472; Wood Scott-B07421 >>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >>> initialization code >>> >>> On 08/03/2012 05:14 AM, Jia Hongtao wrote: >>>> -void __devinit fsl_pci_init(void) >>>> +/* Checkout if PCI contains ISA node */ >>>> +static int of_pci_has_isa(struct device_node *pci_node) >>>> +{ >>>> + struct device_node *np; >>>> + int ret = 0; >>>> + >>>> + if (!pci_node) >>>> + return 0; >>>> + >>>> + read_lock(&devtree_lock); >>>> + np = pci_node->allnext; >>>> + >>>> + /* Only scan the children of PCI node */ >>>> + for (; np != pci_node->sibling; np = np->allnext) { >>>> + if (np->type && (of_node_cmp(np->type, "isa") == 0) >>>> + && of_node_get(np)) { >>>> + ret = 1; >>>> + break; >>>> + } >>>> + } >>>> + >>>> + of_node_put(pci_node); >>>> + read_unlock(&devtree_lock); >>>> + >>>> + return ret; >>>> +} >>> >>> Why do you keep insisting on substituting your ISA search code here? >>> What advantages does it have over the code that is already there? It >>> unnecessarily digs into the internals of the tree representation. >>> >> >> I want ISA search is done from probe. > > Too bad. You're breaking the case where there's no ISA node. > We can also take care of special cases with our approach if needed. But it's not correct to assume the first PCI controller is the primary one if there is no ISA node. Your approach is still a band-aid to me. We can come back to this issue when we do find a proper solution. >> Also this way is more efficient due >> to we just search the children of PCI. > > It is not more efficient, because you're doing the search for every PCIe > bus rather than once. Not that it matters in this context. We end up scanning at most a few PCI nodes instead of the whole device tree for the primary. > >>>> + >>>> +static int __devinit fsl_pci_probe(struct platform_device *pdev) >>>> { >>>> int ret; >>>> - struct device_node *node; >>>> struct pci_controller *hose; >>>> - dma_addr_t max = 0xffffffff; >>>> + int is_primary = 0; >>>> >>>> - /* Callers can specify the primary bus using other means. */ >>>> if (!fsl_pci_primary) { >>>> - /* If a PCI host bridge contains an ISA node, it's primary. >>> */ >>>> - node = of_find_node_by_type(NULL, "isa"); >>>> - while ((fsl_pci_primary = of_get_parent(node))) { >>>> - of_node_put(node); >>>> - node = fsl_pci_primary; >>>> - >>>> - if (of_match_node(pci_ids, node)) >>>> - break; >>>> - } >>>> + is_primary = of_pci_has_isa(pdev->dev.of_node); >>>> + if (is_primary) >>>> + fsl_pci_primary = pdev->dev.of_node; >>>> } >>> >>> As I explained before, this has to be done globally, not from the probe >>> function, so we can assign a default primary bus if there isn't any ISA. >>> There are bugs in the Linux PPC PCI code relating to not having any >>> primary bus. >>> >>> -Scott >> >> In my way of searching ISA you can also assign a default primary bus in board >> specific files. > > That was meant for when the board file had an alternate way of searching > for the primary bus (e.g. look for i8259), not as a replacement for the > mechanism that guarantees there's a primary bus. > > You are causing a regression in the qemu_e500.c platform. Can we fix the qemu device tree to address the problem if we do make it a rule to use the ISA node to indicate the primary bus? - Leo
> -----Original Message----- > From: Wood Scott-B07421 > Sent: Monday, August 06, 2012 11:10 PM > To: Jia Hongtao-B38951 > Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; > galak@kernel.crashing.org; Li Yang-R58472 > Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie > initialization code > > On 08/05/2012 10:07 PM, Jia Hongtao-B38951 wrote: > > > > > >> -----Original Message----- > >> From: Wood Scott-B07421 > >> Sent: Saturday, August 04, 2012 12:28 AM > >> To: Jia Hongtao-B38951 > >> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Li > >> Yang- R58472; Wood Scott-B07421 > >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie > >> initialization code > >> > >> On 08/03/2012 05:14 AM, Jia Hongtao wrote: > >>> -void __devinit fsl_pci_init(void) > >>> +/* Checkout if PCI contains ISA node */ static int > >>> +of_pci_has_isa(struct device_node *pci_node) { > >>> + struct device_node *np; > >>> + int ret = 0; > >>> + > >>> + if (!pci_node) > >>> + return 0; > >>> + > >>> + read_lock(&devtree_lock); > >>> + np = pci_node->allnext; > >>> + > >>> + /* Only scan the children of PCI node */ > >>> + for (; np != pci_node->sibling; np = np->allnext) { > >>> + if (np->type && (of_node_cmp(np->type, "isa") == 0) > >>> + && of_node_get(np)) { > >>> + ret = 1; > >>> + break; > >>> + } > >>> + } > >>> + > >>> + of_node_put(pci_node); > >>> + read_unlock(&devtree_lock); > >>> + > >>> + return ret; > >>> +} > >> > >> Why do you keep insisting on substituting your ISA search code here? > >> What advantages does it have over the code that is already there? It > >> unnecessarily digs into the internals of the tree representation. > >> > > > > I want ISA search is done from probe. > > Too bad. You're breaking the case where there's no ISA node. > > > Also this way is more efficient due > > to we just search the children of PCI. > > It is not more efficient, because you're doing the search for every PCIe > bus rather than once. Not that it matters in this context. > > >>> + > >>> +static int __devinit fsl_pci_probe(struct platform_device *pdev) > >>> { > >>> int ret; > >>> - struct device_node *node; > >>> struct pci_controller *hose; > >>> - dma_addr_t max = 0xffffffff; > >>> + int is_primary = 0; > >>> > >>> - /* Callers can specify the primary bus using other means. */ > >>> if (!fsl_pci_primary) { > >>> - /* If a PCI host bridge contains an ISA node, it's primary. > >> */ > >>> - node = of_find_node_by_type(NULL, "isa"); > >>> - while ((fsl_pci_primary = of_get_parent(node))) { > >>> - of_node_put(node); > >>> - node = fsl_pci_primary; > >>> - > >>> - if (of_match_node(pci_ids, node)) > >>> - break; > >>> - } > >>> + is_primary = of_pci_has_isa(pdev->dev.of_node); > >>> + if (is_primary) > >>> + fsl_pci_primary = pdev->dev.of_node; > >>> } > >> > >> As I explained before, this has to be done globally, not from the > >> probe function, so we can assign a default primary bus if there isn't > any ISA. > >> There are bugs in the Linux PPC PCI code relating to not having any > >> primary bus. > >> > >> -Scott > > > > In my way of searching ISA you can also assign a default primary bus > > in board specific files. > > That was meant for when the board file had an alternate way of searching > for the primary bus (e.g. look for i8259), not as a replacement for the > mechanism that guarantees there's a primary bus. > > You are causing a regression in the qemu_e500.c platform. > > > I read your code and found that if there is no ISA node you will > > assign the first PCI bus scanned as primary. It's not all right. Take > > ge_imp3a as an > > example: The second PCI bus (9000) is primary not the first one. > > Does that board have ISA on it, that isn't described by the device tree? > If so, before converting to the new init mechanism, the board code will > need to set fsl_pci_primary based on its own knowledge of where that ISA > is. If it doesn't have ISA, it doesn't matter which one we designate as > primary. > > > I doubt that there are bugs if no primary assigned. > > Yeah, I just implemented the fallback for fun. Come on. > > It was recently discussed on this list. PCI under QEMU did not work > without it. > > > Like mpc85xx_rdb assigned > > no primary at all. Some other boards has no primary ether like > > p1022ds, p1021mds, p1010rdb, p1023rds, all corenet boards (p2041_rdb, > > p3041_ds, p4080_ds, p5020_ds, p5040_ds). If no primary is a bug then > > all these boards above are not correctly setting up. > > Those boards are not being correctly set up. On real hardware things > work by chance, but not under QEMU. > > -Scott I am really not sure that all boards need primary bus. Could you give me the link of discussion about primary that you mentioned? -Hongtao.
On 08/06/2012 11:20 PM, Li Yang wrote: > On Mon, Aug 6, 2012 at 11:09 PM, Scott Wood <scottwood@freescale.com> wrote: >> On 08/05/2012 10:07 PM, Jia Hongtao-B38951 wrote: >>> >>> >>>> -----Original Message----- >>>> From: Wood Scott-B07421 >>>> Sent: Saturday, August 04, 2012 12:28 AM >>>> To: Jia Hongtao-B38951 >>>> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Li Yang- >>>> R58472; Wood Scott-B07421 >>>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >>>> initialization code >>>> >>>> As I explained before, this has to be done globally, not from the probe >>>> function, so we can assign a default primary bus if there isn't any ISA. >>>> There are bugs in the Linux PPC PCI code relating to not having any >>>> primary bus. >>>> >>>> -Scott >>> >>> In my way of searching ISA you can also assign a default primary bus in board >>> specific files. >> >> That was meant for when the board file had an alternate way of searching >> for the primary bus (e.g. look for i8259), not as a replacement for the >> mechanism that guarantees there's a primary bus. >> >> You are causing a regression in the qemu_e500.c platform. > > Can we fix the qemu device tree to address the problem if we do make > it a rule to use the ISA node to indicate the primary bus? No. There is no ISA, and we're not going to lie and say there is. I really don't understand what the problem is with leaving the primary detection code as global. Either fix the bugs so we don't need a primary, or accept some "impurity" in the workaround. -Scott
On 08/07/2012 03:09 AM, Jia Hongtao-B38951 wrote: > I am really not sure that all boards need primary bus. Could you give me > the link of discussion about primary that you mentioned? https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html -Scott
> -----Original Message----- > From: Wood Scott-B07421 > Sent: Tuesday, August 07, 2012 11:25 PM > To: Li Yang-R58472 > Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; Li Yang-R58472; Jia > Hongtao-B38951 > Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie > initialization code > > On 08/06/2012 11:20 PM, Li Yang wrote: > > On Mon, Aug 6, 2012 at 11:09 PM, Scott Wood <scottwood@freescale.com> > wrote: > >> On 08/05/2012 10:07 PM, Jia Hongtao-B38951 wrote: > >>> > >>> > >>>> -----Original Message----- > >>>> From: Wood Scott-B07421 > >>>> Sent: Saturday, August 04, 2012 12:28 AM > >>>> To: Jia Hongtao-B38951 > >>>> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Li > >>>> Yang- R58472; Wood Scott-B07421 > >>>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie > >>>> initialization code > >>>> > >>>> As I explained before, this has to be done globally, not from the > >>>> probe function, so we can assign a default primary bus if there > isn't any ISA. > >>>> There are bugs in the Linux PPC PCI code relating to not having > >>>> any primary bus. > >>>> > >>>> -Scott > >>> > >>> In my way of searching ISA you can also assign a default primary bus > >>> in board specific files. > >> > >> That was meant for when the board file had an alternate way of > >> searching for the primary bus (e.g. look for i8259), not as a > >> replacement for the mechanism that guarantees there's a primary bus. > >> > >> You are causing a regression in the qemu_e500.c platform. > > > > Can we fix the qemu device tree to address the problem if we do make > > it a rule to use the ISA node to indicate the primary bus? > > No. There is no ISA, and we're not going to lie and say there is. But we can assign a default primary for qemu. > > I really don't understand what the problem is with leaving the primary > detection code as global. Either fix the bugs so we don't need a primary, > or accept some "impurity" in the workaround. > > -Scott Global detection for primary is ok but we think our way is deeper unified. Is there any problem to fix the bugs? I really don't understand why we have to need a primary bus. -Hongtao.
> -----Original Message----- > From: Wood Scott-B07421 > Sent: Tuesday, August 07, 2012 11:29 PM > To: Jia Hongtao-B38951 > Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; > galak@kernel.crashing.org; Li Yang-R58472 > Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie > initialization code > > On 08/07/2012 03:09 AM, Jia Hongtao-B38951 wrote: > > I am really not sure that all boards need primary bus. Could you give > > me the link of discussion about primary that you mentioned? > > https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html > > -Scott It seems in qemu isa_io_base must be non-zero. If there is no isa bridge should isa_io_base be non-zero for other boards? If not maybe we should fix qemu bug. Or "quick fix" in the link is a workaround. -Hongtao.
On 08/08/2012 04:03 AM, Jia Hongtao-B38951 wrote: > > >> -----Original Message----- >> From: Wood Scott-B07421 >> Sent: Tuesday, August 07, 2012 11:25 PM >> To: Li Yang-R58472 >> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; Li Yang-R58472; Jia >> Hongtao-B38951 >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >> initialization code >> >> On 08/06/2012 11:20 PM, Li Yang wrote: >>> On Mon, Aug 6, 2012 at 11:09 PM, Scott Wood <scottwood@freescale.com> >> wrote: >>>> On 08/05/2012 10:07 PM, Jia Hongtao-B38951 wrote: >>>>> >>>>> >>>>>> -----Original Message----- >>>>>> From: Wood Scott-B07421 >>>>>> Sent: Saturday, August 04, 2012 12:28 AM >>>>>> To: Jia Hongtao-B38951 >>>>>> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Li >>>>>> Yang- R58472; Wood Scott-B07421 >>>>>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >>>>>> initialization code >>>>>> >>>>>> As I explained before, this has to be done globally, not from the >>>>>> probe function, so we can assign a default primary bus if there >> isn't any ISA. >>>>>> There are bugs in the Linux PPC PCI code relating to not having >>>>>> any primary bus. >>>>>> >>>>>> -Scott >>>>> >>>>> In my way of searching ISA you can also assign a default primary bus >>>>> in board specific files. >>>> >>>> That was meant for when the board file had an alternate way of >>>> searching for the primary bus (e.g. look for i8259), not as a >>>> replacement for the mechanism that guarantees there's a primary bus. >>>> >>>> You are causing a regression in the qemu_e500.c platform. >>> >>> Can we fix the qemu device tree to address the problem if we do make >>> it a rule to use the ISA node to indicate the primary bus? >> >> No. There is no ISA, and we're not going to lie and say there is. > > But we can assign a default primary for qemu. Not in the device tree. What other mechanism do you propose? And why do you want to fix it only for QEMU and not other boards, where things happen to work but not as designed? Kumar, can you speak up here as maintainer so we can stop going back and forth endlessly? >> I really don't understand what the problem is with leaving the primary >> detection code as global. Either fix the bugs so we don't need a primary, >> or accept some "impurity" in the workaround. >> >> -Scott > > Global detection for primary is ok but we think our way is deeper unified. So my way works and "is ok", and your way doesn't work but is theoretically cleaner. > Is there any problem to fix the bugs? If you want to fix them, go ahead. You don't get to rely on the bugs beign fixed until after they're actually fixed. > I really don't understand why we have to need a primary bus. Did you read Ben's e-mail that I posted a link to? -Scott
On 08/08/2012 04:39 AM, Jia Hongtao-B38951 wrote: > > >> -----Original Message----- >> From: Wood Scott-B07421 >> Sent: Tuesday, August 07, 2012 11:29 PM >> To: Jia Hongtao-B38951 >> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; >> galak@kernel.crashing.org; Li Yang-R58472 >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >> initialization code >> >> On 08/07/2012 03:09 AM, Jia Hongtao-B38951 wrote: >>> I am really not sure that all boards need primary bus. Could you give >>> me the link of discussion about primary that you mentioned? >> >> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html >> >> -Scott > > > It seems in qemu isa_io_base must be non-zero. In all cases. It just shows up worse under QEMU because of a different issue. > If there is no isa bridge should isa_io_base be non-zero for other boards? Yes, until the bugs are fixed. > If not maybe we should fix qemu bug. If you want to try to make QEMU accept I/O BARs with address zero, go ahead, but you don't get to assume that someone else will do it, we still need to be compatible with older QEMUs (this bug is not so severe that compatibility is unreasonable), and it still doesn't address the fact that things are not functioning as designed. IIRC there are some real hardware PCI cards that don't like getting an address of zero either. > Or "quick fix" in the link is a workaround. I think that "quick fix" may have problems if there is a primary bus but it's not the first one detected. In any case, any fix or workaround has to happen before you make changes that rely on it. -Scott
>>>>>>> As I explained before, this has to be done globally, not from the >>>>>>> probe function, so we can assign a default primary bus if there >>> isn't any ISA. >>>>>>> There are bugs in the Linux PPC PCI code relating to not having >>>>>>> any primary bus. >>>>>>> >>>>>>> -Scott >>>>>> >>>>>> In my way of searching ISA you can also assign a default primary bus >>>>>> in board specific files. >>>>> >>>>> That was meant for when the board file had an alternate way of >>>>> searching for the primary bus (e.g. look for i8259), not as a >>>>> replacement for the mechanism that guarantees there's a primary bus. >>>>> >>>>> You are causing a regression in the qemu_e500.c platform. >>>> >>>> Can we fix the qemu device tree to address the problem if we do make >>>> it a rule to use the ISA node to indicate the primary bus? >>> >>> No. There is no ISA, and we're not going to lie and say there is. >> >> But we can assign a default primary for qemu. > > Not in the device tree. What other mechanism do you propose? And why > do you want to fix it only for QEMU and not other boards, where things > happen to work but not as designed? > > Kumar, can you speak up here as maintainer so we can stop going back and > forth endlessly? I'd rather we stick with the code that works for this purpose at this point. That would be Scott's current upstream code. Lets get the other aspects of this patchset closed (SWIOTLB, conversion to platform driver, PM, etc.). The primary bus code Scott wrote does NOT need to change at this point. - k
> -----Original Message----- > From: Wood Scott-B07421 > Sent: Wednesday, August 08, 2012 11:58 PM > To: Jia Hongtao-B38951 > Cc: Wood Scott-B07421; Li Yang-R58472; linuxppc-dev@lists.ozlabs.org; > Gala Kumar-B11780 > Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie > initialization code > > On 08/08/2012 04:03 AM, Jia Hongtao-B38951 wrote: > > > > > >> -----Original Message----- > >> From: Wood Scott-B07421 > >> Sent: Tuesday, August 07, 2012 11:25 PM > >> To: Li Yang-R58472 > >> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; Li Yang-R58472; > >> Jia > >> Hongtao-B38951 > >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie > >> initialization code > >> > >> On 08/06/2012 11:20 PM, Li Yang wrote: > >>> On Mon, Aug 6, 2012 at 11:09 PM, Scott Wood > >>> <scottwood@freescale.com> > >> wrote: > >>>> On 08/05/2012 10:07 PM, Jia Hongtao-B38951 wrote: > >>>>> > >>>>> > >>>>>> -----Original Message----- > >>>>>> From: Wood Scott-B07421 > >>>>>> Sent: Saturday, August 04, 2012 12:28 AM > >>>>>> To: Jia Hongtao-B38951 > >>>>>> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Li > >>>>>> Yang- R58472; Wood Scott-B07421 > >>>>>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie > >>>>>> initialization code > >>>>>> > >>>>>> As I explained before, this has to be done globally, not from the > >>>>>> probe function, so we can assign a default primary bus if there > >> isn't any ISA. > >>>>>> There are bugs in the Linux PPC PCI code relating to not having > >>>>>> any primary bus. > >>>>>> > >>>>>> -Scott > >>>>> > >>>>> In my way of searching ISA you can also assign a default primary > >>>>> bus in board specific files. > >>>> > >>>> That was meant for when the board file had an alternate way of > >>>> searching for the primary bus (e.g. look for i8259), not as a > >>>> replacement for the mechanism that guarantees there's a primary bus. > >>>> > >>>> You are causing a regression in the qemu_e500.c platform. > >>> > >>> Can we fix the qemu device tree to address the problem if we do make > >>> it a rule to use the ISA node to indicate the primary bus? > >> > >> No. There is no ISA, and we're not going to lie and say there is. > > > > But we can assign a default primary for qemu. > > Not in the device tree. What other mechanism do you propose? And why do > you want to fix it only for QEMU and not other boards, where things > happen to work but not as designed? > > Kumar, can you speak up here as maintainer so we can stop going back and > forth endlessly? > > >> I really don't understand what the problem is with leaving the > >> primary detection code as global. Either fix the bugs so we don't > >> need a primary, or accept some "impurity" in the workaround. > >> > >> -Scott > > > > Global detection for primary is ok but we think our way is deeper > unified. > > So my way works and "is ok", and your way doesn't work but is > theoretically cleaner. Sorry, I meant global detection is ok but I didn't mean that your logic is ok. The concern is in some cases there is no isa node in device tree and the primary is not the first bus. Your logic assigned a wrong primary there. Is that a problem? Take ge_imp3a as an example. So maybe we should fix this exceptional board. > > > Is there any problem to fix the bugs? > > If you want to fix them, go ahead. You don't get to rely on the bugs > beign fixed until after they're actually fixed. > > > I really don't understand why we have to need a primary bus. > > Did you read Ben's e-mail that I posted a link to? > > -Scott
> -----Original Message----- > From: Wood Scott-B07421 > Sent: Thursday, August 09, 2012 12:02 AM > To: Jia Hongtao-B38951 > Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; > galak@kernel.crashing.org; Li Yang-R58472 > Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie > initialization code > > On 08/08/2012 04:39 AM, Jia Hongtao-B38951 wrote: > > > > > >> -----Original Message----- > >> From: Wood Scott-B07421 > >> Sent: Tuesday, August 07, 2012 11:29 PM > >> To: Jia Hongtao-B38951 > >> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; > >> galak@kernel.crashing.org; Li Yang-R58472 > >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie > >> initialization code > >> > >> On 08/07/2012 03:09 AM, Jia Hongtao-B38951 wrote: > >>> I am really not sure that all boards need primary bus. Could you > >>> give me the link of discussion about primary that you mentioned? > >> > >> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html > >> > >> -Scott > > > > > > It seems in qemu isa_io_base must be non-zero. > > In all cases. It just shows up worse under QEMU because of a different > issue. > > > If there is no isa bridge should isa_io_base be non-zero for other > boards? > > Yes, until the bugs are fixed. > > > If not maybe we should fix qemu bug. > > If you want to try to make QEMU accept I/O BARs with address zero, go > ahead, but you don't get to assume that someone else will do it, we still > need to be compatible with older QEMUs (this bug is not so severe that > compatibility is unreasonable), and it still doesn't address the fact > that things are not functioning as designed. IIRC there are some real > hardware PCI cards that don't like getting an address of zero either. > > > Or "quick fix" in the link is a workaround. > > I think that "quick fix" may have problems if there is a primary bus but > it's not the first one detected. In any case, any fix or workaround has > to happen before you make changes that rely on it. > > -Scott If there is no primary assigned and accidently the primary is not the first one this "quick fix" may have problem. But this -accident- only happened in ge_imp3a board if I didn't miss other boards. So if there is no primary assigned but the primary is the first bus detected this "quick fix" is right. That means the "quick fix" is the equivalent substitution for "arbitrarily designate one as primary". Maybe we can use the "quick fix" and fix ge_imp3a as an exceptional case. -Hongtao.
On 08/08/2012 10:48 PM, Jia Hongtao-B38951 wrote: > > >> -----Original Message----- >> From: Wood Scott-B07421 >> Sent: Wednesday, August 08, 2012 11:58 PM >> To: Jia Hongtao-B38951 >> Cc: Wood Scott-B07421; Li Yang-R58472; linuxppc-dev@lists.ozlabs.org; >> Gala Kumar-B11780 >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >> initialization code >> >> On 08/08/2012 04:03 AM, Jia Hongtao-B38951 wrote: >>> >>> >>>> -----Original Message----- >>>> From: Wood Scott-B07421 >>>> Sent: Tuesday, August 07, 2012 11:25 PM >>>> To: Li Yang-R58472 >>>> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; Li Yang-R58472; >>>> Jia >>>> Hongtao-B38951 >>>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >>>> initialization code >>>> >>>> On 08/06/2012 11:20 PM, Li Yang wrote: >>>>> On Mon, Aug 6, 2012 at 11:09 PM, Scott Wood >>>>> <scottwood@freescale.com> >>>> wrote: >>>>>> On 08/05/2012 10:07 PM, Jia Hongtao-B38951 wrote: >>>>>>> >>>>>>> >>>>>>>> -----Original Message----- >>>>>>>> From: Wood Scott-B07421 >>>>>>>> Sent: Saturday, August 04, 2012 12:28 AM >>>>>>>> To: Jia Hongtao-B38951 >>>>>>>> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Li >>>>>>>> Yang- R58472; Wood Scott-B07421 >>>>>>>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >>>>>>>> initialization code >>>>>>>> >>>>>>>> As I explained before, this has to be done globally, not from the >>>>>>>> probe function, so we can assign a default primary bus if there >>>> isn't any ISA. >>>>>>>> There are bugs in the Linux PPC PCI code relating to not having >>>>>>>> any primary bus. >>>>>>>> >>>>>>>> -Scott >>>>>>> >>>>>>> In my way of searching ISA you can also assign a default primary >>>>>>> bus in board specific files. >>>>>> >>>>>> That was meant for when the board file had an alternate way of >>>>>> searching for the primary bus (e.g. look for i8259), not as a >>>>>> replacement for the mechanism that guarantees there's a primary bus. >>>>>> >>>>>> You are causing a regression in the qemu_e500.c platform. >>>>> >>>>> Can we fix the qemu device tree to address the problem if we do make >>>>> it a rule to use the ISA node to indicate the primary bus? >>>> >>>> No. There is no ISA, and we're not going to lie and say there is. >>> >>> But we can assign a default primary for qemu. >> >> Not in the device tree. What other mechanism do you propose? And why do >> you want to fix it only for QEMU and not other boards, where things >> happen to work but not as designed? >> >> Kumar, can you speak up here as maintainer so we can stop going back and >> forth endlessly? >> >>>> I really don't understand what the problem is with leaving the >>>> primary detection code as global. Either fix the bugs so we don't >>>> need a primary, or accept some "impurity" in the workaround. >>>> >>>> -Scott >>> >>> Global detection for primary is ok but we think our way is deeper >> unified. >> >> So my way works and "is ok", and your way doesn't work but is >> theoretically cleaner. > > Sorry, I meant global detection is ok but I didn't mean that your logic > is ok. The concern is in some cases there is no isa node in device tree > and the primary is not the first bus. Your logic assigned a wrong primary > there. Is that a problem? Take ge_imp3a as an example. > > So maybe we should fix this exceptional board. Boards like that are why the code first checks for whether fsl_pci_primary is NULL. Board code can set fsl_pci_primary based on other criteria before calling fsl_pci_init(). This is why we need to allow for a gradual conversion, so boards like that can get personal attention by someone who can test the change. -Scott
On 08/08/2012 10:48 PM, Jia Hongtao-B38951 wrote: > > >> -----Original Message----- >> From: Wood Scott-B07421 >> Sent: Thursday, August 09, 2012 12:02 AM >> To: Jia Hongtao-B38951 >> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; >> galak@kernel.crashing.org; Li Yang-R58472 >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >> initialization code >> >> On 08/08/2012 04:39 AM, Jia Hongtao-B38951 wrote: >>> >>> >>>> -----Original Message----- >>>> From: Wood Scott-B07421 >>>> Sent: Tuesday, August 07, 2012 11:29 PM >>>> To: Jia Hongtao-B38951 >>>> Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; >>>> galak@kernel.crashing.org; Li Yang-R58472 >>>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >>>> initialization code >>>> >>>> On 08/07/2012 03:09 AM, Jia Hongtao-B38951 wrote: >>>>> I am really not sure that all boards need primary bus. Could you >>>>> give me the link of discussion about primary that you mentioned? >>>> >>>> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html >>>> >>>> -Scott >>> >>> >>> It seems in qemu isa_io_base must be non-zero. >> >> In all cases. It just shows up worse under QEMU because of a different >> issue. >> >>> If there is no isa bridge should isa_io_base be non-zero for other >> boards? >> >> Yes, until the bugs are fixed. >> >>> If not maybe we should fix qemu bug. >> >> If you want to try to make QEMU accept I/O BARs with address zero, go >> ahead, but you don't get to assume that someone else will do it, we still >> need to be compatible with older QEMUs (this bug is not so severe that >> compatibility is unreasonable), and it still doesn't address the fact >> that things are not functioning as designed. IIRC there are some real >> hardware PCI cards that don't like getting an address of zero either. >> >>> Or "quick fix" in the link is a workaround. >> >> I think that "quick fix" may have problems if there is a primary bus but >> it's not the first one detected. In any case, any fix or workaround has >> to happen before you make changes that rely on it. >> >> -Scott > > If there is no primary assigned and accidently the primary is not the > first one this "quick fix" may have problem. But this -accident- only happened > in ge_imp3a board if I didn't miss other boards. How is it an accident? It's a perfectly legitimate situation. > So if there is no primary assigned but the primary is the first bus detected > this "quick fix" is right. That means the "quick fix" is the equivalent > substitution for "arbitrarily designate one as primary". It's not equivalent because I didn't try to convert the ge_imp3a board, and if I did I would have added special code to the ge_imp3a board to set the fsl_pci_primary before calling fsl_pci_init(). -Scott
> -----Original Message----- > From: Gala Kumar-B11780 > Sent: Thursday, August 09, 2012 3:04 AM > To: Wood Scott-B07421 > Cc: Jia Hongtao-B38951; Wood Scott-B07421; Li Yang-R58472; linuxppc- > dev@lists.ozlabs.org > Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie > initialization code > > >>>>>>> As I explained before, this has to be done globally, not from > >>>>>>> the probe function, so we can assign a default primary bus if > >>>>>>> there > >>> isn't any ISA. > >>>>>>> There are bugs in the Linux PPC PCI code relating to not having > >>>>>>> any primary bus. > >>>>>>> > >>>>>>> -Scott > >>>>>> > >>>>>> In my way of searching ISA you can also assign a default primary > >>>>>> bus in board specific files. > >>>>> > >>>>> That was meant for when the board file had an alternate way of > >>>>> searching for the primary bus (e.g. look for i8259), not as a > >>>>> replacement for the mechanism that guarantees there's a primary bus. > >>>>> > >>>>> You are causing a regression in the qemu_e500.c platform. > >>>> > >>>> Can we fix the qemu device tree to address the problem if we do > >>>> make it a rule to use the ISA node to indicate the primary bus? > >>> > >>> No. There is no ISA, and we're not going to lie and say there is. > >> > >> But we can assign a default primary for qemu. > > > > Not in the device tree. What other mechanism do you propose? And why > > do you want to fix it only for QEMU and not other boards, where things > > happen to work but not as designed? > > > > Kumar, can you speak up here as maintainer so we can stop going back > > and forth endlessly? > > I'd rather we stick with the code that works for this purpose at this > point. That would be Scott's current upstream code. Lets get the other > aspects of this patchset closed (SWIOTLB, conversion to platform driver, > PM, etc.). The primary bus code Scott wrote does NOT need to change at > this point. > > - k I just submitted a new version of PCI patch in which I improve the primary part. The reasons I want to change the way of primary assignment listed below: 1. This approach is functionally equivalent to the Scott's code. In my approach there might be no primary assigned but it fixed by "quick fix" introduced by Ben. Please refer to this link: https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html 2. Scott's and my way could not handle the situation that "the primary is not the first PCI bus detected". I found that only ge_imp3a got this problem so I fixed it by adding ISA node to its device tree. By adding this I think the solution is logically completed. 3. The key advantage of my way is better unified for platform driver. If I use the Scott's way I have to make an routine and called in all boards code. The goal of my PCI patch is unifying all PCI initialization code and obviously primary determination is part of PCI code. 4. The other advantage is efficiency. All my search for ISA node is just under PCI node instead of all device tree. - Hongtao.
On 08/10/2012 03:47 AM, Jia Hongtao-B38951 wrote: > > >> -----Original Message----- >> From: Gala Kumar-B11780 >> Sent: Thursday, August 09, 2012 3:04 AM >> To: Wood Scott-B07421 >> Cc: Jia Hongtao-B38951; Wood Scott-B07421; Li Yang-R58472; linuxppc- >> dev@lists.ozlabs.org >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >> initialization code >> >>>>>>>>> As I explained before, this has to be done globally, not from >>>>>>>>> the probe function, so we can assign a default primary bus if >>>>>>>>> there >>>>> isn't any ISA. >>>>>>>>> There are bugs in the Linux PPC PCI code relating to not having >>>>>>>>> any primary bus. >>>>>>>>> >>>>>>>>> -Scott >>>>>>>> >>>>>>>> In my way of searching ISA you can also assign a default primary >>>>>>>> bus in board specific files. >>>>>>> >>>>>>> That was meant for when the board file had an alternate way of >>>>>>> searching for the primary bus (e.g. look for i8259), not as a >>>>>>> replacement for the mechanism that guarantees there's a primary bus. >>>>>>> >>>>>>> You are causing a regression in the qemu_e500.c platform. >>>>>> >>>>>> Can we fix the qemu device tree to address the problem if we do >>>>>> make it a rule to use the ISA node to indicate the primary bus? >>>>> >>>>> No. There is no ISA, and we're not going to lie and say there is. >>>> >>>> But we can assign a default primary for qemu. >>> >>> Not in the device tree. What other mechanism do you propose? And why >>> do you want to fix it only for QEMU and not other boards, where things >>> happen to work but not as designed? >>> >>> Kumar, can you speak up here as maintainer so we can stop going back >>> and forth endlessly? >> >> I'd rather we stick with the code that works for this purpose at this >> point. That would be Scott's current upstream code. Lets get the other >> aspects of this patchset closed (SWIOTLB, conversion to platform driver, >> PM, etc.). The primary bus code Scott wrote does NOT need to change at >> this point. >> >> - k > > > I just submitted a new version of PCI patch in which I improve the primary part. > The reasons I want to change the way of primary assignment listed below: > > 1. This approach is functionally equivalent to the Scott's code. In my approach > there might be no primary assigned but it fixed by "quick fix" introduced by Ben. > Please refer to this link: > https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html You might want to get Ben's input as to whether he actually wants to see that "quick fix" applied. > 2. Scott's and my way could not handle the situation that "the primary is not the > first PCI bus detected". I found that only ge_imp3a got this problem so I fixed it > by adding ISA node to its device tree. By adding this I think the solution is > logically completed. How did my approach not handle this case? As I said, ge_imp3a platform code needs to set fsl_pci_primary manually before PCI init runs. Adding a node to the device tree is not the answer, since that will break compatibility with old device trees. > 3. The key advantage of my way is better unified for platform driver. If I use > the Scott's way I have to make an routine and called in all boards code. Only until all boards are converted, and this is *not* different with your approach. > The goal > of my PCI patch is unifying all PCI initialization code and obviously primary > determination is part of PCI code. > > 4. The other advantage is efficiency. All my search for ISA node is just under > PCI node instead of all device tree. We do so many searches over the full device tree during boot that this is meaningless. Do you have benchmarks to show that device tree iteration is a significant contributor to boot time? -Scott
> -----Original Message----- > From: Wood Scott-B07421 > Sent: Saturday, August 11, 2012 12:00 AM > To: Jia Hongtao-B38951 > Cc: Gala Kumar-B11780; Wood Scott-B07421; Li Yang-R58472; linuxppc- > dev@lists.ozlabs.org > Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie > initialization code > > On 08/10/2012 03:47 AM, Jia Hongtao-B38951 wrote: > > > > > >> -----Original Message----- > >> From: Gala Kumar-B11780 > >> Sent: Thursday, August 09, 2012 3:04 AM > >> To: Wood Scott-B07421 > >> Cc: Jia Hongtao-B38951; Wood Scott-B07421; Li Yang-R58472; linuxppc- > >> dev@lists.ozlabs.org > >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie > >> initialization code > >> > >>>>>>>>> As I explained before, this has to be done globally, not from > >>>>>>>>> the probe function, so we can assign a default primary bus if > >>>>>>>>> there > >>>>> isn't any ISA. > >>>>>>>>> There are bugs in the Linux PPC PCI code relating to not > >>>>>>>>> having any primary bus. > >>>>>>>>> > >>>>>>>>> -Scott > >>>>>>>> > >>>>>>>> In my way of searching ISA you can also assign a default > >>>>>>>> primary bus in board specific files. > >>>>>>> > >>>>>>> That was meant for when the board file had an alternate way of > >>>>>>> searching for the primary bus (e.g. look for i8259), not as a > >>>>>>> replacement for the mechanism that guarantees there's a primary > bus. > >>>>>>> > >>>>>>> You are causing a regression in the qemu_e500.c platform. > >>>>>> > >>>>>> Can we fix the qemu device tree to address the problem if we do > >>>>>> make it a rule to use the ISA node to indicate the primary bus? > >>>>> > >>>>> No. There is no ISA, and we're not going to lie and say there is. > >>>> > >>>> But we can assign a default primary for qemu. > >>> > >>> Not in the device tree. What other mechanism do you propose? And > >>> why do you want to fix it only for QEMU and not other boards, where > >>> things happen to work but not as designed? > >>> > >>> Kumar, can you speak up here as maintainer so we can stop going back > >>> and forth endlessly? > >> > >> I'd rather we stick with the code that works for this purpose at this > >> point. That would be Scott's current upstream code. Lets get the > >> other aspects of this patchset closed (SWIOTLB, conversion to > >> platform driver, PM, etc.). The primary bus code Scott wrote does > >> NOT need to change at this point. > >> > >> - k > > > > > > I just submitted a new version of PCI patch in which I improve the > primary part. > > The reasons I want to change the way of primary assignment listed below: > > > > 1. This approach is functionally equivalent to the Scott's code. In my > > approach there might be no primary assigned but it fixed by "quick fix" > introduced by Ben. > > Please refer to this link: > > https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html > > You might want to get Ben's input as to whether he actually wants to see > that "quick fix" applied. > > > 2. Scott's and my way could not handle the situation that "the primary > > is not the first PCI bus detected". I found that only ge_imp3a got > > this problem so I fixed it by adding ISA node to its device tree. By > > adding this I think the solution is logically completed. > > How did my approach not handle this case? As I said, ge_imp3a platform > code needs to set fsl_pci_primary manually before PCI init runs. > > Adding a node to the device tree is not the answer, since that will break > compatibility with old device trees. > I assume that kernel image and dtb image are from the same tree. -Hongtao.
On 08/15/2012 04:22 AM, Jia Hongtao-B38951 wrote: > > >> -----Original Message----- >> From: Wood Scott-B07421 >> Sent: Saturday, August 11, 2012 12:00 AM >> To: Jia Hongtao-B38951 >> Cc: Gala Kumar-B11780; Wood Scott-B07421; Li Yang-R58472; linuxppc- >> dev@lists.ozlabs.org >> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >> initialization code >> >> On 08/10/2012 03:47 AM, Jia Hongtao-B38951 wrote: >>> >>> >>>> -----Original Message----- >>>> From: Gala Kumar-B11780 >>>> Sent: Thursday, August 09, 2012 3:04 AM >>>> To: Wood Scott-B07421 >>>> Cc: Jia Hongtao-B38951; Wood Scott-B07421; Li Yang-R58472; linuxppc- >>>> dev@lists.ozlabs.org >>>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie >>>> initialization code >>>> >>>>>>>>>>> As I explained before, this has to be done globally, not from >>>>>>>>>>> the probe function, so we can assign a default primary bus if >>>>>>>>>>> there >>>>>>> isn't any ISA. >>>>>>>>>>> There are bugs in the Linux PPC PCI code relating to not >>>>>>>>>>> having any primary bus. >>>>>>>>>>> >>>>>>>>>>> -Scott >>>>>>>>>> >>>>>>>>>> In my way of searching ISA you can also assign a default >>>>>>>>>> primary bus in board specific files. >>>>>>>>> >>>>>>>>> That was meant for when the board file had an alternate way of >>>>>>>>> searching for the primary bus (e.g. look for i8259), not as a >>>>>>>>> replacement for the mechanism that guarantees there's a primary >> bus. >>>>>>>>> >>>>>>>>> You are causing a regression in the qemu_e500.c platform. >>>>>>>> >>>>>>>> Can we fix the qemu device tree to address the problem if we do >>>>>>>> make it a rule to use the ISA node to indicate the primary bus? >>>>>>> >>>>>>> No. There is no ISA, and we're not going to lie and say there is. >>>>>> >>>>>> But we can assign a default primary for qemu. >>>>> >>>>> Not in the device tree. What other mechanism do you propose? And >>>>> why do you want to fix it only for QEMU and not other boards, where >>>>> things happen to work but not as designed? >>>>> >>>>> Kumar, can you speak up here as maintainer so we can stop going back >>>>> and forth endlessly? >>>> >>>> I'd rather we stick with the code that works for this purpose at this >>>> point. That would be Scott's current upstream code. Lets get the >>>> other aspects of this patchset closed (SWIOTLB, conversion to >>>> platform driver, PM, etc.). The primary bus code Scott wrote does >>>> NOT need to change at this point. >>>> >>>> - k >>> >>> >>> I just submitted a new version of PCI patch in which I improve the >> primary part. >>> The reasons I want to change the way of primary assignment listed below: >>> >>> 1. This approach is functionally equivalent to the Scott's code. In my >>> approach there might be no primary assigned but it fixed by "quick fix" >> introduced by Ben. >>> Please refer to this link: >>> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html >> >> You might want to get Ben's input as to whether he actually wants to see >> that "quick fix" applied. >> >>> 2. Scott's and my way could not handle the situation that "the primary >>> is not the first PCI bus detected". I found that only ge_imp3a got >>> this problem so I fixed it by adding ISA node to its device tree. By >>> adding this I think the solution is logically completed. >> >> How did my approach not handle this case? As I said, ge_imp3a platform >> code needs to set fsl_pci_primary manually before PCI init runs. >> >> Adding a node to the device tree is not the answer, since that will break >> compatibility with old device trees. >> > > I assume that kernel image and dtb image are from the same tree. That's a bad assumption. Device trees get forked off for custom boards, modified by firmware, generated by firmware, etc. -Scott
diff --git a/arch/powerpc/platforms/85xx/common.c b/arch/powerpc/platforms/85xx/common.c index 67dac22..d0861a0 100644 --- a/arch/powerpc/platforms/85xx/common.c +++ b/arch/powerpc/platforms/85xx/common.c @@ -27,6 +27,16 @@ static struct of_device_id __initdata mpc85xx_common_ids[] = { { .compatible = "fsl,mpc8548-guts", }, /* Probably unnecessary? */ { .compatible = "gpio-leds", }, + /* For all PCI controllers */ + { .compatible = "fsl,mpc8540-pci", }, + { .compatible = "fsl,mpc8548-pcie", }, + { .compatible = "fsl,p1022-pcie", }, + { .compatible = "fsl,p1010-pcie", }, + { .compatible = "fsl,p1023-pcie", }, + { .compatible = "fsl,p4080-pcie", }, + { .compatible = "fsl,qoriq-pcie-v2.4", }, + { .compatible = "fsl,qoriq-pcie-v2.3", }, + { .compatible = "fsl,qoriq-pcie-v2.2", }, {}, }; diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c index 473d573..84b9d86 100644 --- a/arch/powerpc/platforms/85xx/corenet_ds.c +++ b/arch/powerpc/platforms/85xx/corenet_ds.c @@ -16,7 +16,6 @@ #include <linux/kdev_t.h> #include <linux/delay.h> #include <linux/interrupt.h> -#include <linux/memblock.h> #include <asm/time.h> #include <asm/machdep.h> @@ -52,39 +51,13 @@ void __init corenet_ds_pic_init(void) */ void __init corenet_ds_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; - struct pci_controller *hose; -#endif - dma_addr_t max = 0xffffffff; - mpc85xx_smp_init(); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,p4080-pcie") || - of_device_is_compatible(np, "fsl,qoriq-pcie-v2.2") || - of_device_is_compatible(np, "fsl,qoriq-pcie-v2.3") || - of_device_is_compatible(np, "fsl,qoriq-pcie-v2.4")) { - fsl_add_bridge(np, 0); - hose = pci_find_hose_for_OF_device(np); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } - } - -#ifdef CONFIG_PPC64 +#if defined(CONFIG_PCI) && defined(CONFIG_PPC64) pci_devs_phb_init(); #endif -#endif -#ifdef CONFIG_SWIOTLB - if ((memblock_end_of_DRAM() - 1) > max) { - ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } -#endif + swiotlb_detect_4g(); pr_info("%s board from Freescale Semiconductor\n", ppc_md.name); } diff --git a/arch/powerpc/platforms/85xx/ge_imp3a.c b/arch/powerpc/platforms/85xx/ge_imp3a.c index b6a728b..0483337 100644 --- a/arch/powerpc/platforms/85xx/ge_imp3a.c +++ b/arch/powerpc/platforms/85xx/ge_imp3a.c @@ -22,7 +22,6 @@ #include <linux/seq_file.h> #include <linux/interrupt.h> #include <linux/of_platform.h> -#include <linux/memblock.h> #include <asm/time.h> #include <asm/machdep.h> @@ -84,53 +83,19 @@ void __init ge_imp3a_pic_init(void) of_node_put(cascade_node); } -#ifdef CONFIG_PCI -static int primary_phb_addr; -#endif /* CONFIG_PCI */ - /* * Setup the architecture */ static void __init ge_imp3a_setup_arch(void) { struct device_node *regs; -#ifdef CONFIG_PCI - struct device_node *np; - struct pci_controller *hose; -#endif - dma_addr_t max = 0xffffffff; if (ppc_md.progress) ppc_md.progress("ge_imp3a_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8540-pci") || - of_device_is_compatible(np, "fsl,mpc8548-pcie") || - of_device_is_compatible(np, "fsl,p2020-pcie")) { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == primary_phb_addr) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - - hose = pci_find_hose_for_OF_device(np); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } - } -#endif - mpc85xx_smp_init(); -#ifdef CONFIG_SWIOTLB - if ((memblock_end_of_DRAM() - 1) > max) { - ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } -#endif + swiotlb_detect_4g(); /* Remap basic board registers */ regs = of_find_compatible_node(NULL, NULL, "ge,imp3a-fpga-regs"); @@ -215,17 +180,10 @@ static int __init ge_imp3a_probe(void) { unsigned long root = of_get_flat_dt_root(); - if (of_flat_dt_is_compatible(root, "ge,IMP3A")) { -#ifdef CONFIG_PCI - primary_phb_addr = 0x9000; -#endif - return 1; - } - - return 0; + return of_flat_dt_is_compatible(root, "ge,IMP3A"); } -machine_device_initcall(ge_imp3a, mpc85xx_common_publish_devices); +machine_arch_initcall(ge_imp3a, mpc85xx_common_publish_devices); machine_arch_initcall(ge_imp3a, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c index 767c7cf..9bac2c2 100644 --- a/arch/powerpc/platforms/85xx/mpc8536_ds.c +++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c @@ -17,7 +17,6 @@ #include <linux/seq_file.h> #include <linux/interrupt.h> #include <linux/of_platform.h> -#include <linux/memblock.h> #include <asm/time.h> #include <asm/machdep.h> @@ -46,46 +45,15 @@ void __init mpc8536_ds_pic_init(void) */ static void __init mpc8536_ds_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; - struct pci_controller *hose; -#endif - dma_addr_t max = 0xffffffff; - if (ppc_md.progress) ppc_md.progress("mpc8536_ds_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8540-pci") || - of_device_is_compatible(np, "fsl,mpc8548-pcie")) { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - - hose = pci_find_hose_for_OF_device(np); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } - } - -#endif - -#ifdef CONFIG_SWIOTLB - if ((memblock_end_of_DRAM() - 1) > max) { - ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } -#endif + swiotlb_detect_4g(); printk("MPC8536 DS board from Freescale Semiconductor\n"); } -machine_device_initcall(mpc8536_ds, mpc85xx_common_publish_devices); +machine_arch_initcall(mpc8536_ds, mpc85xx_common_publish_devices); machine_arch_initcall(mpc8536_ds, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index 29ee8fc..ae3ab48 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c @@ -137,10 +137,6 @@ static void __init init_ioports(void) static void __init mpc85xx_ads_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - if (ppc_md.progress) ppc_md.progress("mpc85xx_ads_setup_arch()", 0); @@ -150,9 +146,6 @@ static void __init mpc85xx_ads_setup_arch(void) #endif #ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") - fsl_add_bridge(np, 1); - ppc_md.pci_exclude_device = mpc85xx_exclude_device; #endif } @@ -173,7 +166,7 @@ static void mpc85xx_ads_show_cpuinfo(struct seq_file *m) seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); } -machine_device_initcall(mpc85xx_ads, mpc85xx_common_publish_devices); +machine_arch_initcall(mpc85xx_ads, mpc85xx_common_publish_devices); /* * Called very early, device-tree isn't unflattened diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c index 11156fb..7b77b7cb 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c @@ -309,18 +309,6 @@ static void __init mpc85xx_cds_setup_arch(void) } #ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8540-pci") || - of_device_is_compatible(np, "fsl,mpc8548-pcie")) { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - } - } - ppc_md.pci_irq_fixup = mpc85xx_cds_pci_irq_fixup; ppc_md.pci_exclude_device = mpc85xx_exclude_device; #endif @@ -355,7 +343,7 @@ static int __init mpc85xx_cds_probe(void) return of_flat_dt_is_compatible(root, "MPC85xxCDS"); } -machine_device_initcall(mpc85xx_cds, mpc85xx_common_publish_devices); +machine_arch_initcall(mpc85xx_cds, mpc85xx_common_publish_devices); define_machine(mpc85xx_cds) { .name = "MPC85xx CDS", diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index 56f8c8f..f378253 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c @@ -20,7 +20,6 @@ #include <linux/seq_file.h> #include <linux/interrupt.h> #include <linux/of_platform.h> -#include <linux/memblock.h> #include <asm/time.h> #include <asm/machdep.h> @@ -117,40 +116,16 @@ void __init mpc85xx_ds_pic_init(void) extern int uli_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn); -static struct device_node *pci_with_uli; - static int mpc85xx_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn) { - if (hose->dn == pci_with_uli) + if (hose->dn == fsl_pci_primary) return uli_exclude_device(hose, bus, devfn); return PCIBIOS_SUCCESSFUL; } #endif /* CONFIG_PCI */ -static void __init mpc85xx_ds_pci_init(void) -{ -#ifdef CONFIG_PCI - struct device_node *node; - - fsl_pci_init(); - - /* See if we have a ULI under the primary */ - - node = of_find_node_by_name(NULL, "uli1575"); - while ((pci_with_uli = of_get_parent(node))) { - of_node_put(node); - node = pci_with_uli; - - if (pci_with_uli == fsl_pci_primary) { - ppc_md.pci_exclude_device = mpc85xx_exclude_device; - break; - } - } -#endif -} - /* * Setup the architecture */ @@ -159,8 +134,11 @@ static void __init mpc85xx_ds_setup_arch(void) if (ppc_md.progress) ppc_md.progress("mpc85xx_ds_setup_arch()", 0); +#ifdef CONFIG_PCI + ppc_md.pci_exclude_device = mpc85xx_exclude_device; +#endif + swiotlb_detect_4g(); - mpc85xx_ds_pci_init(); mpc85xx_smp_init(); printk("MPC85xx DS board from Freescale Semiconductor\n"); @@ -176,9 +154,9 @@ static int __init mpc8544_ds_probe(void) return !!of_flat_dt_is_compatible(root, "MPC8544DS"); } -machine_device_initcall(mpc8544_ds, mpc85xx_common_publish_devices); -machine_device_initcall(mpc8572_ds, mpc85xx_common_publish_devices); -machine_device_initcall(p2020_ds, mpc85xx_common_publish_devices); +machine_arch_initcall(mpc8544_ds, mpc85xx_common_publish_devices); +machine_arch_initcall(mpc8572_ds, mpc85xx_common_publish_devices); +machine_arch_initcall(p2020_ds, mpc85xx_common_publish_devices); machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier); machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index 8e4b094..555b106 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c @@ -327,44 +327,14 @@ static void __init mpc85xx_mds_qeic_init(void) { } static void __init mpc85xx_mds_setup_arch(void) { -#ifdef CONFIG_PCI - struct pci_controller *hose; - struct device_node *np; -#endif - dma_addr_t max = 0xffffffff; - if (ppc_md.progress) ppc_md.progress("mpc85xx_mds_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8540-pci") || - of_device_is_compatible(np, "fsl,mpc8548-pcie")) { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - - hose = pci_find_hose_for_OF_device(np); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } - } -#endif - mpc85xx_smp_init(); mpc85xx_mds_qe_init(); -#ifdef CONFIG_SWIOTLB - if ((memblock_end_of_DRAM() - 1) > max) { - ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } -#endif + swiotlb_detect_4g(); } @@ -409,9 +379,9 @@ static int __init mpc85xx_publish_devices(void) return mpc85xx_common_publish_devices(); } -machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices); -machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices); -machine_device_initcall(p1021_mds, mpc85xx_common_publish_devices); +machine_arch_initcall(mpc8568_mds, mpc85xx_publish_devices); +machine_arch_initcall(mpc8569_mds, mpc85xx_publish_devices); +machine_arch_initcall(p1021_mds, mpc85xx_common_publish_devices); machine_arch_initcall(mpc8568_mds, swiotlb_setup_bus_notifier); machine_arch_initcall(mpc8569_mds, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c index 1910fdc..f4a0b7a 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c @@ -86,21 +86,13 @@ void __init mpc85xx_rdb_pic_init(void) */ static void __init mpc85xx_rdb_setup_arch(void) { -#if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE) +#ifdef CONFIG_QUICC_ENGINE struct device_node *np; #endif if (ppc_md.progress) ppc_md.progress("mpc85xx_rdb_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8548-pcie")) - fsl_add_bridge(np, 0); - } - -#endif - mpc85xx_smp_init(); #ifdef CONFIG_QUICC_ENGINE @@ -161,15 +153,15 @@ qe_fail: printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n"); } -machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices); -machine_device_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices); -machine_device_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices); -machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices); -machine_device_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices); -machine_device_initcall(p1020_utm_pc, mpc85xx_common_publish_devices); -machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices); -machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices); -machine_device_initcall(p1024_rdb, mpc85xx_common_publish_devices); +machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices); +machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices); +machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices); +machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices); +machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices); +machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices); +machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices); +machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices); +machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices); /* * Called very early, device-tree isn't unflattened diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c b/arch/powerpc/platforms/85xx/p1010rdb.c index dbaf443..a893bf1 100644 --- a/arch/powerpc/platforms/85xx/p1010rdb.c +++ b/arch/powerpc/platforms/85xx/p1010rdb.c @@ -46,25 +46,13 @@ void __init p1010_rdb_pic_init(void) */ static void __init p1010_rdb_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - if (ppc_md.progress) ppc_md.progress("p1010_rdb_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,p1010-pcie")) - fsl_add_bridge(np, 0); - } - -#endif - printk(KERN_INFO "P1010 RDB board from Freescale Semiconductor\n"); } -machine_device_initcall(p1010_rdb, mpc85xx_common_publish_devices); +machine_arch_initcall(p1010_rdb, mpc85xx_common_publish_devices); machine_arch_initcall(p1010_rdb, swiotlb_setup_bus_notifier); /* diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c index 3c732ac..a32efb9 100644 --- a/arch/powerpc/platforms/85xx/p1022_ds.c +++ b/arch/powerpc/platforms/85xx/p1022_ds.c @@ -18,7 +18,6 @@ #include <linux/pci.h> #include <linux/of_platform.h> -#include <linux/memblock.h> #include <asm/div64.h> #include <asm/mpic.h> #include <asm/swiotlb.h> @@ -507,32 +506,9 @@ early_param("video", early_video_setup); */ static void __init p1022_ds_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - dma_addr_t max = 0xffffffff; - if (ppc_md.progress) ppc_md.progress("p1022_ds_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,p1022-pcie") { - struct resource rsrc; - struct pci_controller *hose; - - of_address_to_resource(np, 0, &rsrc); - - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - - hose = pci_find_hose_for_OF_device(np); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } -#endif - #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) diu_ops.get_pixel_format = p1022ds_get_pixel_format; diu_ops.set_gamma_table = p1022ds_set_gamma_table; @@ -601,18 +577,12 @@ static void __init p1022_ds_setup_arch(void) mpc85xx_smp_init(); -#ifdef CONFIG_SWIOTLB - if ((memblock_end_of_DRAM() - 1) > max) { - ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } -#endif + swiotlb_detect_4g(); pr_info("Freescale P1022 DS reference board\n"); } -machine_device_initcall(p1022_ds, mpc85xx_common_publish_devices); +machine_arch_initcall(p1022_ds, mpc85xx_common_publish_devices); machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/p1022_rdk.c b/arch/powerpc/platforms/85xx/p1022_rdk.c index b3cf11b..4d328aa 100644 --- a/arch/powerpc/platforms/85xx/p1022_rdk.c +++ b/arch/powerpc/platforms/85xx/p1022_rdk.c @@ -14,7 +14,6 @@ #include <linux/pci.h> #include <linux/of_platform.h> -#include <linux/memblock.h> #include <asm/div64.h> #include <asm/mpic.h> #include <asm/swiotlb.h> @@ -121,32 +120,9 @@ void __init p1022_rdk_pic_init(void) */ static void __init p1022_rdk_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - dma_addr_t max = 0xffffffff; - if (ppc_md.progress) ppc_md.progress("p1022_rdk_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,p1022-pcie") { - struct resource rsrc; - struct pci_controller *hose; - - of_address_to_resource(np, 0, &rsrc); - - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - - hose = pci_find_hose_for_OF_device(np); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } -#endif - #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) diu_ops.set_monitor_port = p1022rdk_set_monitor_port; diu_ops.set_pixel_clock = p1022rdk_set_pixel_clock; @@ -155,18 +131,12 @@ static void __init p1022_rdk_setup_arch(void) mpc85xx_smp_init(); -#ifdef CONFIG_SWIOTLB - if ((memblock_end_of_DRAM() - 1) > max) { - ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } -#endif + swiotlb_detect_4g(); pr_info("Freescale / iVeia P1022 RDK reference board\n"); } -machine_device_initcall(p1022_rdk, mpc85xx_common_publish_devices); +machine_arch_initcall(p1022_rdk, mpc85xx_common_publish_devices); machine_arch_initcall(p1022_rdk, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/p1023_rds.c b/arch/powerpc/platforms/85xx/p1023_rds.c index 2990e8b..606eff9 100644 --- a/arch/powerpc/platforms/85xx/p1023_rds.c +++ b/arch/powerpc/platforms/85xx/p1023_rds.c @@ -80,15 +80,10 @@ static void __init mpc85xx_rds_setup_arch(void) } } -#ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,p1023-pcie") - fsl_add_bridge(np, 0); -#endif - mpc85xx_smp_init(); } -machine_device_initcall(p1023_rds, mpc85xx_common_publish_devices); +machine_arch_initcall(p1023_rds, mpc85xx_common_publish_devices); static void __init mpc85xx_rds_pic_init(void) { diff --git a/arch/powerpc/platforms/85xx/p2041_rdb.c b/arch/powerpc/platforms/85xx/p2041_rdb.c index 6541fa2..000c089 100644 --- a/arch/powerpc/platforms/85xx/p2041_rdb.c +++ b/arch/powerpc/platforms/85xx/p2041_rdb.c @@ -80,7 +80,7 @@ define_machine(p2041_rdb) { .power_save = e500_idle, }; -machine_device_initcall(p2041_rdb, corenet_ds_publish_devices); +machine_arch_initcall(p2041_rdb, corenet_ds_publish_devices); #ifdef CONFIG_SWIOTLB machine_arch_initcall(p2041_rdb, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/p3041_ds.c b/arch/powerpc/platforms/85xx/p3041_ds.c index f238efa..b3edc20 100644 --- a/arch/powerpc/platforms/85xx/p3041_ds.c +++ b/arch/powerpc/platforms/85xx/p3041_ds.c @@ -82,7 +82,7 @@ define_machine(p3041_ds) { .power_save = e500_idle, }; -machine_device_initcall(p3041_ds, corenet_ds_publish_devices); +machine_arch_initcall(p3041_ds, corenet_ds_publish_devices); #ifdef CONFIG_SWIOTLB machine_arch_initcall(p3041_ds, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/p4080_ds.c b/arch/powerpc/platforms/85xx/p4080_ds.c index c92417d..54df106 100644 --- a/arch/powerpc/platforms/85xx/p4080_ds.c +++ b/arch/powerpc/platforms/85xx/p4080_ds.c @@ -81,7 +81,7 @@ define_machine(p4080_ds) { .power_save = e500_idle, }; -machine_device_initcall(p4080_ds, corenet_ds_publish_devices); +machine_arch_initcall(p4080_ds, corenet_ds_publish_devices); #ifdef CONFIG_SWIOTLB machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier); #endif diff --git a/arch/powerpc/platforms/85xx/p5020_ds.c b/arch/powerpc/platforms/85xx/p5020_ds.c index 17bef15..753a42c 100644 --- a/arch/powerpc/platforms/85xx/p5020_ds.c +++ b/arch/powerpc/platforms/85xx/p5020_ds.c @@ -91,7 +91,7 @@ define_machine(p5020_ds) { #endif }; -machine_device_initcall(p5020_ds, corenet_ds_publish_devices); +machine_arch_initcall(p5020_ds, corenet_ds_publish_devices); #ifdef CONFIG_SWIOTLB machine_arch_initcall(p5020_ds, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/p5040_ds.c b/arch/powerpc/platforms/85xx/p5040_ds.c index 8e22a34..1138185 100644 --- a/arch/powerpc/platforms/85xx/p5040_ds.c +++ b/arch/powerpc/platforms/85xx/p5040_ds.c @@ -82,7 +82,7 @@ define_machine(p5040_ds) { #endif }; -machine_device_initcall(p5040_ds, corenet_ds_publish_devices); +machine_arch_initcall(p5040_ds, corenet_ds_publish_devices); #ifdef CONFIG_SWIOTLB machine_arch_initcall(p5040_ds, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c b/arch/powerpc/platforms/85xx/qemu_e500.c index 3c5490c..b3f27c5 100644 --- a/arch/powerpc/platforms/85xx/qemu_e500.c +++ b/arch/powerpc/platforms/85xx/qemu_e500.c @@ -41,7 +41,6 @@ static void __init qemu_e500_setup_arch(void) { ppc_md.progress("qemu_e500_setup_arch()", 0); - fsl_pci_init(); swiotlb_detect_4g(); mpc85xx_smp_init(); } @@ -56,7 +55,7 @@ static int __init qemu_e500_probe(void) return !!of_flat_dt_is_compatible(root, "fsl,qemu-e500"); } -machine_device_initcall(qemu_e500, mpc85xx_common_publish_devices); +machine_arch_initcall(qemu_e500, mpc85xx_common_publish_devices); define_machine(qemu_e500) { .name = "QEMU e500", diff --git a/arch/powerpc/platforms/85xx/sbc8548.c b/arch/powerpc/platforms/85xx/sbc8548.c index cd3a66b..2825a62 100644 --- a/arch/powerpc/platforms/85xx/sbc8548.c +++ b/arch/powerpc/platforms/85xx/sbc8548.c @@ -88,26 +88,9 @@ static int __init sbc8548_hw_rev(void) */ static void __init sbc8548_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - if (ppc_md.progress) ppc_md.progress("sbc8548_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8540-pci") || - of_device_is_compatible(np, "fsl,mpc8548-pcie")) { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - } - } -#endif sbc_rev = sbc8548_hw_rev(); } @@ -128,7 +111,7 @@ static void sbc8548_show_cpuinfo(struct seq_file *m) seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); } -machine_device_initcall(sbc8548, mpc85xx_common_publish_devices); +machine_arch_initcall(sbc8548, mpc85xx_common_publish_devices); /* * Called very early, device-tree isn't unflattened diff --git a/arch/powerpc/platforms/85xx/socrates.c b/arch/powerpc/platforms/85xx/socrates.c index b9c6daa..381463e 100644 --- a/arch/powerpc/platforms/85xx/socrates.c +++ b/arch/powerpc/platforms/85xx/socrates.c @@ -66,20 +66,11 @@ static void __init socrates_pic_init(void) */ static void __init socrates_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - if (ppc_md.progress) ppc_md.progress("socrates_setup_arch()", 0); - -#ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") - fsl_add_bridge(np, 1); -#endif } -machine_device_initcall(socrates, mpc85xx_common_publish_devices); +machine_arch_initcall(socrates, mpc85xx_common_publish_devices); /* * Called very early, device-tree isn't unflattened diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c index e050800..bb1b1a7 100644 --- a/arch/powerpc/platforms/85xx/stx_gp3.c +++ b/arch/powerpc/platforms/85xx/stx_gp3.c @@ -60,21 +60,12 @@ static void __init stx_gp3_pic_init(void) */ static void __init stx_gp3_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - if (ppc_md.progress) ppc_md.progress("stx_gp3_setup_arch()", 0); #ifdef CONFIG_CPM2 cpm2_reset(); #endif - -#ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") - fsl_add_bridge(np, 1); -#endif } static void stx_gp3_show_cpuinfo(struct seq_file *m) @@ -93,7 +84,7 @@ static void stx_gp3_show_cpuinfo(struct seq_file *m) seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f)); } -machine_device_initcall(stx_gp3, mpc85xx_common_publish_devices); +machine_arch_initcall(stx_gp3, mpc85xx_common_publish_devices); /* * Called very early, device-tree isn't unflattened diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c index 4d786c2..c8ef526 100644 --- a/arch/powerpc/platforms/85xx/tqm85xx.c +++ b/arch/powerpc/platforms/85xx/tqm85xx.c @@ -59,31 +59,12 @@ static void __init tqm85xx_pic_init(void) */ static void __init tqm85xx_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - if (ppc_md.progress) ppc_md.progress("tqm85xx_setup_arch()", 0); #ifdef CONFIG_CPM2 cpm2_reset(); #endif - -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8540-pci") || - of_device_is_compatible(np, "fsl,mpc8548-pcie")) { - struct resource rsrc; - if (!of_address_to_resource(np, 0, &rsrc)) { - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - } - } - } -#endif } static void tqm85xx_show_cpuinfo(struct seq_file *m) @@ -123,7 +104,7 @@ static void __init tqm85xx_ti1520_fixup(struct pci_dev *pdev) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, tqm85xx_ti1520_fixup); -machine_device_initcall(tqm85xx, mpc85xx_common_publish_devices); +machine_arch_initcall(tqm85xx, mpc85xx_common_publish_devices); static const char *board[] __initdata = { "tqc,tqm8540", diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/powerpc/platforms/85xx/xes_mpc85xx.c index 41c6875..7c9cf6b 100644 --- a/arch/powerpc/platforms/85xx/xes_mpc85xx.c +++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c @@ -111,18 +111,11 @@ static void xes_mpc85xx_fixups(void) } } -#ifdef CONFIG_PCI -static int primary_phb_addr; -#endif - /* * Setup the architecture */ static void __init xes_mpc85xx_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif struct device_node *root; const char *model = "Unknown"; @@ -137,26 +130,12 @@ static void __init xes_mpc85xx_setup_arch(void) xes_mpc85xx_fixups(); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8540-pci") || - of_device_is_compatible(np, "fsl,mpc8548-pcie")) { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == primary_phb_addr) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - } - } -#endif - mpc85xx_smp_init(); } -machine_device_initcall(xes_mpc8572, mpc85xx_common_publish_devices); -machine_device_initcall(xes_mpc8548, mpc85xx_common_publish_devices); -machine_device_initcall(xes_mpc8540, mpc85xx_common_publish_devices); +machine_arch_initcall(xes_mpc8572, mpc85xx_common_publish_devices); +machine_arch_initcall(xes_mpc8548, mpc85xx_common_publish_devices); +machine_arch_initcall(xes_mpc8540, mpc85xx_common_publish_devices); /* * Called very early, device-tree isn't unflattened @@ -165,42 +144,21 @@ static int __init xes_mpc8572_probe(void) { unsigned long root = of_get_flat_dt_root(); - if (of_flat_dt_is_compatible(root, "xes,MPC8572")) { -#ifdef CONFIG_PCI - primary_phb_addr = 0x8000; -#endif - return 1; - } else { - return 0; - } + return of_flat_dt_is_compatible(root, "xes,MPC8572"); } static int __init xes_mpc8548_probe(void) { unsigned long root = of_get_flat_dt_root(); - if (of_flat_dt_is_compatible(root, "xes,MPC8548")) { -#ifdef CONFIG_PCI - primary_phb_addr = 0xb000; -#endif - return 1; - } else { - return 0; - } + return of_flat_dt_is_compatible(root, "xes,MPC8548"); } static int __init xes_mpc8540_probe(void) { unsigned long root = of_get_flat_dt_root(); - if (of_flat_dt_is_compatible(root, "xes,MPC8540")) { -#ifdef CONFIG_PCI - primary_phb_addr = 0xb000; -#endif - return 1; - } else { - return 0; - } + return of_flat_dt_is_compatible(root, "xes,MPC8540"); } define_machine(xes_mpc8572) { diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c index 1fca663..6c7ddb3 100644 --- a/arch/powerpc/platforms/86xx/gef_ppc9a.c +++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c @@ -73,13 +73,6 @@ static void __init gef_ppc9a_init_irq(void) static void __init gef_ppc9a_setup_arch(void) { struct device_node *regs; -#ifdef CONFIG_PCI - struct device_node *np; - - for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") { - fsl_add_bridge(np, 1); - } -#endif printk(KERN_INFO "GE Intelligent Platforms PPC9A 6U VME SBC\n"); @@ -221,6 +214,7 @@ static long __init mpc86xx_time_init(void) static __initdata struct of_device_id of_bus_ids[] = { { .compatible = "simple-bus", }, { .compatible = "gianfar", }, + { .compatible = "fsl,mpc8641-pcie", }, {}, }; @@ -231,7 +225,7 @@ static int __init declare_of_platform_devices(void) return 0; } -machine_device_initcall(gef_ppc9a, declare_of_platform_devices); +machine_arch_initcall(gef_ppc9a, declare_of_platform_devices); define_machine(gef_ppc9a) { .name = "GE PPC9A", diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c index 14e0e576..2195ac7 100644 --- a/arch/powerpc/platforms/86xx/gef_sbc310.c +++ b/arch/powerpc/platforms/86xx/gef_sbc310.c @@ -73,14 +73,6 @@ static void __init gef_sbc310_init_irq(void) static void __init gef_sbc310_setup_arch(void) { struct device_node *regs; -#ifdef CONFIG_PCI - struct device_node *np; - - for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") { - fsl_add_bridge(np, 1); - } -#endif - printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n"); #ifdef CONFIG_SMP @@ -209,6 +201,7 @@ static long __init mpc86xx_time_init(void) static __initdata struct of_device_id of_bus_ids[] = { { .compatible = "simple-bus", }, { .compatible = "gianfar", }, + { .compatible = "fsl,mpc8641-pcie", }, {}, }; @@ -219,7 +212,7 @@ static int __init declare_of_platform_devices(void) return 0; } -machine_device_initcall(gef_sbc310, declare_of_platform_devices); +machine_arch_initcall(gef_sbc310, declare_of_platform_devices); define_machine(gef_sbc310) { .name = "GE SBC310", diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c index 1638f43..52fd6d7 100644 --- a/arch/powerpc/platforms/86xx/gef_sbc610.c +++ b/arch/powerpc/platforms/86xx/gef_sbc610.c @@ -73,13 +73,6 @@ static void __init gef_sbc610_init_irq(void) static void __init gef_sbc610_setup_arch(void) { struct device_node *regs; -#ifdef CONFIG_PCI - struct device_node *np; - - for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") { - fsl_add_bridge(np, 1); - } -#endif printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n"); @@ -198,6 +191,7 @@ static long __init mpc86xx_time_init(void) static __initdata struct of_device_id of_bus_ids[] = { { .compatible = "simple-bus", }, { .compatible = "gianfar", }, + { .compatible = "fsl,mpc8641-pcie", }, {}, }; @@ -208,7 +202,7 @@ static int __init declare_of_platform_devices(void) return 0; } -machine_device_initcall(gef_sbc610, declare_of_platform_devices); +machine_arch_initcall(gef_sbc610, declare_of_platform_devices); define_machine(gef_sbc610) { .name = "GE SBC610", diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c index 62cd3c5..a8229f3 100644 --- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c +++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c @@ -91,6 +91,9 @@ static struct of_device_id __initdata mpc8610_ids[] = { { .compatible = "simple-bus", }, /* So that the DMA channel nodes can be probed individually: */ { .compatible = "fsl,eloplus-dma", }, + /* PCI controllers */ + { .compatible = "fsl,mpc8610-pci", }, + { .compatible = "fsl,mpc8641-pcie", }, {} }; @@ -107,7 +110,7 @@ static int __init mpc8610_declare_of_platform_devices(void) return 0; } -machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices); +machine_arch_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices); #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) @@ -278,25 +281,11 @@ mpc8610hpcd_valid_monitor_port(enum fsl_diu_monitor_port port) static void __init mpc86xx_hpcd_setup_arch(void) { struct resource r; - struct device_node *np; unsigned char *pixis; if (ppc_md.progress) ppc_md.progress("mpc86xx_hpcd_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_node_by_type(np, "pci") { - if (of_device_is_compatible(np, "fsl,mpc8610-pci") - || of_device_is_compatible(np, "fsl,mpc8641-pcie")) { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == 0xa000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - } - } -#endif #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE) diu_ops.get_pixel_format = mpc8610hpcd_get_pixel_format; diu_ops.set_gamma_table = mpc8610hpcd_set_gamma_table; diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c index 817245b..182cbe6 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c @@ -19,7 +19,6 @@ #include <linux/delay.h> #include <linux/seq_file.h> #include <linux/of_platform.h> -#include <linux/memblock.h> #include <asm/time.h> #include <asm/machdep.h> @@ -51,15 +50,8 @@ extern int uli_exclude_device(struct pci_controller *hose, static int mpc86xx_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn) { - struct device_node* node; - struct resource rsrc; - - node = hose->dn; - of_address_to_resource(node, 0, &rsrc); - - if ((rsrc.start & 0xfffff) == 0x8000) { + if (hose->dn == fsl_pci_primary) return uli_exclude_device(hose, bus, devfn); - } return PCIBIOS_SUCCESSFUL; } @@ -69,30 +61,11 @@ static int mpc86xx_exclude_device(struct pci_controller *hose, static void __init mpc86xx_hpcn_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; - struct pci_controller *hose; -#endif - dma_addr_t max = 0xffffffff; - if (ppc_md.progress) ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0); #ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") { - struct resource rsrc; - of_address_to_resource(np, 0, &rsrc); - if ((rsrc.start & 0xfffff) == 0x8000) - fsl_add_bridge(np, 1); - else - fsl_add_bridge(np, 0); - hose = pci_find_hose_for_OF_device(np); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } - ppc_md.pci_exclude_device = mpc86xx_exclude_device; - #endif printk("MPC86xx HPCN board from Freescale Semiconductor\n"); @@ -101,13 +74,7 @@ mpc86xx_hpcn_setup_arch(void) mpc86xx_smp_init(); #endif -#ifdef CONFIG_SWIOTLB - if ((memblock_end_of_DRAM() - 1) > max) { - ppc_swiotlb_enable = 1; - set_pci_dma_ops(&swiotlb_dma_ops); - ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb; - } -#endif + swiotlb_detect_4g(); } @@ -162,6 +129,7 @@ static __initdata struct of_device_id of_bus_ids[] = { { .compatible = "simple-bus", }, { .compatible = "fsl,srio", }, { .compatible = "gianfar", }, + { .compatible = "fsl,mpc8641-pcie", }, {}, }; @@ -171,7 +139,7 @@ static int __init declare_of_platform_devices(void) return 0; } -machine_device_initcall(mpc86xx_hpcn, declare_of_platform_devices); +machine_arch_initcall(mpc86xx_hpcn, declare_of_platform_devices); machine_arch_initcall(mpc86xx_hpcn, swiotlb_setup_bus_notifier); define_machine(mpc86xx_hpcn) { diff --git a/arch/powerpc/platforms/86xx/sbc8641d.c b/arch/powerpc/platforms/86xx/sbc8641d.c index e7007d0..52afebf 100644 --- a/arch/powerpc/platforms/86xx/sbc8641d.c +++ b/arch/powerpc/platforms/86xx/sbc8641d.c @@ -38,18 +38,9 @@ static void __init sbc8641_setup_arch(void) { -#ifdef CONFIG_PCI - struct device_node *np; -#endif - if (ppc_md.progress) ppc_md.progress("sbc8641_setup_arch()", 0); -#ifdef CONFIG_PCI - for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") - fsl_add_bridge(np, 0); -#endif - printk("SBC8641 board from Wind River\n"); #ifdef CONFIG_SMP @@ -102,6 +93,7 @@ mpc86xx_time_init(void) static __initdata struct of_device_id of_bus_ids[] = { { .compatible = "simple-bus", }, { .compatible = "gianfar", }, + { .compatible = "fsl,mpc8641-pcie", }, {}, }; @@ -111,7 +103,7 @@ static int __init declare_of_platform_devices(void) return 0; } -machine_device_initcall(sbc8641, declare_of_platform_devices); +machine_arch_initcall(sbc8641, declare_of_platform_devices); define_machine(sbc8641) { .name = "SBC8641D", diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index da7a3d7..6408d9d 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -826,54 +826,78 @@ static const struct of_device_id pci_ids[] = { struct device_node *fsl_pci_primary; -void __devinit fsl_pci_init(void) +/* Checkout if PCI contains ISA node */ +static int of_pci_has_isa(struct device_node *pci_node) +{ + struct device_node *np; + int ret = 0; + + if (!pci_node) + return 0; + + read_lock(&devtree_lock); + np = pci_node->allnext; + + /* Only scan the children of PCI node */ + for (; np != pci_node->sibling; np = np->allnext) { + if (np->type && (of_node_cmp(np->type, "isa") == 0) + && of_node_get(np)) { + ret = 1; + break; + } + } + + of_node_put(pci_node); + read_unlock(&devtree_lock); + + return ret; +} + +static int __devinit fsl_pci_probe(struct platform_device *pdev) { int ret; - struct device_node *node; struct pci_controller *hose; - dma_addr_t max = 0xffffffff; + int is_primary = 0; - /* Callers can specify the primary bus using other means. */ if (!fsl_pci_primary) { - /* If a PCI host bridge contains an ISA node, it's primary. */ - node = of_find_node_by_type(NULL, "isa"); - while ((fsl_pci_primary = of_get_parent(node))) { - of_node_put(node); - node = fsl_pci_primary; - - if (of_match_node(pci_ids, node)) - break; - } + is_primary = of_pci_has_isa(pdev->dev.of_node); + if (is_primary) + fsl_pci_primary = pdev->dev.of_node; } - node = NULL; - for_each_node_by_type(node, "pci") { - if (of_match_node(pci_ids, node)) { - /* - * If there's no PCI host bridge with ISA, arbitrarily - * designate one as primary. This can go away once - * various bugs with primary-less systems are fixed. - */ - if (!fsl_pci_primary) - fsl_pci_primary = node; - - ret = fsl_add_bridge(node, fsl_pci_primary == node); - if (ret == 0) { - hose = pci_find_hose_for_OF_device(node); - max = min(max, hose->dma_window_base_cur + - hose->dma_window_size); - } - } - } + ret = fsl_add_bridge(pdev->dev.of_node, is_primary); #ifdef CONFIG_SWIOTLB - /* - * if we couldn't map all of DRAM via the dma windows - * we need SWIOTLB to handle buffers located outside of - * dma capable memory region - */ - if (memblock_end_of_DRAM() - 1 > max) - ppc_swiotlb_enable = 1; + if (ret == 0) { + hose = pci_find_hose_for_OF_device(pdev->dev.of_node); + + /* + * if we couldn't map all of DRAM via the dma windows + * we need SWIOTLB to handle buffers located outside of + * dma capable memory region + */ + if (memblock_end_of_DRAM() - 1 > hose->dma_window_base_cur + + hose->dma_window_size) + ppc_swiotlb_enable = 1; + } #endif + + mpc85xx_pci_err_probe(pdev); + + return 0; +} + +static struct platform_driver fsl_pci_driver = { + .driver = { + .name = "fsl-pci", + .of_match_table = pci_ids, + }, + .probe = fsl_pci_probe, +}; + +static int __init fsl_pci_init(void) +{ + return platform_driver_register(&fsl_pci_driver); } +arch_initcall(fsl_pci_init); #endif diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h index baa0fd1..ad54147 100644 --- a/arch/powerpc/sysdev/fsl_pci.h +++ b/arch/powerpc/sysdev/fsl_pci.h @@ -95,10 +95,13 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose); extern struct device_node *fsl_pci_primary; -#ifdef CONFIG_FSL_PCI -void fsl_pci_init(void); +#ifdef CONFIG_EDAC_MPC85XX +int mpc85xx_pci_err_probe(struct platform_device *op); #else -static inline void fsl_pci_init(void) {} +static inline int mpc85xx_pci_err_probe(struct platform_device *op) +{ + return -ENOTSUPP; +} #endif #endif /* __POWERPC_FSL_PCI_H */ diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index 0e37462..2677883 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c @@ -200,7 +200,7 @@ static irqreturn_t mpc85xx_pci_isr(int irq, void *dev_id) return IRQ_HANDLED; } -static int __devinit mpc85xx_pci_err_probe(struct platform_device *op) +int __devinit mpc85xx_pci_err_probe(struct platform_device *op) { struct edac_pci_ctl_info *pci; struct mpc85xx_pci_pdata *pdata; @@ -214,6 +214,16 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op) if (!pci) return -ENOMEM; + /* make sure error reporting method is sane */ + switch (edac_op_state) { + case EDAC_OPSTATE_POLL: + case EDAC_OPSTATE_INT: + break; + default: + edac_op_state = EDAC_OPSTATE_INT; + break; + } + pdata = pci->pvt_info; pdata->name = "mpc85xx_pci_err"; pdata->irq = NO_IRQ; @@ -303,6 +313,7 @@ err: devres_release_group(&op->dev, mpc85xx_pci_err_probe); return res; } +EXPORT_SYMBOL_GPL(mpc85xx_pci_err_probe); static int mpc85xx_pci_err_remove(struct platform_device *op) { @@ -326,27 +337,6 @@ static int mpc85xx_pci_err_remove(struct platform_device *op) return 0; } -static struct of_device_id mpc85xx_pci_err_of_match[] = { - { - .compatible = "fsl,mpc8540-pcix", - }, - { - .compatible = "fsl,mpc8540-pci", - }, - {}, -}; -MODULE_DEVICE_TABLE(of, mpc85xx_pci_err_of_match); - -static struct platform_driver mpc85xx_pci_err_driver = { - .probe = mpc85xx_pci_err_probe, - .remove = __devexit_p(mpc85xx_pci_err_remove), - .driver = { - .name = "mpc85xx_pci_err", - .owner = THIS_MODULE, - .of_match_table = mpc85xx_pci_err_of_match, - }, -}; - #endif /* CONFIG_PCI */ /**************************** L2 Err device ***************************/ @@ -1193,12 +1183,6 @@ static int __init mpc85xx_mc_init(void) if (res) printk(KERN_WARNING EDAC_MOD_STR "L2 fails to register\n"); -#ifdef CONFIG_PCI - res = platform_driver_register(&mpc85xx_pci_err_driver); - if (res) - printk(KERN_WARNING EDAC_MOD_STR "PCI fails to register\n"); -#endif - #ifdef CONFIG_FSL_SOC_BOOKE pvr = mfspr(SPRN_PVR); @@ -1235,9 +1219,6 @@ static void __exit mpc85xx_mc_exit(void) on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0); } #endif -#ifdef CONFIG_PCI - platform_driver_unregister(&mpc85xx_pci_err_driver); -#endif platform_driver_unregister(&mpc85xx_l2_err_driver); platform_driver_unregister(&mpc85xx_mc_err_driver); }