| Message ID | 1342509511-13942-1-git-send-email-Shaohui.Xie@freescale.com (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Commit | e1bd5d8bc13f51c7c991f04255b3868e31933252 |
| Delegated to: | Kumar Gala |
| Headers | show |
On Jul 17, 2012, at 2:18 AM, Shaohui Xie wrote: > Default CCB on P3041 is 750MHz, but espi cannot work at 40MHz with this CCB, > so we need to slow down the clock rate of espi to 35MHz to make it work stable > with the CCB. > > Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> > --- > arch/powerpc/boot/dts/p3041ds.dts | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) applied to next - k
diff --git a/arch/powerpc/boot/dts/p3041ds.dts b/arch/powerpc/boot/dts/p3041ds.dts index 22a215e..6cdcadc 100644 --- a/arch/powerpc/boot/dts/p3041ds.dts +++ b/arch/powerpc/boot/dts/p3041ds.dts @@ -58,7 +58,7 @@ #size-cells = <1>; compatible = "spansion,s25sl12801"; reg = <0>; - spi-max-frequency = <40000000>; /* input clock */ + spi-max-frequency = <35000000>; /* input clock */ partition@u-boot { label = "u-boot"; reg = <0x00000000 0x00100000>;
Default CCB on P3041 is 750MHz, but espi cannot work at 40MHz with this CCB, so we need to slow down the clock rate of espi to 35MHz to make it work stable with the CCB. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> --- arch/powerpc/boot/dts/p3041ds.dts | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)