diff mbox series

[v3,15/29] powerpc: Add <bits/pagesize.h>

Message ID ad4e04090afc7409127ad85f3ce77f0ab67b80bf.1727624528.git.fweimer@redhat.com
State New
Headers show
Series Teach glibc about possible page sizes and handle gaps in ld.so | expand

Commit Message

Florian Weimer Sept. 29, 2024, 4:23 p.m. UTC 
According to arch/powerpc/Kconfig in the Linux kernel sources,
PowerPC supports page sizes up to 256 KiB.  However, in practice,
only page sizes up to 64 KiB are used, especially on 64-bit targets.

If 256 KiB page support is needed, it is probably best to add a
configure check for linker LOAD segment alignment and generate a
<bits/pagesize.h> file that has 256 KiB as the maximum page size.
Regular toolchain defaults only support 64 KiB as the maximum
page size.
---
 sysdeps/powerpc/bits/pagesize.h | 2 ++
 1 file changed, 2 insertions(+)
 create mode 100644 sysdeps/powerpc/bits/pagesize.h

Comments

Peter Bergner Oct. 3, 2024, 10:13 p.m. UTC | #1 
On 9/30/24 4:15 AM, Florian Weimer wrote:
> * Maciej W. Rozycki:
>>  NB other page sizes are architecturally supported by TLB MMU hardware, 
>> from 1 KiB up to 256 TiB, but not by the MIPS port of Linux, so shouldn't 
>> this be sysdeps/unix/sysv/linux/mips/bits/pagesize.h instead, so as not to 
>> apply the limitations of MIPS/Linux to the generic MIPS architecture?
> 
> In theory, any architecture could have future CPUs that support larger
> page sizes, so there is no absolute strict upper limit.  For
> <sys/pagesize.h> to be useful to programmers, the maximum needs to
> reflect what they can reasonably expect to matter during the life time
> of the file format and application.

Power supports page sizes much larger than 64K too, but given your
response above...


On 9/29/24 11:23 AM, Florian Weimer wrote:
> According to arch/powerpc/Kconfig in the Linux kernel sources,
> PowerPC supports page sizes up to 256 KiB.  However, in practice,
> only page sizes up to 64 KiB are used, especially on 64-bit targets.
> 
> If 256 KiB page support is needed, it is probably best to add a
> configure check for linker LOAD segment alignment and generate a
> <bits/pagesize.h> file that has 256 KiB as the maximum page size.
> Regular toolchain defaults only support 64 KiB as the maximum
> page size.
> ---
>  sysdeps/powerpc/bits/pagesize.h | 2 ++
>  1 file changed, 2 insertions(+)
>  create mode 100644 sysdeps/powerpc/bits/pagesize.h
> 
> diff --git a/sysdeps/powerpc/bits/pagesize.h b/sysdeps/powerpc/bits/pagesize.h
> new file mode 100644
> index 0000000000..cd688d3fb0
> --- /dev/null
> +++ b/sysdeps/powerpc/bits/pagesize.h
> @@ -0,0 +1,2 @@
> +#define __GLIBC_PAGE_SHIFT_MIN 12
> +#define __GLIBC_PAGE_SHIFT_MAX 16

LGTM.

Reviewed-by: Peter Bergner <bergner@linux.ibm.com>

Peter
diff mbox series

Patch

diff --git a/sysdeps/powerpc/bits/pagesize.h b/sysdeps/powerpc/bits/pagesize.h
new file mode 100644
index 0000000000..cd688d3fb0
--- /dev/null
+++ b/sysdeps/powerpc/bits/pagesize.h
@@ -0,0 +1,2 @@ 
+#define __GLIBC_PAGE_SHIFT_MIN 12
+#define __GLIBC_PAGE_SHIFT_MAX 16