| Message ID | 2149741.9o76ZdvQCi@fomalhaut |
|---|---|
| State | New |
| Headers | show |
| Series | Aarch64: Define WIDEST_HARDWARE_FP_SIZE | expand |
Eric Botcazou <botcazou@adacore.com> writes: > Hi, > > the macro is documented like this in the internal manual: > > -- Macro: WIDEST_HARDWARE_FP_SIZE > A C expression for the size in bits of the widest floating-point > format supported by the hardware. If you define this macro, you > must specify a value less than or equal to mode precision of the > mode used for C type 'long double' (from hook > 'targetm.c.mode_for_floating_type' with argument > 'TI_LONG_DOUBLE_TYPE'). If you do not define this macro, mode > precision of the mode used for C type 'long double' is the default. > > AArch64 uses 128-bit TFmode for long double but, as far as I know, no FPU > implemented in hardware supports it. > > WIDEST_HARDWARE_FP_SIZE is taken into account in exactly two places: > - in libgcc for the implementation of float[uns]ti{sd}f, > - in the Ada front-end to cap the size clauses of floating-point types. > > The effect of the change on the first place can be seen by running nm on > libgcc/_floatdisf.o (which implements floattisf for Aarch64), from: > U __addtf3 > U __floatditf > 0000000000000000 T __floattisf > U __floatunditf > U __multf3 > U __trunctfsf2 > to just > 0000000000000000 T __floattisf Oops! Guess no-one looked in detail at the implementation, given that it did work (if via an incredibly convoluted route). The new implementation looks much better... > The effect of the change on the second place can be seen on the attached Ada > testcase, which fails without it and passes with it. > > Bootstrapped/regtested on Aarch64/Linux, OK for the mainline? > > > 2024-10-01 Eric Botcazou <ebotcazou@adacore.com> > > * config/aarch64/aarch64.h (WIDEST_HARDWARE_FP_SIZE): Define to 64. > > > 2024-10-01 Eric Botcazou <ebotcazou@adacore.com> > > * gnat.dg/specs/size_clause6.ads: New test. OK, thanks. Richard
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index ec8fde783b3..acc26aed808 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -96,6 +96,8 @@ #define LONG_LONG_TYPE_SIZE 64 +#define WIDEST_HARDWARE_FP_SIZE 64 + /* This value is the amount of bytes a caller is allowed to drop the stack before probing has to be done for stack clash protection. */ #define STACK_CLASH_CALLER_GUARD 1024
Hi, the macro is documented like this in the internal manual: -- Macro: WIDEST_HARDWARE_FP_SIZE A C expression for the size in bits of the widest floating-point format supported by the hardware. If you define this macro, you must specify a value less than or equal to mode precision of the mode used for C type 'long double' (from hook 'targetm.c.mode_for_floating_type' with argument 'TI_LONG_DOUBLE_TYPE'). If you do not define this macro, mode precision of the mode used for C type 'long double' is the default. AArch64 uses 128-bit TFmode for long double but, as far as I know, no FPU implemented in hardware supports it. WIDEST_HARDWARE_FP_SIZE is taken into account in exactly two places: - in libgcc for the implementation of float[uns]ti{sd}f, - in the Ada front-end to cap the size clauses of floating-point types. The effect of the change on the first place can be seen by running nm on libgcc/_floatdisf.o (which implements floattisf for Aarch64), from: U __addtf3 U __floatditf 0000000000000000 T __floattisf U __floatunditf U __multf3 U __trunctfsf2 to just 0000000000000000 T __floattisf The effect of the change on the second place can be seen on the attached Ada testcase, which fails without it and passes with it. Bootstrapped/regtested on Aarch64/Linux, OK for the mainline? 2024-10-01 Eric Botcazou <ebotcazou@adacore.com> * config/aarch64/aarch64.h (WIDEST_HARDWARE_FP_SIZE): Define to 64. 2024-10-01 Eric Botcazou <ebotcazou@adacore.com> * gnat.dg/specs/size_clause6.ads: New test.