diff mbox

[SRU,N,0/1] Intel Arrow Lake Graphics feature backport request

Message ID 20240923203716.35434-1-michael.reed@canonical.com
State New
Headers show

Commit Message

Michael Reed Sept. 23, 2024, 8:37 p.m. UTC 
From: Michael Reed <Michael.Reed@canonical.com>

BugLink: https://bugs.launchpad.net/bugs/2077140

SRU Justification:

[Impact]
Add Arrow Lake H support

According to https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=6a9b38cc68a03b948df1f3fcb907c7557cfc315c and
https://www.phoronix.com/news/Intel-Arrow-Lake-Linux-6.9-Gfx, Intel Arrow Lake Graphics feature(Xe driver) is ready for Linux kernel 6.9.

[Fix]

"""""
commit 6a9b38cc68a03b948df1f3fcb907c7557cfc315c
Author: Matt Roper <matthew.d.roper@intel.com>
Date: Tue Mar 5 16:40:49 2024 -0800

    drm/xe/arl: Add Arrow Lake H support

    ARL-H uses the same media and display IP as MTL, and a version 12.74
    graphics IP (referred to as Xe_LPG+). From a driver point of view, we
    should be able to just treat the whole platform as MTL and rely on
    GRAPHICS_VERx100 checks to handle any spots where ARL's Xe_LPG+ needs
    different handling from MTL's Xe_LPG (i.e., workarounds).

    v2: Resolve conflict and Reorder PCI ids in sorted order
    v3: Append signed-off-by commiter to this commit

    Bspec: 55420
    Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
    Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
    Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20240229070806.3402641-4
-dnyaneshwar.bhadane@intel.com


"""""
https://git.launchpad.net/~ubuntu-kernel/ubuntu/+source/linux/+git/noble/tree/include/drm/xe_pciids.h

[Where problems could occur]

[Other Info]
https://code.launchpad.net/~mreed8855/ubuntu/+source/linux/+git/noble/+ref/lp_2077140_intel_arrowlake

Matt Roper (1):
  drm/xe/arl: Add Arrow Lake H support

 include/drm/xe_pciids.h | 3 +++
 1 file changed, 3 insertions(+)

Comments

Timo Aaltonen Sept. 24, 2024, 7:04 a.m. UTC | #1 
Michael Reed kirjoitti 23.9.2024 klo 23.37:
> From: Michael Reed <Michael.Reed@canonical.com>
> 
> BugLink: https://bugs.launchpad.net/bugs/2077140
> 
> SRU Justification:
> 
> [Impact]
> Add Arrow Lake H support
> 
> According to https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=6a9b38cc68a03b948df1f3fcb907c7557cfc315c and
> https://www.phoronix.com/news/Intel-Arrow-Lake-Linux-6.9-Gfx, Intel Arrow Lake Graphics feature(Xe driver) is ready for Linux kernel 6.9.
> 
> [Fix]
> 
> """""
> commit 6a9b38cc68a03b948df1f3fcb907c7557cfc315c
> Author: Matt Roper <matthew.d.roper@intel.com>
> Date: Tue Mar 5 16:40:49 2024 -0800
> 
>      drm/xe/arl: Add Arrow Lake H support
> 
>      ARL-H uses the same media and display IP as MTL, and a version 12.74
>      graphics IP (referred to as Xe_LPG+). From a driver point of view, we
>      should be able to just treat the whole platform as MTL and rely on
>      GRAPHICS_VERx100 checks to handle any spots where ARL's Xe_LPG+ needs
>      different handling from MTL's Xe_LPG (i.e., workarounds).
> 
>      v2: Resolve conflict and Reorder PCI ids in sorted order
>      v3: Append signed-off-by commiter to this commit
> 
>      Bspec: 55420
>      Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
>      Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
>      Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
>      Link: https://patchwork.freedesktop.org/patch/msgid/20240229070806.3402641-4
> -dnyaneshwar.bhadane@intel.com
> 
> diff --git a/include/drm/xe_pciids.h b/include/drm/xe_pciids.h
> index de1a344737bc..bc7cbef6e9d8 100644
> --- a/include/drm/xe_pciids.h
> +++ b/include/drm/xe_pciids.h
> @@ -176,10 +176,13 @@
> /* MTL / ARL */
> #define XE_MTL_IDS(MACRO__, ...) \
>          MACRO__(0x7D40, ## __VA_ARGS__), \
> + MACRO__(0x7D41, ## __VA_ARGS__), \
>          MACRO__(0x7D45, ## __VA_ARGS__), \
> + MACRO__(0x7D51, ## __VA_ARGS__), \
>          MACRO__(0x7D55, ## __VA_ARGS__), \
>          MACRO__(0x7D60, ## __VA_ARGS__), \
>          MACRO__(0x7D67, ## __VA_ARGS__), \
> + MACRO__(0x7DD1, ## __VA_ARGS__), \
>          MACRO__(0x7DD5, ## __VA_ARGS__)
> 
> #define XE_LNL_IDS(MACRO__, ...) \
> 
> """""
> https://git.launchpad.net/~ubuntu-kernel/ubuntu/+source/linux/+git/noble/tree/include/drm/xe_pciids.h
> 
> [Where problems could occur]
> 
> [Other Info]
> https://code.launchpad.net/~mreed8855/ubuntu/+source/linux/+git/noble/+ref/lp_2077140_intel_arrowlake
> 
> Matt Roper (1):
>    drm/xe/arl: Add Arrow Lake H support
> 
>   include/drm/xe_pciids.h | 3 +++
>   1 file changed, 3 insertions(+)
> 

Commented on the bug as well, but I don't think this is useful to 
backport, as ARL uses drm/i915 by default and not drm/xe. Commit 
bddacdf4861c0 is likely what you need instead.
Michael Reed Sept. 24, 2024, 5:12 p.m. UTC | #2 
Thank you for the input, I will check with Lenovo.

On Tue, Sep 24, 2024 at 2:04 AM Timo Aaltonen <tjaalton@ubuntu.com> wrote:

> Michael Reed kirjoitti 23.9.2024 klo 23.37:
> > From: Michael Reed <Michael.Reed@canonical.com>
> >
> > BugLink: https://bugs.launchpad.net/bugs/2077140
> >
> > SRU Justification:
> >
> > [Impact]
> > Add Arrow Lake H support
> >
> > According to
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=6a9b38cc68a03b948df1f3fcb907c7557cfc315c
> and
> > https://www.phoronix.com/news/Intel-Arrow-Lake-Linux-6.9-Gfx, Intel
> Arrow Lake Graphics feature(Xe driver) is ready for Linux kernel 6.9.
> >
> > [Fix]
> >
> > """""
> > commit 6a9b38cc68a03b948df1f3fcb907c7557cfc315c
> > Author: Matt Roper <matthew.d.roper@intel.com>
> > Date: Tue Mar 5 16:40:49 2024 -0800
> >
> >      drm/xe/arl: Add Arrow Lake H support
> >
> >      ARL-H uses the same media and display IP as MTL, and a version 12.74
> >      graphics IP (referred to as Xe_LPG+). From a driver point of view,
> we
> >      should be able to just treat the whole platform as MTL and rely on
> >      GRAPHICS_VERx100 checks to handle any spots where ARL's Xe_LPG+
> needs
> >      different handling from MTL's Xe_LPG (i.e., workarounds).
> >
> >      v2: Resolve conflict and Reorder PCI ids in sorted order
> >      v3: Append signed-off-by commiter to this commit
> >
> >      Bspec: 55420
> >      Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> >      Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
> >      Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
> >      Link:
> https://patchwork.freedesktop.org/patch/msgid/20240229070806.3402641-4
> > -dnyaneshwar.bhadane@intel.com
> >
> > diff --git a/include/drm/xe_pciids.h b/include/drm/xe_pciids.h
> > index de1a344737bc..bc7cbef6e9d8 100644
> > --- a/include/drm/xe_pciids.h
> > +++ b/include/drm/xe_pciids.h
> > @@ -176,10 +176,13 @@
> > /* MTL / ARL */
> > #define XE_MTL_IDS(MACRO__, ...) \
> >          MACRO__(0x7D40, ## __VA_ARGS__), \
> > + MACRO__(0x7D41, ## __VA_ARGS__), \
> >          MACRO__(0x7D45, ## __VA_ARGS__), \
> > + MACRO__(0x7D51, ## __VA_ARGS__), \
> >          MACRO__(0x7D55, ## __VA_ARGS__), \
> >          MACRO__(0x7D60, ## __VA_ARGS__), \
> >          MACRO__(0x7D67, ## __VA_ARGS__), \
> > + MACRO__(0x7DD1, ## __VA_ARGS__), \
> >          MACRO__(0x7DD5, ## __VA_ARGS__)
> >
> > #define XE_LNL_IDS(MACRO__, ...) \
> >
> > """""
> >
> https://git.launchpad.net/~ubuntu-kernel/ubuntu/+source/linux/+git/noble/tree/include/drm/xe_pciids.h
> >
> > [Where problems could occur]
> >
> > [Other Info]
> >
> https://code.launchpad.net/~mreed8855/ubuntu/+source/linux/+git/noble/+ref/lp_2077140_intel_arrowlake
> >
> > Matt Roper (1):
> >    drm/xe/arl: Add Arrow Lake H support
> >
> >   include/drm/xe_pciids.h | 3 +++
> >   1 file changed, 3 insertions(+)
> >
>
> Commented on the bug as well, but I don't think this is useful to
> backport, as ARL uses drm/i915 by default and not drm/xe. Commit
> bddacdf4861c0 is likely what you need instead.
>
>
> --
> t
>
>
Stefan Bader Sept. 25, 2024, 8:07 a.m. UTC | #3 
On 24.09.24 19:12, Michael Reed wrote:
> Thank you for the input, I will check with Lenovo.

Does this mean we can ignore this submission and there will be a v2? 
Could you send self-NACKs in that case so we can close/ignore this 
thread? Thanks.

-Stefan

> 
> On Tue, Sep 24, 2024 at 2:04 AM Timo Aaltonen <tjaalton@ubuntu.com 
> <mailto:tjaalton@ubuntu.com>> wrote:
> 
> 
>     Commented on the bug as well, but I don't think this is useful to
>     backport, as ARL uses drm/i915 by default and not drm/xe. Commit
>     bddacdf4861c0 is likely what you need instead.
>
Michael Reed Oct. 2, 2024, 8:16 p.m. UTC | #4 
On Mon, Sep 23, 2024 at 3:37 PM Michael Reed <michael.reed@canonical.com>
wrote:

> From: Michael Reed <Michael.Reed@canonical.com>
>
> BugLink: https://bugs.launchpad.net/bugs/2077140
>
> SRU Justification:
>
> [Impact]
> Add Arrow Lake H support
>
> According to
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=6a9b38cc68a03b948df1f3fcb907c7557cfc315c
> and
> https://www.phoronix.com/news/Intel-Arrow-Lake-Linux-6.9-Gfx, Intel Arrow
> Lake Graphics feature(Xe driver) is ready for Linux kernel 6.9.
>
> [Fix]
>
> """""
> commit 6a9b38cc68a03b948df1f3fcb907c7557cfc315c
> Author: Matt Roper <matthew.d.roper@intel.com>
> Date: Tue Mar 5 16:40:49 2024 -0800
>
>     drm/xe/arl: Add Arrow Lake H support
>
>     ARL-H uses the same media and display IP as MTL, and a version 12.74
>     graphics IP (referred to as Xe_LPG+). From a driver point of view, we
>     should be able to just treat the whole platform as MTL and rely on
>     GRAPHICS_VERx100 checks to handle any spots where ARL's Xe_LPG+ needs
>     different handling from MTL's Xe_LPG (i.e., workarounds).
>
>     v2: Resolve conflict and Reorder PCI ids in sorted order
>     v3: Append signed-off-by commiter to this commit
>
>     Bspec: 55420
>     Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
>     Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
>     Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
>     Link:
> https://patchwork.freedesktop.org/patch/msgid/20240229070806.3402641-4
> -dnyaneshwar.bhadane@intel.com
> <https://patchwork.freedesktop.org/patch/msgid/20240229070806.3402641-4-dnyaneshwar.bhadane@intel.com>
>
> diff --git a/include/drm/xe_pciids.h b/include/drm/xe_pciids.h
> index de1a344737bc..bc7cbef6e9d8 100644
> --- a/include/drm/xe_pciids.h
> +++ b/include/drm/xe_pciids.h
> @@ -176,10 +176,13 @@
> /* MTL / ARL */
> #define XE_MTL_IDS(MACRO__, ...) \
>         MACRO__(0x7D40, ## __VA_ARGS__), \
> + MACRO__(0x7D41, ## __VA_ARGS__), \
>         MACRO__(0x7D45, ## __VA_ARGS__), \
> + MACRO__(0x7D51, ## __VA_ARGS__), \
>         MACRO__(0x7D55, ## __VA_ARGS__), \
>         MACRO__(0x7D60, ## __VA_ARGS__), \
>         MACRO__(0x7D67, ## __VA_ARGS__), \
> + MACRO__(0x7DD1, ## __VA_ARGS__), \
>         MACRO__(0x7DD5, ## __VA_ARGS__)
>
> #define XE_LNL_IDS(MACRO__, ...) \
>
> """""
>
> https://git.launchpad.net/~ubuntu-kernel/ubuntu/+source/linux/+git/noble/tree/include/drm/xe_pciids.h
>
> [Where problems could occur]
>
> [Other Info]
>
> https://code.launchpad.net/~mreed8855/ubuntu/+source/linux/+git/noble/+ref/lp_2077140_intel_arrowlake
>
> Matt Roper (1):
>   drm/xe/arl: Add Arrow Lake H support
>
>  include/drm/xe_pciids.h | 3 +++
>  1 file changed, 3 insertions(+)
>
> --
> 2.34.1
>
>
diff mbox

Patch

diff --git a/include/drm/xe_pciids.h b/include/drm/xe_pciids.h
index de1a344737bc..bc7cbef6e9d8 100644
--- a/include/drm/xe_pciids.h
+++ b/include/drm/xe_pciids.h
@@ -176,10 +176,13 @@ 
/* MTL / ARL */
#define XE_MTL_IDS(MACRO__, ...) \
        MACRO__(0x7D40, ## __VA_ARGS__), \
+ MACRO__(0x7D41, ## __VA_ARGS__), \
        MACRO__(0x7D45, ## __VA_ARGS__), \
+ MACRO__(0x7D51, ## __VA_ARGS__), \
        MACRO__(0x7D55, ## __VA_ARGS__), \
        MACRO__(0x7D60, ## __VA_ARGS__), \
        MACRO__(0x7D67, ## __VA_ARGS__), \
+ MACRO__(0x7DD1, ## __VA_ARGS__), \
        MACRO__(0x7DD5, ## __VA_ARGS__)

#define XE_LNL_IDS(MACRO__, ...) \