| Message ID | 20240504122841.1177683-15-npiggin@gmail.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere, archived |
| Headers | show |
| Series | powerpc improvements | expand |
On 04/05/2024 14.28, Nicholas Piggin wrote: > The exception stack setup does not work correctly for SMP, because > it is the boot processor that calls cpu_set() which sets SPRG2 to > the exception stack, not the target CPU itself. So secondaries > never got their SPRG2 set to a valid exception stack. So secondary CPUs currently must not run into any exceptions? > Remove the SMP code and just set an exception stack for the boot > processor. Make the stack 64kB while we're here, to match the > size of the regular stack. > > Signed-off-by: Nicholas Piggin <npiggin@gmail.com> > --- > lib/powerpc/setup.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) Reviewed-by: Thomas Huth <thuth@redhat.com>
On Mon Jun 3, 2024 at 7:30 PM AEST, Thomas Huth wrote: > On 04/05/2024 14.28, Nicholas Piggin wrote: > > The exception stack setup does not work correctly for SMP, because > > it is the boot processor that calls cpu_set() which sets SPRG2 to > > the exception stack, not the target CPU itself. So secondaries > > never got their SPRG2 set to a valid exception stack. > > So secondary CPUs currently must not run into any exceptions? Yes, at the moment. It was broken anyway. Patch 16 creates a proper environment for secondaries, including taking interrupts. Thanks, Nick > > > Remove the SMP code and just set an exception stack for the boot > > processor. Make the stack 64kB while we're here, to match the > > size of the regular stack. > > > > Signed-off-by: Nicholas Piggin <npiggin@gmail.com> > > --- > > lib/powerpc/setup.c | 16 ++++++++-------- > > 1 file changed, 8 insertions(+), 8 deletions(-) > > Reviewed-by: Thomas Huth <thuth@redhat.com>
diff --git a/lib/powerpc/setup.c b/lib/powerpc/setup.c index 9b665f59c..58be93f08 100644 --- a/lib/powerpc/setup.c +++ b/lib/powerpc/setup.c @@ -42,10 +42,6 @@ struct cpu_set_params { uint64_t tb_hz; }; -#define EXCEPTION_STACK_SIZE (32*1024) /* 32kB */ - -static char exception_stack[NR_CPUS][EXCEPTION_STACK_SIZE]; - static void cpu_set(int fdtnode, u64 regval, void *info) { static bool read_common_info = false; @@ -56,10 +52,6 @@ static void cpu_set(int fdtnode, u64 regval, void *info) cpus[cpu] = regval; - /* set exception stack address for this CPU (in SPGR0) */ - asm volatile ("mtsprg0 %[addr]" :: - [addr] "r" (exception_stack[cpu + 1])); - if (!read_common_info) { const struct fdt_property *prop; u32 *data; @@ -180,6 +172,10 @@ static void mem_init(phys_addr_t freemem_start) ? __icache_bytes : __dcache_bytes); } +#define EXCEPTION_STACK_SIZE SZ_64K + +static char boot_exception_stack[EXCEPTION_STACK_SIZE]; + void setup(const void *fdt) { void *freemem = &stacktop; @@ -189,6 +185,10 @@ void setup(const void *fdt) cpu_has_hv = !!(mfmsr() & (1ULL << MSR_HV_BIT)); + /* set exception stack address for this CPU (in SPGR0) */ + asm volatile ("mtsprg0 %[addr]" :: + [addr] "r" (boot_exception_stack + EXCEPTION_STACK_SIZE - 64)); + enable_mcheck(); /*
The exception stack setup does not work correctly for SMP, because it is the boot processor that calls cpu_set() which sets SPRG2 to the exception stack, not the target CPU itself. So secondaries never got their SPRG2 set to a valid exception stack. Remove the SMP code and just set an exception stack for the boot processor. Make the stack 64kB while we're here, to match the size of the regular stack. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> --- lib/powerpc/setup.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)