| Message ID | 20240302223524.24421-2-deller@kernel.org |
|---|---|
| State | New |
| Headers | show |
| Series | HPPA64 updates | expand |
On 3/2/24 12:35, deller@kernel.org wrote: > From: Guenter Roeck <linux@roeck-us.net> > > Unaligned 64-bit accesses were found in Linux to clobber carry bits, > resulting in bad results if an arithmetic operation involving a > carry bit was executed after an unaligned 64-bit operation. > > hppa 2.0 defines additional carry bits in PSW register bits 32..39. > When restoring PSW after executing an unaligned instruction trap, > those bits were not cleared and ended up to be active all the time. > Clearing bit 32..39 in psw prior to restoring it solves the problem. > > Fixes: 931adff31478 ("target/hppa: Update cpu_hppa_get/put_psw for hppa64") > Cc: Richard Henderson <richard.henderson@linaro.org> > Cc: Charlie Jenkins <charlie@rivosinc.com> > Cc: Helge Deller <deller@gmx.de> > Signed-off-by: Guenter Roeck <linux@roeck-us.net> > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/hppa/helper.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/target/hppa/helper.c b/target/hppa/helper.c > index 859644c47a..7b798d1227 100644 > --- a/target/hppa/helper.c > +++ b/target/hppa/helper.c > @@ -76,7 +76,12 @@ void cpu_hppa_put_psw(CPUHPPAState *env, target_ulong psw) > } > psw &= ~reserved; > > - env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); > + if (hppa_is_pa20(env)) { > + env->psw = psw & ~(PSW_N | PSW_V | PSW_CB | 0xff00000000ull); > + } else { > + env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); > + } https://patchew.org/QEMU/20240217015811.1975411-1-linux@roeck-us.net/ was the better version. r~
On 3/3/24 03:10, Richard Henderson wrote: > On 3/2/24 12:35, deller@kernel.org wrote: >> From: Guenter Roeck <linux@roeck-us.net> >> >> Unaligned 64-bit accesses were found in Linux to clobber carry bits, >> resulting in bad results if an arithmetic operation involving a >> carry bit was executed after an unaligned 64-bit operation. >> >> hppa 2.0 defines additional carry bits in PSW register bits 32..39. >> When restoring PSW after executing an unaligned instruction trap, >> those bits were not cleared and ended up to be active all the time. >> Clearing bit 32..39 in psw prior to restoring it solves the problem. >> >> Fixes: 931adff31478 ("target/hppa: Update cpu_hppa_get/put_psw for hppa64") >> Cc: Richard Henderson <richard.henderson@linaro.org> >> Cc: Charlie Jenkins <charlie@rivosinc.com> >> Cc: Helge Deller <deller@gmx.de> >> Signed-off-by: Guenter Roeck <linux@roeck-us.net> >> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> >> --- >> target/hppa/helper.c | 7 ++++++- >> 1 file changed, 6 insertions(+), 1 deletion(-) >> >> diff --git a/target/hppa/helper.c b/target/hppa/helper.c >> index 859644c47a..7b798d1227 100644 >> --- a/target/hppa/helper.c >> +++ b/target/hppa/helper.c >> @@ -76,7 +76,12 @@ void cpu_hppa_put_psw(CPUHPPAState *env, target_ulong psw) >> } >> psw &= ~reserved; >> - env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); >> + if (hppa_is_pa20(env)) { >> + env->psw = psw & ~(PSW_N | PSW_V | PSW_CB | 0xff00000000ull); >> + } else { >> + env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); >> + } > > https://patchew.org/QEMU/20240217015811.1975411-1-linux@roeck-us.net/ > was the better version. Oh, yes. Will use that one in the pull request. Thanks! Helge
diff --git a/target/hppa/helper.c b/target/hppa/helper.c index 859644c47a..7b798d1227 100644 --- a/target/hppa/helper.c +++ b/target/hppa/helper.c @@ -76,7 +76,12 @@ void cpu_hppa_put_psw(CPUHPPAState *env, target_ulong psw) } psw &= ~reserved; - env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); + if (hppa_is_pa20(env)) { + env->psw = psw & ~(PSW_N | PSW_V | PSW_CB | 0xff00000000ull); + } else { + env->psw = psw & ~(PSW_N | PSW_V | PSW_CB); + } + env->psw_n = (psw / PSW_N) & 1; env->psw_v = -((psw / PSW_V) & 1);