| Message ID | 20240108140325.1291-1-n.ostrenkov@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v2] hw/arm: add PCIe to Freescale i.MX6 | expand |
Ping https://patchew.org/QEMU/20240108140325.1291-1-n.ostrenkov@gmail.com/ пн, 8 янв. 2024 г., 17:03 Nikita Ostrenkov <n.ostrenkov@gmail.com>: > Signed-off-by: Nikita Ostrenkov <n.ostrenkov@gmail.com> > --- > hw/arm/Kconfig | 2 ++ > hw/arm/fsl-imx6.c | 25 ++++++++++++++++++++++ > include/hw/arm/fsl-imx6.h | 44 ++++++++++++++++++++------------------- > 3 files changed, 50 insertions(+), 21 deletions(-) > > diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig > index 660f49db49..2559d1317b 100644 > --- a/hw/arm/Kconfig > +++ b/hw/arm/Kconfig > @@ -530,6 +530,7 @@ config FSL_IMX31 > > config FSL_IMX6 > bool > + imply PCIE_DEVICES > imply I2C_DEVICES > select A9MPCORE > select IMX > @@ -537,6 +538,7 @@ config FSL_IMX6 > select IMX_I2C > select IMX_USBPHY > select WDT_IMX2 > + select PCI_EXPRESS_DESIGNWARE > select SDHCI > > config ASPEED_SOC > diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c > index b2153022c0..27702b6d6d 100644 > --- a/hw/arm/fsl-imx6.c > +++ b/hw/arm/fsl-imx6.c > @@ -22,6 +22,7 @@ > #include "qemu/osdep.h" > #include "qapi/error.h" > #include "hw/arm/fsl-imx6.h" > +#include "hw/misc/unimp.h" > #include "hw/usb/imx-usb-phy.h" > #include "hw/boards.h" > #include "hw/qdev-properties.h" > @@ -102,6 +103,8 @@ static void fsl_imx6_init(Object *obj) > > > object_initialize_child(obj, "eth", &s->eth, TYPE_IMX_ENET); > + > + object_initialize_child(obj, "pcie", &s->pcie, > TYPE_DESIGNWARE_PCIE_HOST); > } > > static void fsl_imx6_realize(DeviceState *dev, Error **errp) > @@ -109,6 +112,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error > **errp) > MachineState *ms = MACHINE(qdev_get_machine()); > FslIMX6State *s = FSL_IMX6(dev); > uint16_t i; > + qemu_irq irq; > unsigned int smp_cpus = ms->smp.cpus; > > if (smp_cpus > FSL_IMX6_NUM_CPUS) { > @@ -421,6 +425,27 @@ static void fsl_imx6_realize(DeviceState *dev, Error > **errp) > FSL_IMX6_WDOGn_IRQ[i])); > } > > + /* > + * PCIe > + */ > + sysbus_realize(SYS_BUS_DEVICE(&s->pcie), &error_abort); > + sysbus_mmio_map(SYS_BUS_DEVICE(&s->pcie), 0, FSL_IMX6_PCIe_REG_ADDR); > + > + irq = qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE1_IRQ); > + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 0, irq); > + irq = qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE2_IRQ); > + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 1, irq); > + irq = qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE3_IRQ); > + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 2, irq); > + irq = qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE4_IRQ); > + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 3, irq); > + > + /* > + * PCIe PHY > + */ > + create_unimplemented_device("pcie-phy", FSL_IMX6_PCIe_ADDR, > + FSL_IMX6_PCIe_SIZE); > + > /* ROM memory */ > if (!memory_region_init_rom(&s->rom, OBJECT(dev), "imx6.rom", > FSL_IMX6_ROM_SIZE, errp)) { > diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h > index 519b871014..61c593ffd2 100644 > --- a/include/hw/arm/fsl-imx6.h > +++ b/include/hw/arm/fsl-imx6.h > @@ -32,6 +32,7 @@ > #include "hw/net/imx_fec.h" > #include "hw/usb/chipidea.h" > #include "hw/usb/imx-usb-phy.h" > +#include "hw/pci-host/designware.h" > #include "exec/memory.h" > #include "cpu.h" > #include "qom/object.h" > @@ -55,27 +56,28 @@ struct FslIMX6State { > DeviceState parent_obj; > > /*< public >*/ > - ARMCPU cpu[FSL_IMX6_NUM_CPUS]; > - A9MPPrivState a9mpcore; > - IMX6CCMState ccm; > - IMX6SRCState src; > - IMX7SNVSState snvs; > - IMXSerialState uart[FSL_IMX6_NUM_UARTS]; > - IMXGPTState gpt; > - IMXEPITState epit[FSL_IMX6_NUM_EPITS]; > - IMXI2CState i2c[FSL_IMX6_NUM_I2CS]; > - IMXGPIOState gpio[FSL_IMX6_NUM_GPIOS]; > - SDHCIState esdhc[FSL_IMX6_NUM_ESDHCS]; > - IMXSPIState spi[FSL_IMX6_NUM_ECSPIS]; > - IMX2WdtState wdt[FSL_IMX6_NUM_WDTS]; > - IMXUSBPHYState usbphy[FSL_IMX6_NUM_USB_PHYS]; > - ChipideaState usb[FSL_IMX6_NUM_USBS]; > - IMXFECState eth; > - MemoryRegion rom; > - MemoryRegion caam; > - MemoryRegion ocram; > - MemoryRegion ocram_alias; > - uint32_t phy_num; > + ARMCPU cpu[FSL_IMX6_NUM_CPUS]; > + A9MPPrivState a9mpcore; > + IMX6CCMState ccm; > + IMX6SRCState src; > + IMX7SNVSState snvs; > + IMXSerialState uart[FSL_IMX6_NUM_UARTS]; > + IMXGPTState gpt; > + IMXEPITState epit[FSL_IMX6_NUM_EPITS]; > + IMXI2CState i2c[FSL_IMX6_NUM_I2CS]; > + IMXGPIOState gpio[FSL_IMX6_NUM_GPIOS]; > + SDHCIState esdhc[FSL_IMX6_NUM_ESDHCS]; > + IMXSPIState spi[FSL_IMX6_NUM_ECSPIS]; > + IMX2WdtState wdt[FSL_IMX6_NUM_WDTS]; > + IMXUSBPHYState usbphy[FSL_IMX6_NUM_USB_PHYS]; > + ChipideaState usb[FSL_IMX6_NUM_USBS]; > + IMXFECState eth; > + DesignwarePCIEHost pcie; > + MemoryRegion rom; > + MemoryRegion caam; > + MemoryRegion ocram; > + MemoryRegion ocram_alias; > + uint32_t phy_num; > }; > > > -- > 2.34.1 > >
On Thu, 25 Jan 2024 at 20:11, Nikita Ostrenkov <n.ostrenkov@gmail.com> wrote: > > Ping > https://patchew.org/QEMU/20240108140325.1291-1-n.ostrenkov@gmail.com/ Sorry for overlooking this; I think it got lost in the post-holiday mail pile :-) Applied to target-arm.next, thanks. -- PMM
Hi, On Mon, Jan 08, 2024 at 02:03:25PM +0000, Nikita Ostrenkov wrote: > Signed-off-by: Nikita Ostrenkov <n.ostrenkov@gmail.com> > --- This patch, with the "sabrelite" emulation and the Linux upstream kernel (v6.8-rc1, using imx_v6_v7_defconfig), results in: qemu-system-arm: ../system/memory.c:2750: memory_region_set_alias_offset: Assertion `mr->alias' failed. with the backtrace below. Any idea what might be wrong ? Thanks, Guenter --- #0 __pthread_kill_implementation (no_tid=0, signo=6, threadid=140737237087808) at ./nptl/pthread_kill.c:44 #1 __pthread_kill_internal (signo=6, threadid=140737237087808) at ./nptl/pthread_kill.c:78 #2 __GI___pthread_kill (threadid=140737237087808, signo=signo@entry=6) at ./nptl/pthread_kill.c:89 #3 0x00007ffff6242476 in __GI_raise (sig=sig@entry=6) at ../sysdeps/posix/raise.c:26 #4 0x00007ffff62287f3 in __GI_abort () at ./stdlib/abort.c:79 #5 0x00007ffff622871b in __assert_fail_base (fmt=0x7ffff63dd130 "%s%s%s:%u: %s%sAssertion `%s' failed.\n%n", assertion=0x5555565712bd "mr->alias", file=0x555556570da4 "../system/memory.c", line=2750, function=<optimized out>) at ./assert/assert.c:92 #6 0x00007ffff6239e96 in __GI___assert_fail (assertion=0x5555565712bd "mr->alias", file=0x555556570da4 "../system/memory.c", line=2750, function=0x555556571bf0 <__PRETTY_FUNCTION__.8> "memory_region_set_alias_offset") at ./assert/assert.c:101 #7 0x00005555560192ce in memory_region_set_alias_offset (mr=0x555557a77ce0, offset=286326784) at ../system/memory.c:2750 #8 0x0000555555b8bc9f in designware_pcie_update_viewport (root=0x555557a74d50, viewport=0x555557a77bc0) at ../hw/pci-host/designware.c:280 #9 0x0000555555b8c06d in designware_pcie_root_config_write (d=0x555557a74d50, address=2312, val=0, len=4) at ../hw/pci-host/designware.c:375 #10 0x0000555555b78488 in pci_host_config_write_common (pci_dev=0x555557a74d50, addr=2312, limit=4096, val=0, len=4) at ../hw/pci/pci_host.c:96 #11 0x0000555555b8c7ee in designware_pcie_host_mmio_write (opaque=0x555557a746c0, addr=2312, val=0, size=4) at ../hw/pci-host/designware.c:635 #12 0x0000555556012388 in memory_region_write_accessor (mr=0x555557a780a0, addr=2312, value=0x7ffff105a628, size=4, shift=0, mask=4294967295, attrs=...) at ../system/memory.c:497 #13 0x00005555560126c1 in access_with_adjusted_size (addr=2312, value=0x7ffff105a628, size=4, access_size_min=4, access_size_max=4, access_fn=0x55555601228e <memory_region_write_accessor>, mr=0x555557a780a0, attrs=...) at ../system/memory.c:573 #14 0x00005555560159cd in memory_region_dispatch_write (mr=0x555557a780a0, addr=2312, data=0, op=MO_32, attrs=...) at ../system/memory.c:1521 #15 0x000055555607351f in int_st_mmio_leN (cpu=0x555557a47150, full=0x7fffe841fe80, val_le=0, addr=3500312840, size=4, mmu_idx=7, ra=140734908258821, mr=0x555557a780a0, mr_offset=2312) at ../accel/tcg/cputlb.c:2545 #16 0x0000555556073697 in do_st_mmio_leN (cpu=0x555557a47150, full=0x7fffe841fe80, val_le=0, addr=3500312840, size=4, mmu_idx=7, ra=140734908258821) at ../accel/tcg/cputlb.c:2581 #17 0x0000555556073f14 in do_st_4 (cpu=0x555557a47150, p=0x7ffff105a7c0, val=0, mmu_idx=7, memop=1282, ra=140734908258821) at ../accel/tcg/cputlb.c:2758 #18 0x00005555560742d7 in do_st4_mmu (cpu=0x555557a47150, addr=3500312840, val=0, oi=20519, ra=140734908258821) at ../accel/tcg/cputlb.c:2834 #19 0x0000555556074df3 in helper_stl_mmu (env=0x555557a49910, addr=3500312840, val=0, oi=20519, retaddr=140734908258821) at ../accel/tcg/ldst_common.c.inc:100 #20 0x00007fff6636da46 in code_gen_buffer () #21 0x00005555560587e8 in cpu_tb_exec (cpu=0x555557a47150, itb=0x7fffa636d900, tb_exit=0x7ffff105adf0) at ../accel/tcg/cpu-exec.c:458 #22 0x0000555556059565 in cpu_loop_exec_tb (cpu=0x555557a47150, tb=0x7fffa636d900, pc=3230581304, last_tb=0x7ffff105ae00, tb_exit=0x7ffff105adf0) at ../accel/tcg/cpu-exec.c:920 #23 0x00005555560598da in cpu_exec_loop (cpu=0x555557a47150, sc=0x7ffff105ae80) at ../accel/tcg/cpu-exec.c:1041 #24 0x00005555560599ab in cpu_exec_setjmp (cpu=0x555557a47150, sc=0x7ffff105ae80) at ../accel/tcg/cpu-exec.c:1058 #25 0x0000555556059a47 in cpu_exec (cpu=0x555557a47150) at ../accel/tcg/cpu-exec.c:1084 #26 0x00005555560838c2 in tcg_cpus_exec (cpu=0x555557a47150) at ../accel/tcg/tcg-accel-ops.c:76 #27 0x000055555608403d in mttcg_cpu_thread_fn (arg=0x555557a47150) at ../accel/tcg/tcg-accel-ops-mttcg.c:95 #28 0x00005555562b32d7 in qemu_thread_start (args=0x555557c06360) at ../util/qemu-thread-posix.c:541 #29 0x00007ffff6294ac3 in start_thread (arg=<optimized out>) at ./nptl/pthread_create.c:442 #30 0x00007ffff6326850 in clone3 () at ../sysdeps/unix/sysv/linux/x86_64/clone3.S:81
On Sat, Jan 27, 2024 at 11:11:58AM -0800, Guenter Roeck wrote: > Hi, > > On Mon, Jan 08, 2024 at 02:03:25PM +0000, Nikita Ostrenkov wrote: > > Signed-off-by: Nikita Ostrenkov <n.ostrenkov@gmail.com> > > --- > > This patch, with the "sabrelite" emulation and the Linux upstream kernel > (v6.8-rc1, using imx_v6_v7_defconfig), results in: > > qemu-system-arm: ../system/memory.c:2750: memory_region_set_alias_offset: Assertion `mr->alias' failed. > > with the backtrace below. Any idea what might be wrong ? > Additional information: The only reason for not seing the same problem with mcimx7d-sabre is that Linux needs the PF3000 PMIC to instantiate the PCIe controller on that system. After implementing PF3000 support in qemu and instantiating it for mcimx7d-sabre, I get exactly the same assertion when trying to run that simulation with Linux v6.8-rc1. Guenter > Thanks, > Guenter > > --- > #0 __pthread_kill_implementation (no_tid=0, signo=6, threadid=140737237087808) at ./nptl/pthread_kill.c:44 > #1 __pthread_kill_internal (signo=6, threadid=140737237087808) at ./nptl/pthread_kill.c:78 > #2 __GI___pthread_kill (threadid=140737237087808, signo=signo@entry=6) at ./nptl/pthread_kill.c:89 > #3 0x00007ffff6242476 in __GI_raise (sig=sig@entry=6) at ../sysdeps/posix/raise.c:26 > #4 0x00007ffff62287f3 in __GI_abort () at ./stdlib/abort.c:79 > #5 0x00007ffff622871b in __assert_fail_base > (fmt=0x7ffff63dd130 "%s%s%s:%u: %s%sAssertion `%s' failed.\n%n", assertion=0x5555565712bd "mr->alias", file=0x555556570da4 "../system/memory.c", line=2750, function=<optimized out>) > at ./assert/assert.c:92 > #6 0x00007ffff6239e96 in __GI___assert_fail > (assertion=0x5555565712bd "mr->alias", file=0x555556570da4 "../system/memory.c", line=2750, function=0x555556571bf0 <__PRETTY_FUNCTION__.8> "memory_region_set_alias_offset") > at ./assert/assert.c:101 > #7 0x00005555560192ce in memory_region_set_alias_offset (mr=0x555557a77ce0, offset=286326784) at ../system/memory.c:2750 > #8 0x0000555555b8bc9f in designware_pcie_update_viewport (root=0x555557a74d50, viewport=0x555557a77bc0) at ../hw/pci-host/designware.c:280 > #9 0x0000555555b8c06d in designware_pcie_root_config_write (d=0x555557a74d50, address=2312, val=0, len=4) at ../hw/pci-host/designware.c:375 > #10 0x0000555555b78488 in pci_host_config_write_common (pci_dev=0x555557a74d50, addr=2312, limit=4096, val=0, len=4) at ../hw/pci/pci_host.c:96 > #11 0x0000555555b8c7ee in designware_pcie_host_mmio_write (opaque=0x555557a746c0, addr=2312, val=0, size=4) at ../hw/pci-host/designware.c:635 > #12 0x0000555556012388 in memory_region_write_accessor (mr=0x555557a780a0, addr=2312, value=0x7ffff105a628, size=4, shift=0, mask=4294967295, attrs=...) at ../system/memory.c:497 > #13 0x00005555560126c1 in access_with_adjusted_size > (addr=2312, value=0x7ffff105a628, size=4, access_size_min=4, access_size_max=4, access_fn=0x55555601228e <memory_region_write_accessor>, mr=0x555557a780a0, attrs=...) at ../system/memory.c:573 > #14 0x00005555560159cd in memory_region_dispatch_write (mr=0x555557a780a0, addr=2312, data=0, op=MO_32, attrs=...) at ../system/memory.c:1521 > #15 0x000055555607351f in int_st_mmio_leN (cpu=0x555557a47150, full=0x7fffe841fe80, val_le=0, addr=3500312840, size=4, mmu_idx=7, ra=140734908258821, mr=0x555557a780a0, mr_offset=2312) > at ../accel/tcg/cputlb.c:2545 > #16 0x0000555556073697 in do_st_mmio_leN (cpu=0x555557a47150, full=0x7fffe841fe80, val_le=0, addr=3500312840, size=4, mmu_idx=7, ra=140734908258821) at ../accel/tcg/cputlb.c:2581 > #17 0x0000555556073f14 in do_st_4 (cpu=0x555557a47150, p=0x7ffff105a7c0, val=0, mmu_idx=7, memop=1282, ra=140734908258821) at ../accel/tcg/cputlb.c:2758 > #18 0x00005555560742d7 in do_st4_mmu (cpu=0x555557a47150, addr=3500312840, val=0, oi=20519, ra=140734908258821) at ../accel/tcg/cputlb.c:2834 > #19 0x0000555556074df3 in helper_stl_mmu (env=0x555557a49910, addr=3500312840, val=0, oi=20519, retaddr=140734908258821) at ../accel/tcg/ldst_common.c.inc:100 > #20 0x00007fff6636da46 in code_gen_buffer () > #21 0x00005555560587e8 in cpu_tb_exec (cpu=0x555557a47150, itb=0x7fffa636d900, tb_exit=0x7ffff105adf0) at ../accel/tcg/cpu-exec.c:458 > #22 0x0000555556059565 in cpu_loop_exec_tb (cpu=0x555557a47150, tb=0x7fffa636d900, pc=3230581304, last_tb=0x7ffff105ae00, tb_exit=0x7ffff105adf0) at ../accel/tcg/cpu-exec.c:920 > #23 0x00005555560598da in cpu_exec_loop (cpu=0x555557a47150, sc=0x7ffff105ae80) at ../accel/tcg/cpu-exec.c:1041 > #24 0x00005555560599ab in cpu_exec_setjmp (cpu=0x555557a47150, sc=0x7ffff105ae80) at ../accel/tcg/cpu-exec.c:1058 > #25 0x0000555556059a47 in cpu_exec (cpu=0x555557a47150) at ../accel/tcg/cpu-exec.c:1084 > #26 0x00005555560838c2 in tcg_cpus_exec (cpu=0x555557a47150) at ../accel/tcg/tcg-accel-ops.c:76 > #27 0x000055555608403d in mttcg_cpu_thread_fn (arg=0x555557a47150) at ../accel/tcg/tcg-accel-ops-mttcg.c:95 > #28 0x00005555562b32d7 in qemu_thread_start (args=0x555557c06360) at ../util/qemu-thread-posix.c:541 > #29 0x00007ffff6294ac3 in start_thread (arg=<optimized out>) at ./nptl/pthread_create.c:442 > #30 0x00007ffff6326850 in clone3 () at ../sysdeps/unix/sysv/linux/x86_64/clone3.S:81
On Sat, Jan 27, 2024 at 11:11:58AM -0800, Guenter Roeck wrote: > Hi, > > On Mon, Jan 08, 2024 at 02:03:25PM +0000, Nikita Ostrenkov wrote: > > Signed-off-by: Nikita Ostrenkov <n.ostrenkov@gmail.com> > > --- > > This patch, with the "sabrelite" emulation and the Linux upstream kernel > (v6.8-rc1, using imx_v6_v7_defconfig), results in: > > qemu-system-arm: ../system/memory.c:2750: memory_region_set_alias_offset: Assertion `mr->alias' failed. > > with the backtrace below. Any idea what might be wrong ? > Never mind. I found the problem. I'll send a patch. Guenter
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 660f49db49..2559d1317b 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -530,6 +530,7 @@ config FSL_IMX31 config FSL_IMX6 bool + imply PCIE_DEVICES imply I2C_DEVICES select A9MPCORE select IMX @@ -537,6 +538,7 @@ config FSL_IMX6 select IMX_I2C select IMX_USBPHY select WDT_IMX2 + select PCI_EXPRESS_DESIGNWARE select SDHCI config ASPEED_SOC diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index b2153022c0..27702b6d6d 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -22,6 +22,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "hw/arm/fsl-imx6.h" +#include "hw/misc/unimp.h" #include "hw/usb/imx-usb-phy.h" #include "hw/boards.h" #include "hw/qdev-properties.h" @@ -102,6 +103,8 @@ static void fsl_imx6_init(Object *obj) object_initialize_child(obj, "eth", &s->eth, TYPE_IMX_ENET); + + object_initialize_child(obj, "pcie", &s->pcie, TYPE_DESIGNWARE_PCIE_HOST); } static void fsl_imx6_realize(DeviceState *dev, Error **errp) @@ -109,6 +112,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) MachineState *ms = MACHINE(qdev_get_machine()); FslIMX6State *s = FSL_IMX6(dev); uint16_t i; + qemu_irq irq; unsigned int smp_cpus = ms->smp.cpus; if (smp_cpus > FSL_IMX6_NUM_CPUS) { @@ -421,6 +425,27 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) FSL_IMX6_WDOGn_IRQ[i])); } + /* + * PCIe + */ + sysbus_realize(SYS_BUS_DEVICE(&s->pcie), &error_abort); + sysbus_mmio_map(SYS_BUS_DEVICE(&s->pcie), 0, FSL_IMX6_PCIe_REG_ADDR); + + irq = qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE1_IRQ); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 0, irq); + irq = qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE2_IRQ); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 1, irq); + irq = qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE3_IRQ); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 2, irq); + irq = qdev_get_gpio_in(DEVICE(&s->a9mpcore), FSL_IMX6_PCIE4_IRQ); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 3, irq); + + /* + * PCIe PHY + */ + create_unimplemented_device("pcie-phy", FSL_IMX6_PCIe_ADDR, + FSL_IMX6_PCIe_SIZE); + /* ROM memory */ if (!memory_region_init_rom(&s->rom, OBJECT(dev), "imx6.rom", FSL_IMX6_ROM_SIZE, errp)) { diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h index 519b871014..61c593ffd2 100644 --- a/include/hw/arm/fsl-imx6.h +++ b/include/hw/arm/fsl-imx6.h @@ -32,6 +32,7 @@ #include "hw/net/imx_fec.h" #include "hw/usb/chipidea.h" #include "hw/usb/imx-usb-phy.h" +#include "hw/pci-host/designware.h" #include "exec/memory.h" #include "cpu.h" #include "qom/object.h" @@ -55,27 +56,28 @@ struct FslIMX6State { DeviceState parent_obj; /*< public >*/ - ARMCPU cpu[FSL_IMX6_NUM_CPUS]; - A9MPPrivState a9mpcore; - IMX6CCMState ccm; - IMX6SRCState src; - IMX7SNVSState snvs; - IMXSerialState uart[FSL_IMX6_NUM_UARTS]; - IMXGPTState gpt; - IMXEPITState epit[FSL_IMX6_NUM_EPITS]; - IMXI2CState i2c[FSL_IMX6_NUM_I2CS]; - IMXGPIOState gpio[FSL_IMX6_NUM_GPIOS]; - SDHCIState esdhc[FSL_IMX6_NUM_ESDHCS]; - IMXSPIState spi[FSL_IMX6_NUM_ECSPIS]; - IMX2WdtState wdt[FSL_IMX6_NUM_WDTS]; - IMXUSBPHYState usbphy[FSL_IMX6_NUM_USB_PHYS]; - ChipideaState usb[FSL_IMX6_NUM_USBS]; - IMXFECState eth; - MemoryRegion rom; - MemoryRegion caam; - MemoryRegion ocram; - MemoryRegion ocram_alias; - uint32_t phy_num; + ARMCPU cpu[FSL_IMX6_NUM_CPUS]; + A9MPPrivState a9mpcore; + IMX6CCMState ccm; + IMX6SRCState src; + IMX7SNVSState snvs; + IMXSerialState uart[FSL_IMX6_NUM_UARTS]; + IMXGPTState gpt; + IMXEPITState epit[FSL_IMX6_NUM_EPITS]; + IMXI2CState i2c[FSL_IMX6_NUM_I2CS]; + IMXGPIOState gpio[FSL_IMX6_NUM_GPIOS]; + SDHCIState esdhc[FSL_IMX6_NUM_ESDHCS]; + IMXSPIState spi[FSL_IMX6_NUM_ECSPIS]; + IMX2WdtState wdt[FSL_IMX6_NUM_WDTS]; + IMXUSBPHYState usbphy[FSL_IMX6_NUM_USB_PHYS]; + ChipideaState usb[FSL_IMX6_NUM_USBS]; + IMXFECState eth; + DesignwarePCIEHost pcie; + MemoryRegion rom; + MemoryRegion caam; + MemoryRegion ocram; + MemoryRegion ocram_alias; + uint32_t phy_num; };
Signed-off-by: Nikita Ostrenkov <n.ostrenkov@gmail.com> --- hw/arm/Kconfig | 2 ++ hw/arm/fsl-imx6.c | 25 ++++++++++++++++++++++ include/hw/arm/fsl-imx6.h | 44 ++++++++++++++++++++------------------- 3 files changed, 50 insertions(+), 21 deletions(-)