linux-user/elfload: Add missing arm64 hwcap values

Specifically DIT, LSE2, and MTE3.

We already expose detection of these via the CPUID interface, but
missed these from ELF hwcaps.

Signed-off-by: Marielle Novastrider <marielle@novastrider.com>
---
 linux-user/elfload.c | 3 +++
 target/arm/cpu.h     | 5 +++++
 2 files changed, 8 insertions(+)

On 29/10/23 22:00, Marielle Novastrider wrote:
> Specifically DIT, LSE2, and MTE3.
> 
> We already expose detection of these via the CPUID interface, but
> missed these from ELF hwcaps.
> 
> Signed-off-by: Marielle Novastrider <marielle@novastrider.com>
> ---
>   linux-user/elfload.c | 3 +++
>   target/arm/cpu.h     | 5 +++++
>   2 files changed, 8 insertions(+)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>

On Sun, 29 Oct 2023 at 21:01, Marielle Novastrider
<marielle@novastrider.com> wrote:
>
> Specifically DIT, LSE2, and MTE3.
>
> We already expose detection of these via the CPUID interface, but
> missed these from ELF hwcaps.
>
> Signed-off-by: Marielle Novastrider <marielle@novastrider.com>
> ---
>  linux-user/elfload.c | 3 +++
>  target/arm/cpu.h     | 5 +++++
>  2 files changed, 8 insertions(+)
>
> diff --git a/linux-user/elfload.c b/linux-user/elfload.c
> index 2e3809f03c..d9683809a1 100644
> --- a/linux-user/elfload.c
> +++ b/linux-user/elfload.c
> @@ -768,12 +768,14 @@ uint32_t get_elf_hwcap(void)
>      GET_FEATURE_ID(aa64_sm4, ARM_HWCAP_A64_SM4);
>      GET_FEATURE_ID(aa64_fp16, ARM_HWCAP_A64_FPHP | ARM_HWCAP_A64_ASIMDHP);
>      GET_FEATURE_ID(aa64_atomics, ARM_HWCAP_A64_ATOMICS);
> +    GET_FEATURE_ID(aa64_lse2, ARM_HWCAP_A64_USCAT);
>      GET_FEATURE_ID(aa64_rdm, ARM_HWCAP_A64_ASIMDRDM);
>      GET_FEATURE_ID(aa64_dp, ARM_HWCAP_A64_ASIMDDP);
>      GET_FEATURE_ID(aa64_fcma, ARM_HWCAP_A64_FCMA);
>      GET_FEATURE_ID(aa64_sve, ARM_HWCAP_A64_SVE);
>      GET_FEATURE_ID(aa64_pauth, ARM_HWCAP_A64_PACA | ARM_HWCAP_A64_PACG);
>      GET_FEATURE_ID(aa64_fhm, ARM_HWCAP_A64_ASIMDFHM);
> +    GET_FEATURE_ID(aa64_dit, ARM_HWCAP_A64_DIT);
>      GET_FEATURE_ID(aa64_jscvt, ARM_HWCAP_A64_JSCVT);
>      GET_FEATURE_ID(aa64_sb, ARM_HWCAP_A64_SB);
>      GET_FEATURE_ID(aa64_condm_4, ARM_HWCAP_A64_FLAGM);
> @@ -807,6 +809,7 @@ uint32_t get_elf_hwcap2(void)

These two are correct...

>      GET_FEATURE_ID(aa64_rndr, ARM_HWCAP2_A64_RNG);
>      GET_FEATURE_ID(aa64_bti, ARM_HWCAP2_A64_BTI);
>      GET_FEATURE_ID(aa64_mte, ARM_HWCAP2_A64_MTE);
> +    GET_FEATURE_ID(aa64_mte3, ARM_HWCAP2_A64_MTE3);
>      GET_FEATURE_ID(aa64_sme, (ARM_HWCAP2_A64_SME |
>                                ARM_HWCAP2_A64_SME_F32F32 |
>                                ARM_HWCAP2_A64_SME_B16F32 |
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 76d4cef9e3..7605d6ee3a 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -4073,6 +4073,11 @@ static inline bool isar_feature_aa64_mte(const ARMISARegisters *id)
>      return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, MTE) >= 2;
>  }
>
> +static inline bool isar_feature_aa64_mte3(const ARMISARegisters *id)
> +{
> +    return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, MTE) >= 3;
> +}

...but we don't implement FEAT_MTE3 yet. We would add this feature test
function, and the GET_FEATURE_ID() line, when we do, but we don't
need it until then.

>  static inline bool isar_feature_aa64_sme(const ARMISARegisters *id)
>  {
>      return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, SME) != 0;
> --
> 2.39.3 (Apple Git-145)

thanks
-- PMM

> On 30 Oct 2023, at 09:52, Peter Maydell <peter.maydell@linaro.org> wrote:
> 
> ...but we don't implement FEAT_MTE3 yet. We would add this feature test
> function, and the GET_FEATURE_ID() line, when we do, but we don't
> need it until then.

Understood.

I made this patch as I noticed the discrepancy between cpuid and hwcap output.

The following code produces the value of 3 on current master, which would be erroneous if FEAT_MT3 is unimplemented:

#include <stdint.h>
#include <stdio.h>

int main() {
    uint64_t aa64pfr1;
    __asm__("mrs %0, s3_0_c0_c4_1" : "=r"(aa64pfr1));
    std::printf("%lu\n", (aa64pfr1 >> 8) & 0xf);
    return 0;
}

I can submit another patch to correct this.

- Marielle

> On 31 Oct 2023, at 00:56, Marielle Novastrider <marielle@novastrider.com> wrote:
> 
>> On 30 Oct 2023, at 09:52, Peter Maydell <peter.maydell@linaro.org> wrote:
>> 
>> ...but we don't implement FEAT_MTE3 yet. We would add this feature test
>> function, and the GET_FEATURE_ID() line, when we do, but we don't
>> need it until then.
> 
> Understood.
> 
> I made this patch as I noticed the discrepancy between cpuid and hwcap output.
> 
> The following code produces the value of 3 on current master, which would be erroneous if FEAT_MT3 is unimplemented:
> 
> #include <stdint.h>
> #include <stdio.h>
> 
> int main() {
>    uint64_t aa64pfr1;
>    __asm__("mrs %0, s3_0_c0_c4_1" : "=r"(aa64pfr1));
>    std::printf("%lu\n", (aa64pfr1 >> 8) & 0xf);
>    return 0;
> }
> 
> I can submit another patch to correct this.
> 
> - Marielle
> 

I note that commit 86f0d4c7290eb2b21ec3eb44956ec245441275db suggests that FEAT_MTE3 is already implemented.

On Tue, 31 Oct 2023 at 09:23, Marielle Novastrider
<marielle@novastrider.com> wrote:
>
>
>
> > On 31 Oct 2023, at 00:56, Marielle Novastrider <marielle@novastrider.com> wrote:
> >
> >> On 30 Oct 2023, at 09:52, Peter Maydell <peter.maydell@linaro.org> wrote:
> >>
> >> ...but we don't implement FEAT_MTE3 yet. We would add this feature test
> >> function, and the GET_FEATURE_ID() line, when we do, but we don't
> >> need it until then.
> >
> > Understood.
> >
> > I made this patch as I noticed the discrepancy between cpuid and hwcap output.
> >
> > The following code produces the value of 3 on current master, which would be erroneous if FEAT_MT3 is unimplemented:
> >
> > #include <stdint.h>
> > #include <stdio.h>
> >
> > int main() {
> >    uint64_t aa64pfr1;
> >    __asm__("mrs %0, s3_0_c0_c4_1" : "=r"(aa64pfr1));
> >    std::printf("%lu\n", (aa64pfr1 >> 8) & 0xf);
> >    return 0;
> > }
> >
> > I can submit another patch to correct this.

> I note that commit 86f0d4c7290eb2b21ec3eb44956ec245441275db suggests that FEAT_MTE3 is already implemented.

I'm sorry, you're right -- we have implemented MTE3. I was
confused by the lack of an existing feature test function for
it, but we didn't need the feature test because FEAT_MTE3 only
added behaviour to previously-reserved values of the TCF field,
so we allowed our behaviour on non-FEAT_MTE3 CPUs to be
"happens to behave like FEAT_MTE3".

Your patch as it stands is correct, and I've applied it to
target-arm.next. (There's a trivial conflict as a change has
just landed which moves all the feature test functions to
their own header, but I have fixed that up while applying.)

Thanks for the patch!

-- PMM