| Message ID | 20230930112837.1871691-1-c@jia.je |
|---|---|
| State | New |
| Headers | show |
| Series | target/loongarch: fix ASXE flag conflict | expand |
On 9/30/23 04:28, Jiajie Chen wrote: > HW_FLAGS_EUEN_ASXE acccidentally conflicts with HW_FLAGS_CRMD_PG, > enabling LASX instructions even when CSR_EUEN.ASXE=0. > > Closes: https://gitlab.com/qemu-project/qemu/-/issues/1907 > Signed-off-by: Jiajie Chen <c@jia.je> > --- > target/loongarch/cpu.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h > index f125a8e49b..79ad79a289 100644 > --- a/target/loongarch/cpu.h > +++ b/target/loongarch/cpu.h > @@ -462,7 +462,7 @@ static inline void set_pc(CPULoongArchState *env, uint64_t value) > #define HW_FLAGS_CRMD_PG R_CSR_CRMD_PG_MASK /* 0x10 */ > #define HW_FLAGS_EUEN_FPE 0x04 > #define HW_FLAGS_EUEN_SXE 0x08 > -#define HW_FLAGS_EUEN_ASXE 0x10 > +#define HW_FLAGS_EUEN_ASXE 0x40 > #define HW_FLAGS_VA32 0x20 > > static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc, Better to put all defines in bit order, otherwise it will be easy to make the same mistake again. With that, Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
在 2023/9/30 下午11:46, Richard Henderson 写道: > On 9/30/23 04:28, Jiajie Chen wrote: >> HW_FLAGS_EUEN_ASXE acccidentally conflicts with HW_FLAGS_CRMD_PG, >> enabling LASX instructions even when CSR_EUEN.ASXE=0. >> >> Closes: https://gitlab.com/qemu-project/qemu/-/issues/1907 >> Signed-off-by: Jiajie Chen <c@jia.je> >> --- >> target/loongarch/cpu.h | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h >> index f125a8e49b..79ad79a289 100644 >> --- a/target/loongarch/cpu.h >> +++ b/target/loongarch/cpu.h >> @@ -462,7 +462,7 @@ static inline void set_pc(CPULoongArchState *env, >> uint64_t value) >> #define HW_FLAGS_CRMD_PG R_CSR_CRMD_PG_MASK /* 0x10 */ >> #define HW_FLAGS_EUEN_FPE 0x04 >> #define HW_FLAGS_EUEN_SXE 0x08 >> -#define HW_FLAGS_EUEN_ASXE 0x10 >> +#define HW_FLAGS_EUEN_ASXE 0x40 >> #define HW_FLAGS_VA32 0x20 >> static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, >> vaddr *pc, > > Better to put all defines in bit order, otherwise it will be easy to > make the same mistake again. > > With that, > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > > > r Reviewed-by: Song Gao <gaosong@loongson.cn> Thanks. Song Gao
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index f125a8e49b..79ad79a289 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -462,7 +462,7 @@ static inline void set_pc(CPULoongArchState *env, uint64_t value) #define HW_FLAGS_CRMD_PG R_CSR_CRMD_PG_MASK /* 0x10 */ #define HW_FLAGS_EUEN_FPE 0x04 #define HW_FLAGS_EUEN_SXE 0x08 -#define HW_FLAGS_EUEN_ASXE 0x10 +#define HW_FLAGS_EUEN_ASXE 0x40 #define HW_FLAGS_VA32 0x20 static inline void cpu_get_tb_cpu_state(CPULoongArchState *env, vaddr *pc,
HW_FLAGS_EUEN_ASXE acccidentally conflicts with HW_FLAGS_CRMD_PG, enabling LASX instructions even when CSR_EUEN.ASXE=0. Closes: https://gitlab.com/qemu-project/qemu/-/issues/1907 Signed-off-by: Jiajie Chen <c@jia.je> --- target/loongarch/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)