| Message ID | 20230825130853.511782-9-dbarboza@ventanamicro.com |
|---|---|
| State | New |
| Headers | show |
| Series | riscv: split TCG/KVM accelerators from cpu.c | expand |
On 25/8/23 15:08, Daniel Henrique Barboza wrote: > This CPU only exists if we're compiling with KVM so move it to the kvm > specific file. While we're at it, change its class_init() to enable the > user_extensions_flag class property, sparing us from having to execute > riscv_cpu_add_user_properties() by hand and letting the post_init() hook > do the work. > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > --- > target/riscv/cpu.c | 23 ----------------------- > target/riscv/kvm.c | 29 +++++++++++++++++++++++++++++ > 2 files changed, 29 insertions(+), 23 deletions(-) Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
On Fri, Aug 25, 2023 at 10:08:41AM -0300, Daniel Henrique Barboza wrote: > This CPU only exists if we're compiling with KVM so move it to the kvm > specific file. While we're at it, change its class_init() to enable the > user_extensions_flag class property, sparing us from having to execute > riscv_cpu_add_user_properties() by hand and letting the post_init() hook > do the work. > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > --- > target/riscv/cpu.c | 23 ----------------------- > target/riscv/kvm.c | 29 +++++++++++++++++++++++++++++ > 2 files changed, 29 insertions(+), 23 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index f67b782675..dbf81796d2 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -655,19 +655,6 @@ static void rv32_imafcu_nommu_cpu_init(Object *obj) > } > #endif > > -#if defined(CONFIG_KVM) > -static void riscv_host_cpu_init(Object *obj) > -{ > - CPURISCVState *env = &RISCV_CPU(obj)->env; > -#if defined(TARGET_RISCV32) > - set_misa(env, MXL_RV32, 0); > -#elif defined(TARGET_RISCV64) > - set_misa(env, MXL_RV64, 0); > -#endif > - riscv_cpu_add_user_properties(obj); > -} > -#endif /* CONFIG_KVM */ > - > static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model) > { > ObjectClass *oc; > @@ -2000,13 +1987,6 @@ static void riscv_vendor_cpu_class_init(ObjectClass *c, void *data) > rcc->user_extension_properties = false; > } > > -#define DEFINE_CPU(type_name, initfn) \ > - { \ > - .name = type_name, \ > - .parent = TYPE_RISCV_CPU, \ > - .instance_init = initfn \ > - } > - > #define DEFINE_DYNAMIC_CPU(type_name, initfn) \ > { \ > .name = type_name, \ > @@ -2047,9 +2027,6 @@ static const TypeInfo riscv_cpu_type_infos[] = { > }, > DEFINE_DYNAMIC_CPU(TYPE_RISCV_CPU_ANY, riscv_any_cpu_init), > DEFINE_DYNAMIC_CPU(TYPE_RISCV_CPU_MAX, riscv_max_cpu_init), > -#if defined(CONFIG_KVM) > - DEFINE_CPU(TYPE_RISCV_CPU_HOST, riscv_host_cpu_init), > -#endif > #if defined(TARGET_RISCV32) > DEFINE_DYNAMIC_CPU(TYPE_RISCV_CPU_BASE32, rv32_base_cpu_init), > DEFINE_VENDOR_CPU(TYPE_RISCV_CPU_IBEX, rv32_ibex_cpu_init), > diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c > index 7c6dec05e3..59004caa8e 100644 > --- a/target/riscv/kvm.c > +++ b/target/riscv/kvm.c > @@ -1217,3 +1217,32 @@ void kvm_riscv_aia_create(MachineState *machine, uint64_t group_shift, > > kvm_msi_via_irqfd_allowed = kvm_irqfds_enabled(); > } > + > +static void riscv_host_cpu_init(Object *obj) > +{ > + CPURISCVState *env = &RISCV_CPU(obj)->env; > + > +#if defined(TARGET_RISCV32) > + env->misa_mxl_max = env->misa_mxl = MXL_RV32; > +#elif defined(TARGET_RISCV64) > + env->misa_mxl_max = env->misa_mxl = MXL_RV64; > +#endif > +} > + > +static void riscv_kvm_cpu_class_init(ObjectClass *c, void *data) > +{ > + RISCVCPUClass *rcc = RISCV_CPU_CLASS(c); > + > + rcc->user_extension_properties = true; > +} > + > +static const TypeInfo riscv_kvm_cpu_type_infos[] = { > + { > + .name = TYPE_RISCV_CPU_HOST, > + .parent = TYPE_RISCV_CPU, > + .instance_init = riscv_host_cpu_init, > + .class_init = riscv_kvm_cpu_class_init, > + } > +}; > + > +DEFINE_TYPES(riscv_kvm_cpu_type_infos) > -- > 2.41.0 > > Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f67b782675..dbf81796d2 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -655,19 +655,6 @@ static void rv32_imafcu_nommu_cpu_init(Object *obj) } #endif -#if defined(CONFIG_KVM) -static void riscv_host_cpu_init(Object *obj) -{ - CPURISCVState *env = &RISCV_CPU(obj)->env; -#if defined(TARGET_RISCV32) - set_misa(env, MXL_RV32, 0); -#elif defined(TARGET_RISCV64) - set_misa(env, MXL_RV64, 0); -#endif - riscv_cpu_add_user_properties(obj); -} -#endif /* CONFIG_KVM */ - static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model) { ObjectClass *oc; @@ -2000,13 +1987,6 @@ static void riscv_vendor_cpu_class_init(ObjectClass *c, void *data) rcc->user_extension_properties = false; } -#define DEFINE_CPU(type_name, initfn) \ - { \ - .name = type_name, \ - .parent = TYPE_RISCV_CPU, \ - .instance_init = initfn \ - } - #define DEFINE_DYNAMIC_CPU(type_name, initfn) \ { \ .name = type_name, \ @@ -2047,9 +2027,6 @@ static const TypeInfo riscv_cpu_type_infos[] = { }, DEFINE_DYNAMIC_CPU(TYPE_RISCV_CPU_ANY, riscv_any_cpu_init), DEFINE_DYNAMIC_CPU(TYPE_RISCV_CPU_MAX, riscv_max_cpu_init), -#if defined(CONFIG_KVM) - DEFINE_CPU(TYPE_RISCV_CPU_HOST, riscv_host_cpu_init), -#endif #if defined(TARGET_RISCV32) DEFINE_DYNAMIC_CPU(TYPE_RISCV_CPU_BASE32, rv32_base_cpu_init), DEFINE_VENDOR_CPU(TYPE_RISCV_CPU_IBEX, rv32_ibex_cpu_init), diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c index 7c6dec05e3..59004caa8e 100644 --- a/target/riscv/kvm.c +++ b/target/riscv/kvm.c @@ -1217,3 +1217,32 @@ void kvm_riscv_aia_create(MachineState *machine, uint64_t group_shift, kvm_msi_via_irqfd_allowed = kvm_irqfds_enabled(); } + +static void riscv_host_cpu_init(Object *obj) +{ + CPURISCVState *env = &RISCV_CPU(obj)->env; + +#if defined(TARGET_RISCV32) + env->misa_mxl_max = env->misa_mxl = MXL_RV32; +#elif defined(TARGET_RISCV64) + env->misa_mxl_max = env->misa_mxl = MXL_RV64; +#endif +} + +static void riscv_kvm_cpu_class_init(ObjectClass *c, void *data) +{ + RISCVCPUClass *rcc = RISCV_CPU_CLASS(c); + + rcc->user_extension_properties = true; +} + +static const TypeInfo riscv_kvm_cpu_type_infos[] = { + { + .name = TYPE_RISCV_CPU_HOST, + .parent = TYPE_RISCV_CPU, + .instance_init = riscv_host_cpu_init, + .class_init = riscv_kvm_cpu_class_init, + } +}; + +DEFINE_TYPES(riscv_kvm_cpu_type_infos)
This CPU only exists if we're compiling with KVM so move it to the kvm specific file. While we're at it, change its class_init() to enable the user_extensions_flag class property, sparing us from having to execute riscv_cpu_add_user_properties() by hand and letting the post_init() hook do the work. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> --- target/riscv/cpu.c | 23 ----------------------- target/riscv/kvm.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 29 insertions(+), 23 deletions(-)