| Message ID | 20230802135723.178083-4-thuth@redhat.com |
|---|---|
| State | New |
| Headers | show |
| Series | Fix endianness issues in the intel-iommu device | expand |
On 2/8/23 15:57, Thomas Huth wrote: > On big endian hosts, we need to reverse the bitfield order in the > struct VTDInvDescIEC, just like it is already done for the other > bitfields in the various structs of the intel-iommu device. > > Signed-off-by: Thomas Huth <thuth@redhat.com> > --- > hw/i386/intel_iommu_internal.h | 9 +++++++++ > 1 file changed, 9 insertions(+) Isn't it a bit hacky? Bitfields can be accessed in a portable way using the deposit/extract API, right?
diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index 2e61eec2f5..e1450c5cfe 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -321,12 +321,21 @@ typedef enum VTDFaultReason { /* Interrupt Entry Cache Invalidation Descriptor: VT-d 6.5.2.7. */ struct VTDInvDescIEC { +#if HOST_BIG_ENDIAN + uint64_t reserved_2:16; + uint64_t index:16; /* Start index to invalidate */ + uint64_t index_mask:5; /* 2^N for continuous int invalidation */ + uint64_t resved_1:22; + uint64_t granularity:1; /* If set, it's global IR invalidation */ + uint64_t type:4; /* Should always be 0x4 */ +#else uint32_t type:4; /* Should always be 0x4 */ uint32_t granularity:1; /* If set, it's global IR invalidation */ uint32_t resved_1:22; uint32_t index_mask:5; /* 2^N for continuous int invalidation */ uint32_t index:16; /* Start index to invalidate */ uint32_t reserved_2:16; +#endif }; typedef struct VTDInvDescIEC VTDInvDescIEC;
On big endian hosts, we need to reverse the bitfield order in the struct VTDInvDescIEC, just like it is already done for the other bitfields in the various structs of the intel-iommu device. Signed-off-by: Thomas Huth <thuth@redhat.com> --- hw/i386/intel_iommu_internal.h | 9 +++++++++ 1 file changed, 9 insertions(+)