Message ID | 20230627163203.49422-12-dbarboza@ventanamicro.com |
---|---|
State | New |
Headers | show |
Series | target/riscv, KVM: fixes and enhancements | expand |
On 27/6/23 18:31, Daniel Henrique Barboza wrote: > Next patch will add KVM specific user properties for both MISA and > multi-letter extensions. For MISA extensions we want to make use of what > is already available in misa_ext_cfgs[] to avoid code repetition. > > misa_ext_info_arr[] array will hold name and description for each MISA > extension that misa_ext_cfgs[] is declaring. We'll then use this new > array in KVM code to avoid duplicating strings. > > There's nothing holding us back from doing the same with multi-letter > extensions. For now doing just with MISA extensions is enough. > > Suggested-by: Andrew Jones <ajones@ventanamicro.com> > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> > --- > target/riscv/cpu.c | 60 ++++++++++++++++++++++++++-------------------- > target/riscv/cpu.h | 11 ++++++++- > 2 files changed, 44 insertions(+), 27 deletions(-) > +const MISAExtInfo misa_ext_info_arr[] = { > + [RVA] = {"a", "Atomic instructions"}, > + [RVC] = {"c", "Compressed instructions"}, > + [RVD] = {"d", "Double-precision float point"}, > + [RVF] = {"f", "Single-precision float point"}, > + [RVI] = {"i", "Base integer instruction set"}, > + [RVE] = {"e", "Base integer instruction set (embedded)"}, > + [RVM] = {"m", "Integer multiplication and division"}, > + [RVS] = {"s", "Supervisor-level instructions"}, > + [RVU] = {"u", "User-level instructions"}, > + [RVH] = {"h", "Hypervisor"}, > + [RVJ] = {"x-j", "Dynamic translated languages"}, > + [RVV] = {"v", "Vector operations"}, > + [RVG] = {"g", "General purpose (IMAFD_Zicsr_Zifencei)"}, > +}; Personally I prefer using a getter() helper because we can check in a single place for empty entries in the array. IIUC this 13-entries array takes 4MiB (RVV is '1<<21' = 2MiB). Wouldn't it be clever to index by [a-z]? Except "x-j"...
On 6/27/23 18:29, Philippe Mathieu-Daudé wrote: > On 27/6/23 18:31, Daniel Henrique Barboza wrote: >> Next patch will add KVM specific user properties for both MISA and >> multi-letter extensions. For MISA extensions we want to make use of what >> is already available in misa_ext_cfgs[] to avoid code repetition. >> >> misa_ext_info_arr[] array will hold name and description for each MISA >> extension that misa_ext_cfgs[] is declaring. We'll then use this new >> array in KVM code to avoid duplicating strings. >> >> There's nothing holding us back from doing the same with multi-letter >> extensions. For now doing just with MISA extensions is enough. >> >> Suggested-by: Andrew Jones <ajones@ventanamicro.com> >> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> >> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> >> --- >> target/riscv/cpu.c | 60 ++++++++++++++++++++++++++-------------------- >> target/riscv/cpu.h | 11 ++++++++- >> 2 files changed, 44 insertions(+), 27 deletions(-) > > >> +const MISAExtInfo misa_ext_info_arr[] = { >> + [RVA] = {"a", "Atomic instructions"}, >> + [RVC] = {"c", "Compressed instructions"}, >> + [RVD] = {"d", "Double-precision float point"}, >> + [RVF] = {"f", "Single-precision float point"}, >> + [RVI] = {"i", "Base integer instruction set"}, >> + [RVE] = {"e", "Base integer instruction set (embedded)"}, >> + [RVM] = {"m", "Integer multiplication and division"}, >> + [RVS] = {"s", "Supervisor-level instructions"}, >> + [RVU] = {"u", "User-level instructions"}, >> + [RVH] = {"h", "Hypervisor"}, >> + [RVJ] = {"x-j", "Dynamic translated languages"}, >> + [RVV] = {"v", "Vector operations"}, >> + [RVG] = {"g", "General purpose (IMAFD_Zicsr_Zifencei)"}, >> +}; > > Personally I prefer using a getter() helper because we can check in > a single place for empty entries in the array. > > IIUC this 13-entries array takes 4MiB (RVV is '1<<21' = 2MiB). > > Wouldn't it be clever to index by [a-z]? Except "x-j"... Well .. RVA is 1<<0, RVC is 1<<2, up to RVV 1<<21. I guess this array can be indexed at zero, and then we create a getter() that retrieves the element we want using ctz32() to find the right index. Something in the likes of: MISAExtInfo *get_misa_ext_info(uint32_t bit) { return &misa_ext_info_arr[ctz32(bit)]; } And now, since we're using a getter, we don't need to export the whole array anymore. I'll see how it plays out. Thanks, Daniel > >
On 28/6/23 02:04, Daniel Henrique Barboza wrote: > > > On 6/27/23 18:29, Philippe Mathieu-Daudé wrote: >> On 27/6/23 18:31, Daniel Henrique Barboza wrote: >>> Next patch will add KVM specific user properties for both MISA and >>> multi-letter extensions. For MISA extensions we want to make use of what >>> is already available in misa_ext_cfgs[] to avoid code repetition. >>> >>> misa_ext_info_arr[] array will hold name and description for each MISA >>> extension that misa_ext_cfgs[] is declaring. We'll then use this new >>> array in KVM code to avoid duplicating strings. >>> >>> There's nothing holding us back from doing the same with multi-letter >>> extensions. For now doing just with MISA extensions is enough. >>> >>> Suggested-by: Andrew Jones <ajones@ventanamicro.com> >>> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> >>> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> >>> --- >>> target/riscv/cpu.c | 60 ++++++++++++++++++++++++++-------------------- >>> target/riscv/cpu.h | 11 ++++++++- >>> 2 files changed, 44 insertions(+), 27 deletions(-) >> >> >>> +const MISAExtInfo misa_ext_info_arr[] = { >>> + [RVA] = {"a", "Atomic instructions"}, >>> + [RVC] = {"c", "Compressed instructions"}, >>> + [RVD] = {"d", "Double-precision float point"}, >>> + [RVF] = {"f", "Single-precision float point"}, >>> + [RVI] = {"i", "Base integer instruction set"}, >>> + [RVE] = {"e", "Base integer instruction set (embedded)"}, >>> + [RVM] = {"m", "Integer multiplication and division"}, >>> + [RVS] = {"s", "Supervisor-level instructions"}, >>> + [RVU] = {"u", "User-level instructions"}, >>> + [RVH] = {"h", "Hypervisor"}, >>> + [RVJ] = {"x-j", "Dynamic translated languages"}, >>> + [RVV] = {"v", "Vector operations"}, >>> + [RVG] = {"g", "General purpose (IMAFD_Zicsr_Zifencei)"}, >>> +}; >> >> Personally I prefer using a getter() helper because we can check in >> a single place for empty entries in the array. >> >> IIUC this 13-entries array takes 4MiB (RVV is '1<<21' = 2MiB). >> >> Wouldn't it be clever to index by [a-z]? Except "x-j"... > > > Well .. RVA is 1<<0, RVC is 1<<2, up to RVV 1<<21. I guess this array can > be indexed at zero, and then we create a getter() that retrieves the > element > we want using ctz32() to find the right index. Something in the likes of: > > MISAExtInfo *get_misa_ext_info(uint32_t bit) > { > return &misa_ext_info_arr[ctz32(bit)]; > } Certainly cleaner :) > And now, since we're using a getter, we don't need to export the whole > array > anymore. Yes. > I'll see how it plays out. Thanks, Thanks! (and sorry for jumping late at v5)
On Tue, Jun 27, 2023 at 11:29:54PM +0200, Philippe Mathieu-Daudé wrote: > On 27/6/23 18:31, Daniel Henrique Barboza wrote: > > Next patch will add KVM specific user properties for both MISA and > > multi-letter extensions. For MISA extensions we want to make use of what > > is already available in misa_ext_cfgs[] to avoid code repetition. > > > > misa_ext_info_arr[] array will hold name and description for each MISA > > extension that misa_ext_cfgs[] is declaring. We'll then use this new > > array in KVM code to avoid duplicating strings. > > > > There's nothing holding us back from doing the same with multi-letter > > extensions. For now doing just with MISA extensions is enough. > > > > Suggested-by: Andrew Jones <ajones@ventanamicro.com> > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> > > --- > > target/riscv/cpu.c | 60 ++++++++++++++++++++++++++-------------------- > > target/riscv/cpu.h | 11 ++++++++- > > 2 files changed, 44 insertions(+), 27 deletions(-) > > > > +const MISAExtInfo misa_ext_info_arr[] = { > > + [RVA] = {"a", "Atomic instructions"}, > > + [RVC] = {"c", "Compressed instructions"}, > > + [RVD] = {"d", "Double-precision float point"}, > > + [RVF] = {"f", "Single-precision float point"}, > > + [RVI] = {"i", "Base integer instruction set"}, > > + [RVE] = {"e", "Base integer instruction set (embedded)"}, > > + [RVM] = {"m", "Integer multiplication and division"}, > > + [RVS] = {"s", "Supervisor-level instructions"}, > > + [RVU] = {"u", "User-level instructions"}, > > + [RVH] = {"h", "Hypervisor"}, > > + [RVJ] = {"x-j", "Dynamic translated languages"}, > > + [RVV] = {"v", "Vector operations"}, > > + [RVG] = {"g", "General purpose (IMAFD_Zicsr_Zifencei)"}, > > +}; > > Personally I prefer using a getter() helper because we can check in > a single place for empty entries in the array. > > IIUC this 13-entries array takes 4MiB (RVV is '1<<21' = 2MiB). Oh, ouch. I never looked close enough to see that these indices where the _shifted_ bitnums. I assumed they were _the_ bitnums, i.e. RVV == 21, not RVV == 2097152! Thanks, drew
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 641bec3573..0e5d8b05a2 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1566,33 +1566,41 @@ static void cpu_get_misa_ext_cfg(Object *obj, Visitor *v, const char *name, visit_type_bool(v, name, &value, errp); } +const MISAExtInfo misa_ext_info_arr[] = { + [RVA] = {"a", "Atomic instructions"}, + [RVC] = {"c", "Compressed instructions"}, + [RVD] = {"d", "Double-precision float point"}, + [RVF] = {"f", "Single-precision float point"}, + [RVI] = {"i", "Base integer instruction set"}, + [RVE] = {"e", "Base integer instruction set (embedded)"}, + [RVM] = {"m", "Integer multiplication and division"}, + [RVS] = {"s", "Supervisor-level instructions"}, + [RVU] = {"u", "User-level instructions"}, + [RVH] = {"h", "Hypervisor"}, + [RVJ] = {"x-j", "Dynamic translated languages"}, + [RVV] = {"v", "Vector operations"}, + [RVG] = {"g", "General purpose (IMAFD_Zicsr_Zifencei)"}, +}; + +#define MISA_CFG(_bit, _enabled) \ + {.name = misa_ext_info_arr[_bit].name, \ + .description = misa_ext_info_arr[_bit].description, \ + .misa_bit = _bit, .enabled = _enabled} + static const RISCVCPUMisaExtConfig misa_ext_cfgs[] = { - {.name = "a", .description = "Atomic instructions", - .misa_bit = RVA, .enabled = true}, - {.name = "c", .description = "Compressed instructions", - .misa_bit = RVC, .enabled = true}, - {.name = "d", .description = "Double-precision float point", - .misa_bit = RVD, .enabled = true}, - {.name = "f", .description = "Single-precision float point", - .misa_bit = RVF, .enabled = true}, - {.name = "i", .description = "Base integer instruction set", - .misa_bit = RVI, .enabled = true}, - {.name = "e", .description = "Base integer instruction set (embedded)", - .misa_bit = RVE, .enabled = false}, - {.name = "m", .description = "Integer multiplication and division", - .misa_bit = RVM, .enabled = true}, - {.name = "s", .description = "Supervisor-level instructions", - .misa_bit = RVS, .enabled = true}, - {.name = "u", .description = "User-level instructions", - .misa_bit = RVU, .enabled = true}, - {.name = "h", .description = "Hypervisor", - .misa_bit = RVH, .enabled = true}, - {.name = "x-j", .description = "Dynamic translated languages", - .misa_bit = RVJ, .enabled = false}, - {.name = "v", .description = "Vector operations", - .misa_bit = RVV, .enabled = false}, - {.name = "g", .description = "General purpose (IMAFD_Zicsr_Zifencei)", - .misa_bit = RVG, .enabled = false}, + MISA_CFG(RVA, true), + MISA_CFG(RVC, true), + MISA_CFG(RVD, true), + MISA_CFG(RVF, true), + MISA_CFG(RVI, true), + MISA_CFG(RVE, false), + MISA_CFG(RVM, true), + MISA_CFG(RVS, true), + MISA_CFG(RVU, true), + MISA_CFG(RVH, true), + MISA_CFG(RVJ, false), + MISA_CFG(RVV, false), + MISA_CFG(RVG, false), }; static void riscv_cpu_add_misa_properties(Object *cpu_obj) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index cc20ee25a7..d4cab2722b 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -41,7 +41,10 @@ #define RV(x) ((target_ulong)1 << (x - 'A')) -/* Consider updating misa_ext_cfgs[] when adding new MISA bits here */ +/* + * Consider updating misa_ext_info_arr[] and misa_ext_cfgs[] + * when adding new MISA bits here. + */ #define RVI RV('I') #define RVE RV('E') /* E and I are mutually exclusive */ #define RVM RV('M') @@ -56,6 +59,12 @@ #define RVJ RV('J') #define RVG RV('G') +typedef struct misa_ext_info { + const char *name; + const char *description; +} MISAExtInfo; + +extern const MISAExtInfo misa_ext_info_arr[]; /* Privileged specification version */ enum {