Message ID | 20230104020518.2564263-3-zhaotianrui@loongson.cn |
---|---|
State | New |
Headers | show |
Series | Add irq number property for loongarch pch interrupt controller | expand |
在 2023/1/4 上午10:05, Tianrui Zhao 写道: > With loongarch 7A1000 manual, irq number supported can be set > in PCH_PIC_INT_ID_HI register. This patch adds irq number property > for loongarch_pch_pic, so that virt machine can set different > irq number when pch_pic intc is added. > > Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn> > --- > hw/intc/loongarch_pch_pic.c | 34 +++++++++++++++++++++++++---- > hw/loongarch/virt.c | 8 ++++--- > include/hw/intc/loongarch_pch_pic.h | 5 ++--- > 3 files changed, 37 insertions(+), 10 deletions(-) Reviewed-by: Song Gao <gaosong@loongson.cn> Thanks. Song Gao > diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c > index 3380b09807..33966e7bac 100644 > --- a/hw/intc/loongarch_pch_pic.c > +++ b/hw/intc/loongarch_pch_pic.c > @@ -6,12 +6,15 @@ > */ > > #include "qemu/osdep.h" > +#include "qemu/bitops.h" > #include "hw/sysbus.h" > #include "hw/loongarch/virt.h" > #include "hw/irq.h" > #include "hw/intc/loongarch_pch_pic.h" > +#include "hw/qdev-properties.h" > #include "migration/vmstate.h" > #include "trace.h" > +#include "qapi/error.h" > > static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level) > { > @@ -40,7 +43,7 @@ static void pch_pic_irq_handler(void *opaque, int irq, int level) > LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); > uint64_t mask = 1ULL << irq; > > - assert(irq < PCH_PIC_IRQ_NUM); > + assert(irq < s->irq_num); > trace_loongarch_pch_pic_irq_handler(irq, level); > > if (s->intedge & mask) { > @@ -78,7 +81,12 @@ static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr, > val = PCH_PIC_INT_ID_VAL; > break; > case PCH_PIC_INT_ID_HI: > - val = PCH_PIC_INT_ID_NUM; > + /* > + * With 7A1000 manual > + * bit 0-15 pch irqchip version > + * bit 16-31 irq number supported with pch irqchip > + */ > + val = deposit32(PCH_PIC_INT_ID_VER, 16, 16, s->irq_num - 1); > break; > case PCH_PIC_INT_MASK_LO: > val = (uint32_t)s->int_mask; > @@ -365,6 +373,19 @@ static void loongarch_pch_pic_reset(DeviceState *d) > s->int_polarity = 0x0; > } > > +static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) > +{ > + LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev); > + > + if (!s->irq_num || s->irq_num > PCH_PIC_IRQ_NUM) { > + error_setg(errp, "Invalid 'pic_irq_num'"); > + return; > + } > + > + qdev_init_gpio_out(dev, s->parent_irq, s->irq_num); > + qdev_init_gpio_in(dev, pch_pic_irq_handler, s->irq_num); > +} > + > static void loongarch_pch_pic_init(Object *obj) > { > LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(obj); > @@ -382,10 +403,13 @@ static void loongarch_pch_pic_init(Object *obj) > sysbus_init_mmio(sbd, &s->iomem8); > sysbus_init_mmio(sbd, &s->iomem32_high); > > - qdev_init_gpio_out(DEVICE(obj), s->parent_irq, PCH_PIC_IRQ_NUM); > - qdev_init_gpio_in(DEVICE(obj), pch_pic_irq_handler, PCH_PIC_IRQ_NUM); > } > > +static Property loongarch_pch_pic_properties[] = { > + DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPCHPIC, irq_num, 0), > + DEFINE_PROP_END_OF_LIST(), > +}; > + > static const VMStateDescription vmstate_loongarch_pch_pic = { > .name = TYPE_LOONGARCH_PCH_PIC, > .version_id = 1, > @@ -411,8 +435,10 @@ static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data) > { > DeviceClass *dc = DEVICE_CLASS(klass); > > + dc->realize = loongarch_pch_pic_realize; > dc->reset = loongarch_pch_pic_reset; > dc->vmsd = &vmstate_loongarch_pch_pic; > + device_class_set_props(dc, loongarch_pch_pic_properties); > } > > static const TypeInfo loongarch_pch_pic_info = { > diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c > index 1e58346aeb..a39704e1e7 100644 > --- a/hw/loongarch/virt.c > +++ b/hw/loongarch/virt.c > @@ -559,6 +559,8 @@ static void loongarch_irq_init(LoongArchMachineState *lams) > } > > pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC); > + num = PCH_PIC_IRQ_NUM; > + qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); > d = SYS_BUS_DEVICE(pch_pic); > sysbus_realize_and_unref(d, &error_fatal); > memory_region_add_subregion(get_system_memory(), VIRT_IOAPIC_REG_BASE, > @@ -570,13 +572,13 @@ static void loongarch_irq_init(LoongArchMachineState *lams) > VIRT_IOAPIC_REG_BASE + PCH_PIC_INT_STATUS_LO, > sysbus_mmio_get_region(d, 2)); > > - /* Connect 64 pch_pic irqs to extioi */ > - for (int i = 0; i < PCH_PIC_IRQ_NUM; i++) { > + /* Connect pch_pic irqs to extioi */ > + for (int i = 0; i < num; i++) { > qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i)); > } > > pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); > - start = PCH_PIC_IRQ_NUM; > + start = num; > num = EXTIOI_IRQS - start; > qdev_prop_set_uint32(pch_msi, "msi_irq_base", start); > qdev_prop_set_uint32(pch_msi, "msi_irq_num", num); > diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h > index 2d4aa9ed6f..efae5fa8e9 100644 > --- a/include/hw/intc/loongarch_pch_pic.h > +++ b/include/hw/intc/loongarch_pch_pic.h > @@ -9,11 +9,9 @@ > #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name > OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC) > > -#define PCH_PIC_IRQ_START 0 > -#define PCH_PIC_IRQ_END 63 > #define PCH_PIC_IRQ_NUM 64 > #define PCH_PIC_INT_ID_VAL 0x7000000UL > -#define PCH_PIC_INT_ID_NUM 0x3f0001UL > +#define PCH_PIC_INT_ID_VER 0x1UL > > #define PCH_PIC_INT_ID_LO 0x00 > #define PCH_PIC_INT_ID_HI 0x04 > @@ -66,4 +64,5 @@ struct LoongArchPCHPIC { > MemoryRegion iomem32_low; > MemoryRegion iomem32_high; > MemoryRegion iomem8; > + unsigned int irq_num; > };
diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index 3380b09807..33966e7bac 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -6,12 +6,15 @@ */ #include "qemu/osdep.h" +#include "qemu/bitops.h" #include "hw/sysbus.h" #include "hw/loongarch/virt.h" #include "hw/irq.h" #include "hw/intc/loongarch_pch_pic.h" +#include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "trace.h" +#include "qapi/error.h" static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level) { @@ -40,7 +43,7 @@ static void pch_pic_irq_handler(void *opaque, int irq, int level) LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque); uint64_t mask = 1ULL << irq; - assert(irq < PCH_PIC_IRQ_NUM); + assert(irq < s->irq_num); trace_loongarch_pch_pic_irq_handler(irq, level); if (s->intedge & mask) { @@ -78,7 +81,12 @@ static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr, val = PCH_PIC_INT_ID_VAL; break; case PCH_PIC_INT_ID_HI: - val = PCH_PIC_INT_ID_NUM; + /* + * With 7A1000 manual + * bit 0-15 pch irqchip version + * bit 16-31 irq number supported with pch irqchip + */ + val = deposit32(PCH_PIC_INT_ID_VER, 16, 16, s->irq_num - 1); break; case PCH_PIC_INT_MASK_LO: val = (uint32_t)s->int_mask; @@ -365,6 +373,19 @@ static void loongarch_pch_pic_reset(DeviceState *d) s->int_polarity = 0x0; } +static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) +{ + LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev); + + if (!s->irq_num || s->irq_num > PCH_PIC_IRQ_NUM) { + error_setg(errp, "Invalid 'pic_irq_num'"); + return; + } + + qdev_init_gpio_out(dev, s->parent_irq, s->irq_num); + qdev_init_gpio_in(dev, pch_pic_irq_handler, s->irq_num); +} + static void loongarch_pch_pic_init(Object *obj) { LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(obj); @@ -382,10 +403,13 @@ static void loongarch_pch_pic_init(Object *obj) sysbus_init_mmio(sbd, &s->iomem8); sysbus_init_mmio(sbd, &s->iomem32_high); - qdev_init_gpio_out(DEVICE(obj), s->parent_irq, PCH_PIC_IRQ_NUM); - qdev_init_gpio_in(DEVICE(obj), pch_pic_irq_handler, PCH_PIC_IRQ_NUM); } +static Property loongarch_pch_pic_properties[] = { + DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPCHPIC, irq_num, 0), + DEFINE_PROP_END_OF_LIST(), +}; + static const VMStateDescription vmstate_loongarch_pch_pic = { .name = TYPE_LOONGARCH_PCH_PIC, .version_id = 1, @@ -411,8 +435,10 @@ static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + dc->realize = loongarch_pch_pic_realize; dc->reset = loongarch_pch_pic_reset; dc->vmsd = &vmstate_loongarch_pch_pic; + device_class_set_props(dc, loongarch_pch_pic_properties); } static const TypeInfo loongarch_pch_pic_info = { diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 1e58346aeb..a39704e1e7 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -559,6 +559,8 @@ static void loongarch_irq_init(LoongArchMachineState *lams) } pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC); + num = PCH_PIC_IRQ_NUM; + qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num); d = SYS_BUS_DEVICE(pch_pic); sysbus_realize_and_unref(d, &error_fatal); memory_region_add_subregion(get_system_memory(), VIRT_IOAPIC_REG_BASE, @@ -570,13 +572,13 @@ static void loongarch_irq_init(LoongArchMachineState *lams) VIRT_IOAPIC_REG_BASE + PCH_PIC_INT_STATUS_LO, sysbus_mmio_get_region(d, 2)); - /* Connect 64 pch_pic irqs to extioi */ - for (int i = 0; i < PCH_PIC_IRQ_NUM; i++) { + /* Connect pch_pic irqs to extioi */ + for (int i = 0; i < num; i++) { qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i)); } pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); - start = PCH_PIC_IRQ_NUM; + start = num; num = EXTIOI_IRQS - start; qdev_prop_set_uint32(pch_msi, "msi_irq_base", start); qdev_prop_set_uint32(pch_msi, "msi_irq_num", num); diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h index 2d4aa9ed6f..efae5fa8e9 100644 --- a/include/hw/intc/loongarch_pch_pic.h +++ b/include/hw/intc/loongarch_pch_pic.h @@ -9,11 +9,9 @@ #define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC) -#define PCH_PIC_IRQ_START 0 -#define PCH_PIC_IRQ_END 63 #define PCH_PIC_IRQ_NUM 64 #define PCH_PIC_INT_ID_VAL 0x7000000UL -#define PCH_PIC_INT_ID_NUM 0x3f0001UL +#define PCH_PIC_INT_ID_VER 0x1UL #define PCH_PIC_INT_ID_LO 0x00 #define PCH_PIC_INT_ID_HI 0x04 @@ -66,4 +64,5 @@ struct LoongArchPCHPIC { MemoryRegion iomem32_low; MemoryRegion iomem32_high; MemoryRegion iomem8; + unsigned int irq_num; };
With loongarch 7A1000 manual, irq number supported can be set in PCH_PIC_INT_ID_HI register. This patch adds irq number property for loongarch_pch_pic, so that virt machine can set different irq number when pch_pic intc is added. Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn> --- hw/intc/loongarch_pch_pic.c | 34 +++++++++++++++++++++++++---- hw/loongarch/virt.c | 8 ++++--- include/hw/intc/loongarch_pch_pic.h | 5 ++--- 3 files changed, 37 insertions(+), 10 deletions(-)