| Message ID | 20221215065011.2133471-2-zhaotianrui@loongson.cn |
|---|---|
| State | New |
| Headers | show |
| Series | Add irq number property for loongarch pch interrupt controller | expand |
On 15/12/22 07:50, Tianrui Zhao wrote: > This patch adds irq number property for loongarch msi interrupt > controller, and remove hard coding irq number macro. > > Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn> > --- > hw/intc/loongarch_pch_msi.c | 22 +++++++++++++++++++--- > hw/loongarch/virt.c | 11 +++++++---- > include/hw/intc/loongarch_pch_msi.h | 3 ++- > include/hw/pci-host/ls7a.h | 1 - > 4 files changed, 28 insertions(+), 9 deletions(-) > @@ -49,6 +49,22 @@ static void pch_msi_irq_handler(void *opaque, int irq, int level) > qemu_set_irq(s->pch_msi_irq[irq], level); > } > > +static void loongarch_pch_msi_realize(DeviceState *dev, Error **errp) > +{ > + LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(dev); > + > + assert(s->irq_num > 0); if (!s->irq_num || s->irq_num > PCH_MSI_IRQ_NUM) { error_setg(errp, "Invalid 'msi_irq_num'"); return; } > + s->pch_msi_irq = g_malloc(sizeof(qemu_irq) * s->irq_num); s->pch_msi_irq = g_new(qemu_irq, s->irq_num); > + if (!s->pch_msi_irq) { > + error_report("loongarch_pch_msi: fail to alloc memory"); > + exit(1); > + } > + > + qdev_init_gpio_out(dev, s->pch_msi_irq, s->irq_num); > + qdev_init_gpio_in(dev, pch_msi_irq_handler, s->irq_num); > +} Missing g_free(s->pch_msi_irq) in loongarch_pch_msi_unrealize(). > static void loongarch_pch_msi_init(Object *obj) > { > LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(obj); > @@ -59,12 +75,11 @@ static void loongarch_pch_msi_init(Object *obj) > sysbus_init_mmio(sbd, &s->msi_mmio); > msi_nonbroken = true; > > - qdev_init_gpio_out(DEVICE(obj), s->pch_msi_irq, PCH_MSI_IRQ_NUM); > - qdev_init_gpio_in(DEVICE(obj), pch_msi_irq_handler, PCH_MSI_IRQ_NUM); > } > > static Property loongarch_msi_properties[] = { > DEFINE_PROP_UINT32("msi_irq_base", LoongArchPCHMSI, irq_base, 0), > + DEFINE_PROP_UINT32("msi_irq_num", LoongArchPCHMSI, irq_num, 0), > DEFINE_PROP_END_OF_LIST(), > }; > > @@ -72,6 +87,7 @@ static void loongarch_pch_msi_class_init(ObjectClass *klass, void *data) > { > DeviceClass *dc = DEVICE_CLASS(klass); > > + dc->realize = loongarch_pch_msi_realize; dc->unrealize = loongarch_pch_msi_unrealize; > device_class_set_props(dc, loongarch_msi_properties); > } > > diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c > index 958be74fa1..3547d5f711 100644 > --- a/hw/loongarch/virt.c > +++ b/hw/loongarch/virt.c > @@ -496,7 +496,7 @@ static void loongarch_irq_init(LoongArchMachineState *lams) > LoongArchCPU *lacpu; > CPULoongArchState *env; > CPUState *cpu_state; > - int cpu, pin, i; > + int cpu, pin, i, start, num; > > ipi = qdev_new(TYPE_LOONGARCH_IPI); > sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal); > @@ -576,14 +576,17 @@ static void loongarch_irq_init(LoongArchMachineState *lams) > } > > pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); > - qdev_prop_set_uint32(pch_msi, "msi_irq_base", PCH_MSI_IRQ_START); > + start = PCH_PIC_IRQ_NUM; > + num = 256 - start; This part is confuse. So you don't need PCH_MSI_IRQ_START anymore? What is this magic '256' value? > + qdev_prop_set_uint32(pch_msi, "msi_irq_base", start); > + qdev_prop_set_uint32(pch_msi, "msi_irq_num", num); > d = SYS_BUS_DEVICE(pch_msi); > sysbus_realize_and_unref(d, &error_fatal); > sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW); > - for (i = 0; i < PCH_MSI_IRQ_NUM; i++) { > + for (i = 0; i < num; i++) { > /* Connect 192 pch_msi irqs to extioi */ > qdev_connect_gpio_out(DEVICE(d), i, > - qdev_get_gpio_in(extioi, i + PCH_MSI_IRQ_START)); > + qdev_get_gpio_in(extioi, i + start)); > }
在 2022年12月15日 15:40, Philippe Mathieu-Daudé 写道: > On 15/12/22 07:50, Tianrui Zhao wrote: >> This patch adds irq number property for loongarch msi interrupt >> controller, and remove hard coding irq number macro. >> >> Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn> >> --- >> hw/intc/loongarch_pch_msi.c | 22 +++++++++++++++++++--- >> hw/loongarch/virt.c | 11 +++++++---- >> include/hw/intc/loongarch_pch_msi.h | 3 ++- >> include/hw/pci-host/ls7a.h | 1 - >> 4 files changed, 28 insertions(+), 9 deletions(-) > > >> @@ -49,6 +49,22 @@ static void pch_msi_irq_handler(void *opaque, int >> irq, int level) >> qemu_set_irq(s->pch_msi_irq[irq], level); >> } >> +static void loongarch_pch_msi_realize(DeviceState *dev, Error **errp) >> +{ >> + LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(dev); >> + >> + assert(s->irq_num > 0); > > if (!s->irq_num || s->irq_num > PCH_MSI_IRQ_NUM) { > error_setg(errp, "Invalid 'msi_irq_num'"); > return; > } > >> + s->pch_msi_irq = g_malloc(sizeof(qemu_irq) * s->irq_num); > > s->pch_msi_irq = g_new(qemu_irq, s->irq_num); > >> + if (!s->pch_msi_irq) { >> + error_report("loongarch_pch_msi: fail to alloc memory"); >> + exit(1); >> + } >> + >> + qdev_init_gpio_out(dev, s->pch_msi_irq, s->irq_num); >> + qdev_init_gpio_in(dev, pch_msi_irq_handler, s->irq_num); >> +} > > Missing g_free(s->pch_msi_irq) in loongarch_pch_msi_unrealize(). > >> static void loongarch_pch_msi_init(Object *obj) >> { >> LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(obj); >> @@ -59,12 +75,11 @@ static void loongarch_pch_msi_init(Object *obj) >> sysbus_init_mmio(sbd, &s->msi_mmio); >> msi_nonbroken = true; >> - qdev_init_gpio_out(DEVICE(obj), s->pch_msi_irq, PCH_MSI_IRQ_NUM); >> - qdev_init_gpio_in(DEVICE(obj), pch_msi_irq_handler, >> PCH_MSI_IRQ_NUM); >> } >> static Property loongarch_msi_properties[] = { >> DEFINE_PROP_UINT32("msi_irq_base", LoongArchPCHMSI, irq_base, 0), >> + DEFINE_PROP_UINT32("msi_irq_num", LoongArchPCHMSI, irq_num, 0), >> DEFINE_PROP_END_OF_LIST(), >> }; >> @@ -72,6 +87,7 @@ static void >> loongarch_pch_msi_class_init(ObjectClass *klass, void *data) >> { >> DeviceClass *dc = DEVICE_CLASS(klass); >> + dc->realize = loongarch_pch_msi_realize; > > dc->unrealize = loongarch_pch_msi_unrealize; > >> device_class_set_props(dc, loongarch_msi_properties); >> } >> diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c >> index 958be74fa1..3547d5f711 100644 >> --- a/hw/loongarch/virt.c >> +++ b/hw/loongarch/virt.c >> @@ -496,7 +496,7 @@ static void >> loongarch_irq_init(LoongArchMachineState *lams) >> LoongArchCPU *lacpu; >> CPULoongArchState *env; >> CPUState *cpu_state; >> - int cpu, pin, i; >> + int cpu, pin, i, start, num; >> ipi = qdev_new(TYPE_LOONGARCH_IPI); >> sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal); >> @@ -576,14 +576,17 @@ static void >> loongarch_irq_init(LoongArchMachineState *lams) >> } >> pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); >> - qdev_prop_set_uint32(pch_msi, "msi_irq_base", PCH_MSI_IRQ_START); >> + start = PCH_PIC_IRQ_NUM; >> + num = 256 - start; > > This part is confuse. So you don't need PCH_MSI_IRQ_START anymore? > What is this magic '256' value? On loongarch platform, both PCH_pic and PCH_MSI intc are connected to upper extioi controller, PCH_pic is triggered by irq line and PCH_MSI is trigger by message method. No, PCH_MSI_IRQ_START is not necessary any more. 256 is total supported irq number with extioi controller, we will replace it with macro EXTIOI_IRQS. We can adjust irq number between PCH_pic and PCH_MSI, only if the total number is no larger than EXTIOI_IRQS. In general there are lots of msi vectors requirements since there may be many virtio devices; there is no much requirements for PCH_pic intc, since gpex pcie irq number is 4 and there is fewer legacy non-pci devices(such as rtc/uart/acpi ged). I want to adjust number PCH_pic intc with smaller value, and increase irq number of PCH_MSI intc in future. > > >> + qdev_prop_set_uint32(pch_msi, "msi_irq_base", start); >> + qdev_prop_set_uint32(pch_msi, "msi_irq_num", num); >> d = SYS_BUS_DEVICE(pch_msi); >> sysbus_realize_and_unref(d, &error_fatal); >> sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW); >> - for (i = 0; i < PCH_MSI_IRQ_NUM; i++) { >> + for (i = 0; i < num; i++) { >> /* Connect 192 pch_msi irqs to extioi */ >> qdev_connect_gpio_out(DEVICE(d), i, >> - qdev_get_gpio_in(extioi, i + >> PCH_MSI_IRQ_START)); >> + qdev_get_gpio_in(extioi, i + start)); >> } >
diff --git a/hw/intc/loongarch_pch_msi.c b/hw/intc/loongarch_pch_msi.c index b36d6d76e4..279be448d2 100644 --- a/hw/intc/loongarch_pch_msi.c +++ b/hw/intc/loongarch_pch_msi.c @@ -32,7 +32,7 @@ static void loongarch_msi_mem_write(void *opaque, hwaddr addr, */ irq_num = (val & 0xff) - s->irq_base; trace_loongarch_msi_set_irq(irq_num); - assert(irq_num < PCH_MSI_IRQ_NUM); + assert(irq_num < s->irq_num); qemu_set_irq(s->pch_msi_irq[irq_num], 1); } @@ -49,6 +49,22 @@ static void pch_msi_irq_handler(void *opaque, int irq, int level) qemu_set_irq(s->pch_msi_irq[irq], level); } +static void loongarch_pch_msi_realize(DeviceState *dev, Error **errp) +{ + LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(dev); + + assert(s->irq_num > 0); + + s->pch_msi_irq = g_malloc(sizeof(qemu_irq) * s->irq_num); + if (!s->pch_msi_irq) { + error_report("loongarch_pch_msi: fail to alloc memory"); + exit(1); + } + + qdev_init_gpio_out(dev, s->pch_msi_irq, s->irq_num); + qdev_init_gpio_in(dev, pch_msi_irq_handler, s->irq_num); +} + static void loongarch_pch_msi_init(Object *obj) { LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(obj); @@ -59,12 +75,11 @@ static void loongarch_pch_msi_init(Object *obj) sysbus_init_mmio(sbd, &s->msi_mmio); msi_nonbroken = true; - qdev_init_gpio_out(DEVICE(obj), s->pch_msi_irq, PCH_MSI_IRQ_NUM); - qdev_init_gpio_in(DEVICE(obj), pch_msi_irq_handler, PCH_MSI_IRQ_NUM); } static Property loongarch_msi_properties[] = { DEFINE_PROP_UINT32("msi_irq_base", LoongArchPCHMSI, irq_base, 0), + DEFINE_PROP_UINT32("msi_irq_num", LoongArchPCHMSI, irq_num, 0), DEFINE_PROP_END_OF_LIST(), }; @@ -72,6 +87,7 @@ static void loongarch_pch_msi_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + dc->realize = loongarch_pch_msi_realize; device_class_set_props(dc, loongarch_msi_properties); } diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 958be74fa1..3547d5f711 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -496,7 +496,7 @@ static void loongarch_irq_init(LoongArchMachineState *lams) LoongArchCPU *lacpu; CPULoongArchState *env; CPUState *cpu_state; - int cpu, pin, i; + int cpu, pin, i, start, num; ipi = qdev_new(TYPE_LOONGARCH_IPI); sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal); @@ -576,14 +576,17 @@ static void loongarch_irq_init(LoongArchMachineState *lams) } pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI); - qdev_prop_set_uint32(pch_msi, "msi_irq_base", PCH_MSI_IRQ_START); + start = PCH_PIC_IRQ_NUM; + num = 256 - start; + qdev_prop_set_uint32(pch_msi, "msi_irq_base", start); + qdev_prop_set_uint32(pch_msi, "msi_irq_num", num); d = SYS_BUS_DEVICE(pch_msi); sysbus_realize_and_unref(d, &error_fatal); sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW); - for (i = 0; i < PCH_MSI_IRQ_NUM; i++) { + for (i = 0; i < num; i++) { /* Connect 192 pch_msi irqs to extioi */ qdev_connect_gpio_out(DEVICE(d), i, - qdev_get_gpio_in(extioi, i + PCH_MSI_IRQ_START)); + qdev_get_gpio_in(extioi, i + start)); } loongarch_devices_init(pch_pic, lams); diff --git a/include/hw/intc/loongarch_pch_msi.h b/include/hw/intc/loongarch_pch_msi.h index 6d67560dea..c5a52bc327 100644 --- a/include/hw/intc/loongarch_pch_msi.h +++ b/include/hw/intc/loongarch_pch_msi.h @@ -15,8 +15,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHMSI, LOONGARCH_PCH_MSI) struct LoongArchPCHMSI { SysBusDevice parent_obj; - qemu_irq pch_msi_irq[PCH_MSI_IRQ_NUM]; + qemu_irq *pch_msi_irq; MemoryRegion msi_mmio; /* irq base passed to upper extioi intc */ unsigned int irq_base; + unsigned int irq_num; }; diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h index df7fa55a30..6443327bd7 100644 --- a/include/hw/pci-host/ls7a.h +++ b/include/hw/pci-host/ls7a.h @@ -34,7 +34,6 @@ */ #define PCH_PIC_IRQ_OFFSET 64 #define VIRT_DEVICE_IRQS 16 -#define VIRT_PCI_IRQS 48 #define VIRT_UART_IRQ (PCH_PIC_IRQ_OFFSET + 2) #define VIRT_UART_BASE 0x1fe001e0 #define VIRT_UART_SIZE 0X100
This patch adds irq number property for loongarch msi interrupt controller, and remove hard coding irq number macro. Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn> --- hw/intc/loongarch_pch_msi.c | 22 +++++++++++++++++++--- hw/loongarch/virt.c | 11 +++++++---- include/hw/intc/loongarch_pch_msi.h | 3 ++- include/hw/pci-host/ls7a.h | 1 - 4 files changed, 28 insertions(+), 9 deletions(-)