| Message ID | 20220308135047.478297-7-npiggin@gmail.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | powerpc/rtas: various cleanups and improvements | expand |
On 08/03/2022, 14:50:39, Nicholas Piggin wrote: > Rather than adjust the current MSR value to find the rtas entry > MSR on 64-bit, load the explicit value we want as 32-bit does. > > This prevents some facilities (e.g., VEC and VSX) from being left > enabled which doesn't seem to cause a problem but it's more > consistent to always use the same MSR and minimise facilities > enabled. > > Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Laurent Dufour <ldufour@linux.ibm.com> > --- > arch/powerpc/kernel/rtas_entry.S | 9 +-------- > 1 file changed, 1 insertion(+), 8 deletions(-) > > diff --git a/arch/powerpc/kernel/rtas_entry.S b/arch/powerpc/kernel/rtas_entry.S > index 7b93687b9a10..08eb731f08b8 100644 > --- a/arch/powerpc/kernel/rtas_entry.S > +++ b/arch/powerpc/kernel/rtas_entry.S > @@ -99,14 +99,7 @@ _GLOBAL(enter_rtas) > clrldi r4,r4,2 /* convert to realmode address */ > mtlr r4 > > - li r0,0 > - ori r0,r0,MSR_EE|MSR_SE|MSR_BE|MSR_RI > - andc r0,r6,r0 > - > - li r9,1 > - rldicr r9,r9,MSR_SF_LG,(63-MSR_SF_LG) > - ori r9,r9,MSR_IR|MSR_DR|MSR_FE0|MSR_FE1|MSR_FP|MSR_RI|MSR_LE > - andc r6,r0,r9 > + LOAD_REG_IMMEDIATE(r6, MSR_ME) > > __enter_rtas: > LOAD_REG_ADDR(r4, rtas)
diff --git a/arch/powerpc/kernel/rtas_entry.S b/arch/powerpc/kernel/rtas_entry.S index 7b93687b9a10..08eb731f08b8 100644 --- a/arch/powerpc/kernel/rtas_entry.S +++ b/arch/powerpc/kernel/rtas_entry.S @@ -99,14 +99,7 @@ _GLOBAL(enter_rtas) clrldi r4,r4,2 /* convert to realmode address */ mtlr r4 - li r0,0 - ori r0,r0,MSR_EE|MSR_SE|MSR_BE|MSR_RI - andc r0,r6,r0 - - li r9,1 - rldicr r9,r9,MSR_SF_LG,(63-MSR_SF_LG) - ori r9,r9,MSR_IR|MSR_DR|MSR_FE0|MSR_FE1|MSR_FP|MSR_RI|MSR_LE - andc r6,r0,r9 + LOAD_REG_IMMEDIATE(r6, MSR_ME) __enter_rtas: LOAD_REG_ADDR(r4, rtas)
Rather than adjust the current MSR value to find the rtas entry MSR on 64-bit, load the explicit value we want as 32-bit does. This prevents some facilities (e.g., VEC and VSX) from being left enabled which doesn't seem to cause a problem but it's more consistent to always use the same MSR and minimise facilities enabled. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> --- arch/powerpc/kernel/rtas_entry.S | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-)