Message ID | 20210413080745.33004-5-wangyanan55@huawei.com |
---|---|
State | New |
Headers | show |
Series | hw/arm/virt: Introduce cpu topology support | expand |
On Tue, Apr 13, 2021 at 04:07:43PM +0800, Yanan Wang wrote: > Add a generic API to build Processor Hierarchy Node Structure(Type 0), > which is strictly consistent with descriptions in ACPI 6.3: 5.2.29.1. > > This function will be used to build ACPI PPTT table for cpu topology. > > Signed-off-by: Ying Fang <fangying1@huawei.com> > Signed-off-by: Henglong Fan <fanhenglong@huawei.com> > Signed-off-by: Yanan Wang <wangyanan55@huawei.com> > --- > hw/acpi/aml-build.c | 27 +++++++++++++++++++++++++++ > include/hw/acpi/aml-build.h | 4 ++++ > 2 files changed, 31 insertions(+) > > diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c > index d33ce8954a..75e01aea17 100644 > --- a/hw/acpi/aml-build.c > +++ b/hw/acpi/aml-build.c > @@ -1916,6 +1916,33 @@ void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms, > table_data->len - slit_start, 1, oem_id, oem_table_id); > } > > +/* > + * ACPI 6.3: 5.2.29.1 Processor Hierarchy Node Structure (Type 0) ^ Doesn't this table show up in 6.2 first? We should always use the oldest specification we can. Also, please don't capitalize Hierarchy, Node, and Structure. Those words are not capitalized in the spec section name and we want an exact match here. > + */ > +void build_processor_hierarchy_node(GArray *tbl, uint32_t flags, > + uint32_t parent, uint32_t id, > + uint32_t *priv_rsrc, uint32_t priv_num) > +{ > + int i; > + > + build_append_byte(tbl, 0); /* Type 0 - processor */ > + build_append_byte(tbl, 20 + priv_num * 4); /* Length */ > + build_append_int_noprefix(tbl, 0, 2); /* Reserved */ > + build_append_int_noprefix(tbl, flags, 4); /* Flags */ > + build_append_int_noprefix(tbl, parent, 4); /* Parent */ > + build_append_int_noprefix(tbl, id, 4); /* ACPI processor ID */ ^ should be capitalized like in the spec > + > + /* Number of private resources */ > + build_append_int_noprefix(tbl, priv_num, 4); > + > + /* Private resources[N] */ > + if (priv_num > 0 && priv_rsrc != NULL) { Since we should never have priv_num > 0 and priv_rsrc == NULL, then we can do if (priv_num > 0) { assert(priv_rsrc); ... > + for (i = 0; i < priv_num; i++) { > + build_append_int_noprefix(tbl, priv_rsrc[i], 4); > + } > + } > +} > + > /* build rev1/rev3/rev5.1 FADT */ > void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f, > const char *oem_id, const char *oem_table_id) > diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h > index 471266d739..ea74b8f6ed 100644 > --- a/include/hw/acpi/aml-build.h > +++ b/include/hw/acpi/aml-build.h > @@ -462,6 +462,10 @@ void build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base, > void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms, > const char *oem_id, const char *oem_table_id); > > +void build_processor_hierarchy_node(GArray *tbl, uint32_t flags, > + uint32_t parent, uint32_t id, > + uint32_t *priv_rsrc, uint32_t priv_num); > + > void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f, > const char *oem_id, const char *oem_table_id); > > -- > 2.19.1 > Thanks, drew
Hi Drew, On 2021/4/27 21:37, Andrew Jones wrote: > On Tue, Apr 13, 2021 at 04:07:43PM +0800, Yanan Wang wrote: >> Add a generic API to build Processor Hierarchy Node Structure(Type 0), >> which is strictly consistent with descriptions in ACPI 6.3: 5.2.29.1. >> >> This function will be used to build ACPI PPTT table for cpu topology. >> >> Signed-off-by: Ying Fang <fangying1@huawei.com> >> Signed-off-by: Henglong Fan <fanhenglong@huawei.com> >> Signed-off-by: Yanan Wang <wangyanan55@huawei.com> >> --- >> hw/acpi/aml-build.c | 27 +++++++++++++++++++++++++++ >> include/hw/acpi/aml-build.h | 4 ++++ >> 2 files changed, 31 insertions(+) >> >> diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c >> index d33ce8954a..75e01aea17 100644 >> --- a/hw/acpi/aml-build.c >> +++ b/hw/acpi/aml-build.c >> @@ -1916,6 +1916,33 @@ void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms, >> table_data->len - slit_start, 1, oem_id, oem_table_id); >> } >> >> +/* >> + * ACPI 6.3: 5.2.29.1 Processor Hierarchy Node Structure (Type 0) > ^ Doesn't this table show up in 6.2 first? We should always > use the oldest specification we can. Yes, it shows up for the first time in 6.2 specification. > Also, please don't capitalize Hierarchy, Node, and Structure. Those words > are not capitalized in the spec section name and we want an exact match > here. Indeed, the exact format in spec is "5.2.29.1 Processor hierarchy node structure (Type 0)" I will fix this. >> + */ >> +void build_processor_hierarchy_node(GArray *tbl, uint32_t flags, >> + uint32_t parent, uint32_t id, >> + uint32_t *priv_rsrc, uint32_t priv_num) >> +{ >> + int i; >> + >> + build_append_byte(tbl, 0); /* Type 0 - processor */ >> + build_append_byte(tbl, 20 + priv_num * 4); /* Length */ >> + build_append_int_noprefix(tbl, 0, 2); /* Reserved */ >> + build_append_int_noprefix(tbl, flags, 4); /* Flags */ >> + build_append_int_noprefix(tbl, parent, 4); /* Parent */ >> + build_append_int_noprefix(tbl, id, 4); /* ACPI processor ID */ > ^ should be > capitalized like in the spec Right. > >> + >> + /* Number of private resources */ >> + build_append_int_noprefix(tbl, priv_num, 4); >> + >> + /* Private resources[N] */ >> + if (priv_num > 0 && priv_rsrc != NULL) { > Since we should never have priv_num > 0 and priv_rsrc == NULL, then we can > do > > if (priv_num > 0) { > assert(priv_rsrc); > ... It seems much better, will fit it. Thanks, Yanan >> + for (i = 0; i < priv_num; i++) { >> + build_append_int_noprefix(tbl, priv_rsrc[i], 4); >> + } >> + } >> +} >> + >> /* build rev1/rev3/rev5.1 FADT */ >> void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f, >> const char *oem_id, const char *oem_table_id) >> diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h >> index 471266d739..ea74b8f6ed 100644 >> --- a/include/hw/acpi/aml-build.h >> +++ b/include/hw/acpi/aml-build.h >> @@ -462,6 +462,10 @@ void build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base, >> void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms, >> const char *oem_id, const char *oem_table_id); >> >> +void build_processor_hierarchy_node(GArray *tbl, uint32_t flags, >> + uint32_t parent, uint32_t id, >> + uint32_t *priv_rsrc, uint32_t priv_num); >> + >> void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f, >> const char *oem_id, const char *oem_table_id); >> >> -- >> 2.19.1 >> > Thanks, > drew > > .
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c index d33ce8954a..75e01aea17 100644 --- a/hw/acpi/aml-build.c +++ b/hw/acpi/aml-build.c @@ -1916,6 +1916,33 @@ void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms, table_data->len - slit_start, 1, oem_id, oem_table_id); } +/* + * ACPI 6.3: 5.2.29.1 Processor Hierarchy Node Structure (Type 0) + */ +void build_processor_hierarchy_node(GArray *tbl, uint32_t flags, + uint32_t parent, uint32_t id, + uint32_t *priv_rsrc, uint32_t priv_num) +{ + int i; + + build_append_byte(tbl, 0); /* Type 0 - processor */ + build_append_byte(tbl, 20 + priv_num * 4); /* Length */ + build_append_int_noprefix(tbl, 0, 2); /* Reserved */ + build_append_int_noprefix(tbl, flags, 4); /* Flags */ + build_append_int_noprefix(tbl, parent, 4); /* Parent */ + build_append_int_noprefix(tbl, id, 4); /* ACPI processor ID */ + + /* Number of private resources */ + build_append_int_noprefix(tbl, priv_num, 4); + + /* Private resources[N] */ + if (priv_num > 0 && priv_rsrc != NULL) { + for (i = 0; i < priv_num; i++) { + build_append_int_noprefix(tbl, priv_rsrc[i], 4); + } + } +} + /* build rev1/rev3/rev5.1 FADT */ void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f, const char *oem_id, const char *oem_table_id) diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h index 471266d739..ea74b8f6ed 100644 --- a/include/hw/acpi/aml-build.h +++ b/include/hw/acpi/aml-build.h @@ -462,6 +462,10 @@ void build_srat_memory(AcpiSratMemoryAffinity *numamem, uint64_t base, void build_slit(GArray *table_data, BIOSLinker *linker, MachineState *ms, const char *oem_id, const char *oem_table_id); +void build_processor_hierarchy_node(GArray *tbl, uint32_t flags, + uint32_t parent, uint32_t id, + uint32_t *priv_rsrc, uint32_t priv_num); + void build_fadt(GArray *tbl, BIOSLinker *linker, const AcpiFadtData *f, const char *oem_id, const char *oem_table_id);