@@ -24,6 +24,7 @@
#include "hw.h"
#include "pc.h"
+#include "microblaze_pic_cpu.h"
#define D(x)
@@ -43,7 +44,6 @@ static void microblaze_pic_cpu_handler(void *opaque, int irq, int level)
cpu_reset_interrupt(env, type);
}
-qemu_irq *microblaze_pic_init_cpu(CPUState *env);
qemu_irq *microblaze_pic_init_cpu(CPUState *env)
{
return qemu_allocate_irqs(microblaze_pic_cpu_handler, env, 2);
new file mode 100644
@@ -0,0 +1,8 @@
+#ifndef MICROBLAZE_PIC_CPU_H
+#define MICROBLAZE_PIC_CPU_H
+
+#include "qemu-common.h"
+
+qemu_irq *microblaze_pic_init_cpu(CPUState *env);
+
+#endif /* MICROBLAZE_PIC_CPU_H */
@@ -39,6 +39,7 @@
#include "blockdev.h"
#include "pc.h"
+#include "microblaze_pic_cpu.h"
#include "xilinx_axidma.h"
#define LMB_BRAM_SIZE (128 * 1024)
@@ -36,6 +36,8 @@
#include "elf.h"
#include "blockdev.h"
+#include "microblaze_pic_cpu.h"
+
#define LMB_BRAM_SIZE (128 * 1024)
#define FLASH_SIZE (16 * 1024 * 1024)
@@ -1,9 +1,6 @@
#include "qemu-common.h"
#include "net.h"
-/* OPB Interrupt Controller. */
-qemu_irq *microblaze_pic_init_cpu(CPUState *env);
-
static inline DeviceState *
xilinx_intc_create(target_phys_addr_t base, qemu_irq irq, int kind_of_intr)
{
This is a microblaze target specific function that belongs outside of xilinx.h (which is a collection of target independent device model instantiator functions) Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> --- hw/microblaze_pic_cpu.c | 2 +- hw/microblaze_pic_cpu.h | 8 ++++++++ hw/petalogix_ml605_mmu.c | 1 + hw/petalogix_s3adsp1800_mmu.c | 2 ++ hw/xilinx.h | 3 --- 5 files changed, 12 insertions(+), 4 deletions(-) create mode 100644 hw/microblaze_pic_cpu.h