Message ID | 20201124095838.18665-2-clombard@linux.vnet.ibm.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | ocxl: Mmio invalidation support | expand |
Context | Check | Description |
---|---|---|
snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/merge (7c94b5d4e9d328a69d43a11d7e3dfd7a6d762cb6) |
snowpatch_ozlabs/checkpatch | warning | total: 0 errors, 0 warnings, 2 checks, 55 lines checked |
snowpatch_ozlabs/needsstable | success | Patch has no Fixes tags |
On 24/11/2020 10:58, Christophe Lombard wrote: > Platform specific function to assign a register set to a Logical Partition. > The "ibm,mmio-atsd" property, provided by the firmware, contains the 16 > base ATSD physical addresses (ATSD0 through ATSD15) of the set of MMIO > registers (XTS MMIO ATSDx LPARID/AVA/launch/status register). > > For the time being, the ATSD0 set of registers is used by default. > > Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com> > --- Looks good, thanks for the updates! Acked-by: Frederic Barrat <fbarrat@linux.ibm.com> > arch/powerpc/include/asm/pnv-ocxl.h | 3 ++ > arch/powerpc/platforms/powernv/ocxl.c | 45 +++++++++++++++++++++++++++ > 2 files changed, 48 insertions(+) > > diff --git a/arch/powerpc/include/asm/pnv-ocxl.h b/arch/powerpc/include/asm/pnv-ocxl.h > index d37ededca3ee..60c3c74427d9 100644 > --- a/arch/powerpc/include/asm/pnv-ocxl.h > +++ b/arch/powerpc/include/asm/pnv-ocxl.h > @@ -28,4 +28,7 @@ int pnv_ocxl_spa_setup(struct pci_dev *dev, void *spa_mem, int PE_mask, void **p > void pnv_ocxl_spa_release(void *platform_data); > int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle); > > +int pnv_ocxl_map_lpar(struct pci_dev *dev, uint64_t lparid, > + uint64_t lpcr, void __iomem **arva); > +void pnv_ocxl_unmap_lpar(void __iomem *arva); > #endif /* _ASM_PNV_OCXL_H */ > diff --git a/arch/powerpc/platforms/powernv/ocxl.c b/arch/powerpc/platforms/powernv/ocxl.c > index ecdad219d704..57fc1062677b 100644 > --- a/arch/powerpc/platforms/powernv/ocxl.c > +++ b/arch/powerpc/platforms/powernv/ocxl.c > @@ -483,3 +483,48 @@ int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle) > return rc; > } > EXPORT_SYMBOL_GPL(pnv_ocxl_spa_remove_pe_from_cache); > + > +int pnv_ocxl_map_lpar(struct pci_dev *dev, uint64_t lparid, > + uint64_t lpcr, void __iomem **arva) > +{ > + struct pci_controller *hose = pci_bus_to_host(dev->bus); > + struct pnv_phb *phb = hose->private_data; > + u64 mmio_atsd; > + int rc; > + > + /* ATSD physical address. > + * ATSD LAUNCH register: write access initiates a shoot down to > + * initiate the TLB Invalidate command. > + */ > + rc = of_property_read_u64_index(hose->dn, "ibm,mmio-atsd", > + 0, &mmio_atsd); > + if (rc) { > + dev_info(&dev->dev, "No available ATSD found\n"); > + return rc; > + } > + > + /* Assign a register set to a Logical Partition and MMIO ATSD > + * LPARID register to the required value. > + */ > + rc = opal_npu_map_lpar(phb->opal_id, pci_dev_id(dev), > + lparid, lpcr); > + if (rc) { > + dev_err(&dev->dev, "Error mapping device to LPAR: %d\n", rc); > + return rc; > + } > + > + *arva = ioremap(mmio_atsd, 24); > + if (!(*arva)) { > + dev_warn(&dev->dev, "ioremap failed - mmio_atsd: %#llx\n", mmio_atsd); > + rc = -ENOMEM; > + } > + > + return rc; > +} > +EXPORT_SYMBOL_GPL(pnv_ocxl_map_lpar); > + > +void pnv_ocxl_unmap_lpar(void __iomem *arva) > +{ > + iounmap(arva); > +} > +EXPORT_SYMBOL_GPL(pnv_ocxl_unmap_lpar); >
diff --git a/arch/powerpc/include/asm/pnv-ocxl.h b/arch/powerpc/include/asm/pnv-ocxl.h index d37ededca3ee..60c3c74427d9 100644 --- a/arch/powerpc/include/asm/pnv-ocxl.h +++ b/arch/powerpc/include/asm/pnv-ocxl.h @@ -28,4 +28,7 @@ int pnv_ocxl_spa_setup(struct pci_dev *dev, void *spa_mem, int PE_mask, void **p void pnv_ocxl_spa_release(void *platform_data); int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle); +int pnv_ocxl_map_lpar(struct pci_dev *dev, uint64_t lparid, + uint64_t lpcr, void __iomem **arva); +void pnv_ocxl_unmap_lpar(void __iomem *arva); #endif /* _ASM_PNV_OCXL_H */ diff --git a/arch/powerpc/platforms/powernv/ocxl.c b/arch/powerpc/platforms/powernv/ocxl.c index ecdad219d704..57fc1062677b 100644 --- a/arch/powerpc/platforms/powernv/ocxl.c +++ b/arch/powerpc/platforms/powernv/ocxl.c @@ -483,3 +483,48 @@ int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int pe_handle) return rc; } EXPORT_SYMBOL_GPL(pnv_ocxl_spa_remove_pe_from_cache); + +int pnv_ocxl_map_lpar(struct pci_dev *dev, uint64_t lparid, + uint64_t lpcr, void __iomem **arva) +{ + struct pci_controller *hose = pci_bus_to_host(dev->bus); + struct pnv_phb *phb = hose->private_data; + u64 mmio_atsd; + int rc; + + /* ATSD physical address. + * ATSD LAUNCH register: write access initiates a shoot down to + * initiate the TLB Invalidate command. + */ + rc = of_property_read_u64_index(hose->dn, "ibm,mmio-atsd", + 0, &mmio_atsd); + if (rc) { + dev_info(&dev->dev, "No available ATSD found\n"); + return rc; + } + + /* Assign a register set to a Logical Partition and MMIO ATSD + * LPARID register to the required value. + */ + rc = opal_npu_map_lpar(phb->opal_id, pci_dev_id(dev), + lparid, lpcr); + if (rc) { + dev_err(&dev->dev, "Error mapping device to LPAR: %d\n", rc); + return rc; + } + + *arva = ioremap(mmio_atsd, 24); + if (!(*arva)) { + dev_warn(&dev->dev, "ioremap failed - mmio_atsd: %#llx\n", mmio_atsd); + rc = -ENOMEM; + } + + return rc; +} +EXPORT_SYMBOL_GPL(pnv_ocxl_map_lpar); + +void pnv_ocxl_unmap_lpar(void __iomem *arva) +{ + iounmap(arva); +} +EXPORT_SYMBOL_GPL(pnv_ocxl_unmap_lpar);
Platform specific function to assign a register set to a Logical Partition. The "ibm,mmio-atsd" property, provided by the firmware, contains the 16 base ATSD physical addresses (ATSD0 through ATSD15) of the set of MMIO registers (XTS MMIO ATSDx LPARID/AVA/launch/status register). For the time being, the ATSD0 set of registers is used by default. Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com> --- arch/powerpc/include/asm/pnv-ocxl.h | 3 ++ arch/powerpc/platforms/powernv/ocxl.c | 45 +++++++++++++++++++++++++++ 2 files changed, 48 insertions(+)