Message ID | 1600672204-1610-1-git-send-email-atrajeev@linux.vnet.ibm.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 3b6c3adbb2fa42749c3d38cfc4d4d0b7e096bb7b |
Headers | show |
Series | [V2] powerpc/perf: Exclude pmc5/6 from the irrelevant PMU group constraints | expand |
Context | Check | Description |
---|---|---|
snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/merge (ace1986562a0814f179ecd2f1e648215ebc6625a) |
snowpatch_ozlabs/build-ppc64le | warning | Upstream build failed, couldn't test patch |
snowpatch_ozlabs/build-ppc64be | warning | Upstream build failed, couldn't test patch |
snowpatch_ozlabs/build-ppc64e | warning | Upstream build failed, couldn't test patch |
snowpatch_ozlabs/build-pmac32 | warning | Upstream build failed, couldn't test patch |
snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 22 lines checked |
snowpatch_ozlabs/needsstable | warning | Please consider tagging this patch for stable! |
On 9/21/20 12:40 PM, Athira Rajeev wrote: > PMU counter support functions enforces event constraints for group of > events to check if all events in a group can be monitored. Incase of > event codes using PMC5 and PMC6 ( 500fa and 600f4 respectively ), > not all constraints are applicable, say the threshold or sample bits. > But current code includes pmc5 and pmc6 in some group constraints (like > IC_DC Qualifier bits) which is actually not applicable and hence results > in those events not getting counted when scheduled along with group of > other events. Patch fixes this by excluding PMC5/6 from constraints > which are not relevant for it. Changes looks fine to me. Reviewed-by: Madhavan Srinivasan <maddy@linux.ibm.com> we need to CC this in Stable too. > Fixes: 7ffd948 ("powerpc/perf: factor out power8 pmu functions") > Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> > --- > Changes in v2: > - Added a block comment in the fix path explaining > why the change is needed. > > arch/powerpc/perf/isa207-common.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c > index 964437a..12153da 100644 > --- a/arch/powerpc/perf/isa207-common.c > +++ b/arch/powerpc/perf/isa207-common.c > @@ -288,6 +288,15 @@ int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp) > > mask |= CNST_PMC_MASK(pmc); > value |= CNST_PMC_VAL(pmc); > + > + /* > + * PMC5 and PMC6 are used to count cycles and instructions > + * and these doesnot support most of the constraint bits. > + * Add a check to exclude PMC5/6 from most of the constraints > + * except for ebb/bhrb. > + */ > + if (pmc >= 5) > + goto ebb_bhrb; > } > > if (pmc <= 4) { > @@ -357,6 +366,7 @@ int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp) > } > } > > +ebb_bhrb: > if (!pmc && ebb) > /* EBB events must specify the PMC */ > return -1;
Just one nit in a comment below... (and this is not worthy of tags like "reviewed-by" ;-) On Mon, Sep 21, 2020 at 03:10:04AM -0400, Athira Rajeev wrote: > PMU counter support functions enforces event constraints for group of > events to check if all events in a group can be monitored. Incase of > event codes using PMC5 and PMC6 ( 500fa and 600f4 respectively ), > not all constraints are applicable, say the threshold or sample bits. > But current code includes pmc5 and pmc6 in some group constraints (like > IC_DC Qualifier bits) which is actually not applicable and hence results > in those events not getting counted when scheduled along with group of > other events. Patch fixes this by excluding PMC5/6 from constraints > which are not relevant for it. > > Fixes: 7ffd948 ("powerpc/perf: factor out power8 pmu functions") > Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> > --- > diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c > index 964437a..12153da 100644 > --- a/arch/powerpc/perf/isa207-common.c > +++ b/arch/powerpc/perf/isa207-common.c > @@ -288,6 +288,15 @@ int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp) > > mask |= CNST_PMC_MASK(pmc); > value |= CNST_PMC_VAL(pmc); > + > + /* > + * PMC5 and PMC6 are used to count cycles and instructions > + * and these doesnot support most of the constraint bits. s/doesnot/do not/ > + * Add a check to exclude PMC5/6 from most of the constraints > + * except for ebb/bhrb. > + */ > + if (pmc >= 5) > + goto ebb_bhrb; PC
> On 22-Sep-2020, at 4:16 PM, Paul A. Clarke <pc@us.ibm.com> wrote: > > Just one nit in a comment below... > (and this is not worthy of tags like "reviewed-by" ;-) > > On Mon, Sep 21, 2020 at 03:10:04AM -0400, Athira Rajeev wrote: >> PMU counter support functions enforces event constraints for group of >> events to check if all events in a group can be monitored. Incase of >> event codes using PMC5 and PMC6 ( 500fa and 600f4 respectively ), >> not all constraints are applicable, say the threshold or sample bits. >> But current code includes pmc5 and pmc6 in some group constraints (like >> IC_DC Qualifier bits) which is actually not applicable and hence results >> in those events not getting counted when scheduled along with group of >> other events. Patch fixes this by excluding PMC5/6 from constraints >> which are not relevant for it. >> >> Fixes: 7ffd948 ("powerpc/perf: factor out power8 pmu functions") >> Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> >> --- > >> diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c >> index 964437a..12153da 100644 >> --- a/arch/powerpc/perf/isa207-common.c >> +++ b/arch/powerpc/perf/isa207-common.c >> @@ -288,6 +288,15 @@ int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp) >> >> mask |= CNST_PMC_MASK(pmc); >> value |= CNST_PMC_VAL(pmc); >> + >> + /* >> + * PMC5 and PMC6 are used to count cycles and instructions >> + * and these doesnot support most of the constraint bits. > > s/doesnot/do not/ Hi Paul, Thanks for checking the patch and sharing the comment. Athira > >> + * Add a check to exclude PMC5/6 from most of the constraints >> + * except for ebb/bhrb. >> + */ >> + if (pmc >= 5) >> + goto ebb_bhrb; > > PC
On Mon, 21 Sep 2020 03:10:04 -0400, Athira Rajeev wrote: > PMU counter support functions enforces event constraints for group of > events to check if all events in a group can be monitored. Incase of > event codes using PMC5 and PMC6 ( 500fa and 600f4 respectively ), > not all constraints are applicable, say the threshold or sample bits. > But current code includes pmc5 and pmc6 in some group constraints (like > IC_DC Qualifier bits) which is actually not applicable and hence results > in those events not getting counted when scheduled along with group of > other events. Patch fixes this by excluding PMC5/6 from constraints > which are not relevant for it. Applied to powerpc/next. [1/1] powerpc/perf: Exclude pmc5/6 from the irrelevant PMU group constraints https://git.kernel.org/powerpc/c/3b6c3adbb2fa42749c3d38cfc4d4d0b7e096bb7b cheers
diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c index 964437a..12153da 100644 --- a/arch/powerpc/perf/isa207-common.c +++ b/arch/powerpc/perf/isa207-common.c @@ -288,6 +288,15 @@ int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp) mask |= CNST_PMC_MASK(pmc); value |= CNST_PMC_VAL(pmc); + + /* + * PMC5 and PMC6 are used to count cycles and instructions + * and these doesnot support most of the constraint bits. + * Add a check to exclude PMC5/6 from most of the constraints + * except for ebb/bhrb. + */ + if (pmc >= 5) + goto ebb_bhrb; } if (pmc <= 4) { @@ -357,6 +366,7 @@ int isa207_get_constraint(u64 event, unsigned long *maskp, unsigned long *valp) } } +ebb_bhrb: if (!pmc && ebb) /* EBB events must specify the PMC */ return -1;
PMU counter support functions enforces event constraints for group of events to check if all events in a group can be monitored. Incase of event codes using PMC5 and PMC6 ( 500fa and 600f4 respectively ), not all constraints are applicable, say the threshold or sample bits. But current code includes pmc5 and pmc6 in some group constraints (like IC_DC Qualifier bits) which is actually not applicable and hence results in those events not getting counted when scheduled along with group of other events. Patch fixes this by excluding PMC5/6 from constraints which are not relevant for it. Fixes: 7ffd948 ("powerpc/perf: factor out power8 pmu functions") Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com> --- Changes in v2: - Added a block comment in the fix path explaining why the change is needed. arch/powerpc/perf/isa207-common.c | 10 ++++++++++ 1 file changed, 10 insertions(+)