| Message ID | 20200416221908.7886-1-chris.packham@alliedtelesis.co.nz (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 94c0b013c98583614e1ad911e8795ca36da34a85 |
| Headers | show |
| Series | [v3] powerpc/setup_64: Set cache-line-size based on cache-block-size | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/merge (a9aa21d05c33c556e48c5062b6632a9b94906570) |
| snowpatch_ozlabs/build-ppc64le | success | Build succeeded |
| snowpatch_ozlabs/build-ppc64be | success | Build succeeded |
| snowpatch_ozlabs/build-ppc64e | success | Build succeeded |
| snowpatch_ozlabs/build-pmac32 | warning | Upstream build failed, couldn't test patch |
| snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 8 lines checked |
| snowpatch_ozlabs/needsstable | warning | Please consider tagging this patch for stable! |
On Thu, 2020-04-16 at 22:19:08 UTC, Chris Packham wrote: > If {i,d}-cache-block-size is set and {i,d}-cache-line-size is not, use > the block-size value for both. Per the devicetree spec cache-line-size > is only needed if it differs from the block size. > > Originally the code would fallback from block size to line size. An > error message was printed if both properties were missing. > > Later the code was refactored to use clearer names and logic but it > inadvertently made line size a required property. This caused the > default values to be used and in turn leads to Power9 systems using the > wrong size. > > Fixes: bd067f83b084 ("powerpc/64: Fix naming of cache block vs. cache lin= > e") > Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Applied to powerpc fixes, thanks. https://git.kernel.org/powerpc/c/94c0b013c98583614e1ad911e8795ca36da34a85 cheers
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index 438a9befce41..8105010b0e76 100644 --- a/arch/powerpc/kernel/setup_64.c +++ b/arch/powerpc/kernel/setup_64.c @@ -534,6 +534,8 @@ static bool __init parse_cache_info(struct device_node *np, lsizep = of_get_property(np, propnames[3], NULL); if (bsizep == NULL) bsizep = lsizep; + if (lsizep == NULL) + lsizep = bsizep; if (lsizep != NULL) lsize = be32_to_cpu(*lsizep); if (bsizep != NULL)
If {i,d}-cache-block-size is set and {i,d}-cache-line-size is not, use the block-size value for both. Per the devicetree spec cache-line-size is only needed if it differs from the block size. Originally the code would fallback from block size to line size. An error message was printed if both properties were missing. Later the code was refactored to use clearer names and logic but it inadvertently made line size a required property. This caused the default values to be used and in turn leads to Power9 systems using the wrong size. Fixes: bd067f83b084 ("powerpc/64: Fix naming of cache block vs. cache line") Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> --- It looks as though the bsizep = lsizep is not required per the spec but it's probably safer to retain it. Changes in v3: - Rebase against 5.7.0-rc1 - Add Fixes tag - Add more information to commit message Changes in v2: - Scott pointed out that u-boot should be filling in the cache properties (which it does). But it does not specify a cache-line-size because it provides a cache-block-size and the spec says you don't have to if they are the same. So the error is in the parsing not in the devicetree itself. arch/powerpc/kernel/setup_64.c | 2 ++ 1 file changed, 2 insertions(+)