| Message ID | 20200317141018.42380-4-psampat@linux.ibm.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Introduce Self-Save API for deep stop states | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | Successfully applied on branch powerpc/merge (8a445cbcb9f5090cb07ec6cbb89a8a1fc99a0ff7) |
| snowpatch_ozlabs/build-ppc64le | warning | Build succeeded but added 2 new sparse warnings |
| snowpatch_ozlabs/build-ppc64be | warning | Build succeeded but added 2 new sparse warnings |
| snowpatch_ozlabs/build-ppc64e | success | Build succeeded |
| snowpatch_ozlabs/build-pmac32 | success | Build succeeded |
| snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 103 lines checked |
| snowpatch_ozlabs/needsstable | success | Patch has no Fixes tags |
* Pratik Rajesh Sampat <psampat@linux.ibm.com> [2020-03-17 19:40:18]: > Parse the device tree for nodes self-save, self-restore and populate > support for the preferred SPRs based what was advertised by the device > tree. > > Signed-off-by: Pratik Rajesh Sampat <psampat@linux.ibm.com> > Reviewed-by: Ram Pai <linuxram@us.ibm.com> Reviewed-by: Vaidyanathan Srinivasan <svaidy@linux.ibm.com> > > --- > .../bindings/powerpc/opal/power-mgt.txt | 10 +++ > arch/powerpc/platforms/powernv/idle.c | 78 +++++++++++++++++++ > 2 files changed, 88 insertions(+) > > diff --git a/Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt b/Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt > index 9d619e955576..093cb5fe3d2d 100644 > --- a/Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt > +++ b/Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt > @@ -116,3 +116,13 @@ otherwise. The length of all the property arrays must be the same. > which of the fields of the PMICR are set in the corresponding > entries in ibm,cpu-idle-state-pmicr. This is an optional > property on POWER8 and is absent on POWER9. > + > +- self-restore: > + Array of unsigned 64-bit values containing a property for sprn-mask > + with each bit indicating the index of the supported SPR for the > + functionality. This is an optional property for both Power8 and Power9 > + > +- self-save: > + Array of unsigned 64-bit values containing a property for sprn-mask > + with each bit indicating the index of the supported SPR for the > + functionality. This is an optional property for both Power8 and Power9 > diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c > index 97aeb45e897b..c39111b338ff 100644 > --- a/arch/powerpc/platforms/powernv/idle.c > +++ b/arch/powerpc/platforms/powernv/idle.c > @@ -1436,6 +1436,81 @@ static void __init pnv_probe_idle_states(void) > supported_cpuidle_states |= pnv_idle_states[i].flags; > } > > +/* > + * Extracts and populates the self save or restore capabilities > + * passed from the device tree node > + */ > +static int extract_save_restore_state_dt(struct device_node *np, int type) > +{ > + int nr_sprns = 0, i, bitmask_index; > + u64 *temp_u64; > + u64 bit_pos; > + > + nr_sprns = of_property_count_u64_elems(np, "sprn-bitmask"); > + if (nr_sprns <= 0) > + return -EINVAL; > + temp_u64 = kcalloc(nr_sprns, sizeof(u64), GFP_KERNEL); > + if (of_property_read_u64_array(np, "sprn-bitmask", > + temp_u64, nr_sprns)) { > + pr_warn("cpuidle-powernv: failed to find registers in DT\n"); > + kfree(temp_u64); > + return -EINVAL; > + } > + /* > + * Populate acknowledgment of support for the sprs in the global vector > + * gotten by the registers supplied by the firmware. > + * The registers are in a bitmask, bit index within > + * that specifies the SPR > + */ > + for (i = 0; i < nr_preferred_sprs; i++) { > + bitmask_index = BIT_WORD(preferred_sprs[i].spr); > + bit_pos = BIT_MASK(preferred_sprs[i].spr); > + if ((temp_u64[bitmask_index] & bit_pos) == 0) { > + if (type == SELF_RESTORE_TYPE) > + preferred_sprs[i].supported_mode &= > + ~SELF_RESTORE_STRICT; > + else > + preferred_sprs[i].supported_mode &= > + ~SELF_SAVE_STRICT; > + continue; > + } > + if (type == SELF_RESTORE_TYPE) { > + preferred_sprs[i].supported_mode |= > + SELF_RESTORE_STRICT; > + } else { > + preferred_sprs[i].supported_mode |= > + SELF_SAVE_STRICT; > + } > + } > + > + kfree(temp_u64); > + return 0; > +} > + > +static int pnv_parse_deepstate_dt(void) > +{ > + struct device_node *np; > + int rc = 0, i; > + > + /* Self restore register population */ > + np = of_find_compatible_node(NULL, NULL, "ibm,opal-self-restore"); > + if (np) { > + rc = extract_save_restore_state_dt(np, SELF_RESTORE_TYPE); > + if (rc != 0) > + return rc; > + } > + /* Self save register population */ > + np = of_find_compatible_node(NULL, NULL, "ibm,opal-self-save"); > + if (!np) { > + for (i = 0; i < nr_preferred_sprs; i++) > + preferred_sprs[i].supported_mode &= ~SELF_SAVE_STRICT; > + } else { > + rc = extract_save_restore_state_dt(np, SELF_SAVE_TYPE); > + } > + of_node_put(np); > + return rc; > +} > + > /* > * This function parses device-tree and populates all the information > * into pnv_idle_states structure. It also sets up nr_pnv_idle_states > @@ -1584,6 +1659,9 @@ static int __init pnv_init_idle_states(void) > return rc; > pnv_probe_idle_states(); > > + rc = pnv_parse_deepstate_dt(); > + if (rc) > + return rc; > if (!cpu_has_feature(CPU_FTR_ARCH_300)) { > if (!(supported_cpuidle_states & OPAL_PM_SLEEP_ENABLED_ER1)) { > power7_fastsleep_workaround_entry = false; > -- Thanks Michael for the detailed review and feedback. Your review comments have been addressed by Pratik. --Vaidy
diff --git a/Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt b/Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt index 9d619e955576..093cb5fe3d2d 100644 --- a/Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt +++ b/Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt @@ -116,3 +116,13 @@ otherwise. The length of all the property arrays must be the same. which of the fields of the PMICR are set in the corresponding entries in ibm,cpu-idle-state-pmicr. This is an optional property on POWER8 and is absent on POWER9. + +- self-restore: + Array of unsigned 64-bit values containing a property for sprn-mask + with each bit indicating the index of the supported SPR for the + functionality. This is an optional property for both Power8 and Power9 + +- self-save: + Array of unsigned 64-bit values containing a property for sprn-mask + with each bit indicating the index of the supported SPR for the + functionality. This is an optional property for both Power8 and Power9 diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c index 97aeb45e897b..c39111b338ff 100644 --- a/arch/powerpc/platforms/powernv/idle.c +++ b/arch/powerpc/platforms/powernv/idle.c @@ -1436,6 +1436,81 @@ static void __init pnv_probe_idle_states(void) supported_cpuidle_states |= pnv_idle_states[i].flags; } +/* + * Extracts and populates the self save or restore capabilities + * passed from the device tree node + */ +static int extract_save_restore_state_dt(struct device_node *np, int type) +{ + int nr_sprns = 0, i, bitmask_index; + u64 *temp_u64; + u64 bit_pos; + + nr_sprns = of_property_count_u64_elems(np, "sprn-bitmask"); + if (nr_sprns <= 0) + return -EINVAL; + temp_u64 = kcalloc(nr_sprns, sizeof(u64), GFP_KERNEL); + if (of_property_read_u64_array(np, "sprn-bitmask", + temp_u64, nr_sprns)) { + pr_warn("cpuidle-powernv: failed to find registers in DT\n"); + kfree(temp_u64); + return -EINVAL; + } + /* + * Populate acknowledgment of support for the sprs in the global vector + * gotten by the registers supplied by the firmware. + * The registers are in a bitmask, bit index within + * that specifies the SPR + */ + for (i = 0; i < nr_preferred_sprs; i++) { + bitmask_index = BIT_WORD(preferred_sprs[i].spr); + bit_pos = BIT_MASK(preferred_sprs[i].spr); + if ((temp_u64[bitmask_index] & bit_pos) == 0) { + if (type == SELF_RESTORE_TYPE) + preferred_sprs[i].supported_mode &= + ~SELF_RESTORE_STRICT; + else + preferred_sprs[i].supported_mode &= + ~SELF_SAVE_STRICT; + continue; + } + if (type == SELF_RESTORE_TYPE) { + preferred_sprs[i].supported_mode |= + SELF_RESTORE_STRICT; + } else { + preferred_sprs[i].supported_mode |= + SELF_SAVE_STRICT; + } + } + + kfree(temp_u64); + return 0; +} + +static int pnv_parse_deepstate_dt(void) +{ + struct device_node *np; + int rc = 0, i; + + /* Self restore register population */ + np = of_find_compatible_node(NULL, NULL, "ibm,opal-self-restore"); + if (np) { + rc = extract_save_restore_state_dt(np, SELF_RESTORE_TYPE); + if (rc != 0) + return rc; + } + /* Self save register population */ + np = of_find_compatible_node(NULL, NULL, "ibm,opal-self-save"); + if (!np) { + for (i = 0; i < nr_preferred_sprs; i++) + preferred_sprs[i].supported_mode &= ~SELF_SAVE_STRICT; + } else { + rc = extract_save_restore_state_dt(np, SELF_SAVE_TYPE); + } + of_node_put(np); + return rc; +} + /* * This function parses device-tree and populates all the information * into pnv_idle_states structure. It also sets up nr_pnv_idle_states @@ -1584,6 +1659,9 @@ static int __init pnv_init_idle_states(void) return rc; pnv_probe_idle_states(); + rc = pnv_parse_deepstate_dt(); + if (rc) + return rc; if (!cpu_has_feature(CPU_FTR_ARCH_300)) { if (!(supported_cpuidle_states & OPAL_PM_SLEEP_ENABLED_ER1)) { power7_fastsleep_workaround_entry = false;