Message ID | 4c6da03cac4.3957dfc0@auth.smtp.1and1.co.uk (mailing list archive) |
---|---|
State | Accepted |
Commit | 68f211a4d1e5882e881bbb84b6505908dde5f625 |
Headers | show |
Series | [NEXT,v2,1/4] powerpc/pasemi: Add PCI initialisation for Nemo board. | expand |
Context | Check | Description |
---|---|---|
snowpatch_ozlabs/apply_patch | success | next/apply_patch Successfully applied |
snowpatch_ozlabs/checkpatch | fail | Test checkpatch on branch next |
Michael, Any comments on these? On 19/08/2018, Darren Stevens wrote: > The A-Eon Amigaone X1000's Nemo motherboard has an AMD SB600 > connected to one of the PCI-e root ports on its PaSemi > Pwrficient 1628M SoC. Normally the SB600 southbridge would be > connected to a hidden PCI-e port on the system's northbridge, > and as a result doesn't fully comply with the PCI-e spec. > > Add code to relax the PCI-e detection in both the root port > and the Linux kernel allowing on board devices to be detected. > > Signed-off-by: Darren Stevens <Darren@stevens-zone.net> > > --- > > Changes made: > > v2: Replaced sb600_bus with a define, moved iob_mapbase into > sb600_set_flag() > Created some register/Flag names (as I don't have the docs > for the PA6T-1682M)
Darren Stevens <darren@stevens-zone.net> writes: > Michael, > > Any comments on these? Hi Darren, I guess in general we'd like more of this to come from the device tree. But I'll merge this series as-is, because I don't think it helps anyone to have this code out-of-tree. We can always clean things up further in future if anyone has the time & motivation. cheers > On 19/08/2018, Darren Stevens wrote: >> The A-Eon Amigaone X1000's Nemo motherboard has an AMD SB600 >> connected to one of the PCI-e root ports on its PaSemi >> Pwrficient 1628M SoC. Normally the SB600 southbridge would be >> connected to a hidden PCI-e port on the system's northbridge, >> and as a result doesn't fully comply with the PCI-e spec. >> >> Add code to relax the PCI-e detection in both the root port >> and the Linux kernel allowing on board devices to be detected. >> >> Signed-off-by: Darren Stevens <Darren@stevens-zone.net> >> >> --- >> >> Changes made: >> >> v2: Replaced sb600_bus with a define, moved iob_mapbase into >> sb600_set_flag() >> Created some register/Flag names (as I don't have the docs >> for the PA6T-1682M)
diff --git a/arch/powerpc/platforms/pasemi/pci.c b/arch/powerpc/platforms/pasemi/pci.c index c3c6417..116c0fe 100644 --- a/arch/powerpc/platforms/pasemi/pci.c +++ b/arch/powerpc/platforms/pasemi/pci.c @@ -108,6 +108,61 @@ static int workaround_5945(struct pci_bus *bus, unsigned int devfn, return 1; } +#ifdef CONFIG_PPC_PASEMI_NEMO +#define PXP_ERR_CFG_REG 0x4 +#define PXP_IGNORE_PCIE_ERRORS 0x800 +#define SB600_BUS 5 + +static void sb600_set_flag(int bus) +{ + static void __iomem *iob_mapbase = NULL; + struct resource res; + struct device_node *dn; + int err; + + if (iob_mapbase == NULL) { + dn = of_find_compatible_node(NULL, "isa", "pasemi,1682m-iob"); + if (!dn) { + pr_crit("NEMO SB600 missing iob node\n"); + return; + } + + err = of_address_to_resource(dn, 0, &res); + of_node_put(dn); + + if (err) { + pr_crit("NEMO SB600 missing resource\n"); + return; + } + + pr_info("NEMO SB600 IOB base %08llx\n",res.start); + + iob_mapbase = ioremap(res.start + 0x100, 0x94); + } + + if (iob_mapbase != NULL) { + if (bus == SB600_BUS) { + /* + * This is the SB600's bus, tell the PCI-e root port + * to allow non-zero devices to enumerate. + */ + out_le32(iob_mapbase + PXP_ERR_CFG_REG, in_le32(iob_mapbase + PXP_ERR_CFG_REG) | PXP_IGNORE_PCIE_ERRORS); + } else { + /* + * Only scan device 0 on other busses + */ + out_le32(iob_mapbase + PXP_ERR_CFG_REG, in_le32(iob_mapbase + PXP_ERR_CFG_REG) & ~PXP_IGNORE_PCIE_ERRORS); + } + } +} + +#else + +static void sb600_set_flag(int bus) +{ +} +#endif + static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 *val) {
The A-Eon Amigaone X1000's Nemo motherboard has an AMD SB600 connected to one of the PCI-e root ports on its PaSemi Pwrficient 1628M SoC. Normally the SB600 southbridge would be connected to a hidden PCI-e port on the system's northbridge, and as a result doesn't fully comply with the PCI-e spec. Add code to relax the PCI-e detection in both the root port and the Linux kernel allowing on board devices to be detected. Signed-off-by: Darren Stevens <Darren@stevens-zone.net> --- Changes made: v2: Replaced sb600_bus with a define, moved iob_mapbase into sb600_set_flag() Created some register/Flag names (as I don't have the docs for the PA6T-1682M)