Message ID | 1538066739-13095-4-git-send-email-brijesh.singh@amd.com |
---|---|
State | New |
Headers | show |
Series | x86_iommu/amd: add interrupt remap support | expand |
On Thu, Sep 27, 2018 at 04:45:55PM +0000, Singh, Brijesh wrote: > Currently, the amdvi_validate_dte() assumes that a valid DTE will > always have V=1. This is not true. The V=1 means that bit[127:1] are > valid. A valid DTE can have IV=1 and V=0 (i.e address translation > disabled and interrupt remapping enabled) > > Remove the V=1 check from amdvi_validate_dte(), make the caller > responsible to check for V or IV bits. > > Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> > Cc: Peter Xu <peterx@redhat.com> > Cc: "Michael S. Tsirkin" <mst@redhat.com> > Cc: Paolo Bonzini <pbonzini@redhat.com> > Cc: Richard Henderson <rth@twiddle.net> > Cc: Eduardo Habkost <ehabkost@redhat.com> > Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> > Cc: Tom Lendacky <Thomas.Lendacky@amd.com> > Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Maybe also mentioning: This also fixes a bug in existing code that when error is detected during the translation we'll fail the translation instead of assuming a passthrough mode. Not sure whether this can be done by maintainer. Anyways: Reviewed-by: Peter Xu <peterx@redhat.com>
On 9/28/18 12:46 AM, Peter Xu wrote: > On Thu, Sep 27, 2018 at 04:45:55PM +0000, Singh, Brijesh wrote: >> Currently, the amdvi_validate_dte() assumes that a valid DTE will >> always have V=1. This is not true. The V=1 means that bit[127:1] are >> valid. A valid DTE can have IV=1 and V=0 (i.e address translation >> disabled and interrupt remapping enabled) >> >> Remove the V=1 check from amdvi_validate_dte(), make the caller >> responsible to check for V or IV bits. >> >> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> >> Cc: Peter Xu <peterx@redhat.com> >> Cc: "Michael S. Tsirkin" <mst@redhat.com> >> Cc: Paolo Bonzini <pbonzini@redhat.com> >> Cc: Richard Henderson <rth@twiddle.net> >> Cc: Eduardo Habkost <ehabkost@redhat.com> >> Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> >> Cc: Tom Lendacky <Thomas.Lendacky@amd.com> >> Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> > Maybe also mentioning: > > This also fixes a bug in existing code that when error is > detected during the translation we'll fail the translation > instead of assuming a passthrough mode. > > Not sure whether this can be done by maintainer. Anyways: Based on your other feedback I will do v5 today hence I will take care of adding the comment in the commit message.
diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 1fd669f..7206bb0 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -807,7 +807,7 @@ static inline uint64_t amdvi_get_perms(uint64_t entry) AMDVI_DEV_PERM_SHIFT; } -/* a valid entry should have V = 1 and reserved bits honoured */ +/* validate that reserved bits are honoured */ static bool amdvi_validate_dte(AMDVIState *s, uint16_t devid, uint64_t *dte) { @@ -820,7 +820,7 @@ static bool amdvi_validate_dte(AMDVIState *s, uint16_t devid, return false; } - return dte[0] & AMDVI_DEV_VALID; + return true; } /* get a device table entry given the devid */ @@ -966,8 +966,12 @@ static void amdvi_do_translate(AMDVIAddressSpace *as, hwaddr addr, return; } - /* devices with V = 0 are not translated */ if (!amdvi_get_dte(s, devid, entry)) { + return; + } + + /* devices with V = 0 are not translated */ + if (!(entry[0] & AMDVI_DEV_VALID)) { goto out; }
Currently, the amdvi_validate_dte() assumes that a valid DTE will always have V=1. This is not true. The V=1 means that bit[127:1] are valid. A valid DTE can have IV=1 and V=0 (i.e address translation disabled and interrupt remapping enabled) Remove the V=1 check from amdvi_validate_dte(), make the caller responsible to check for V or IV bits. Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Cc: Peter Xu <peterx@redhat.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Cc: Tom Lendacky <Thomas.Lendacky@amd.com> Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> --- hw/i386/amd_iommu.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-)