@@ -1611,6 +1611,21 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
}
break;
+ case INDEX_op_deposit_i32:
+ {
+ unsigned len = args[3] & 31;
+ unsigned lsb_ofs = (args[3] >> 8) & 31;
+ unsigned msb_ofs = 31 - lsb_ofs;
+
+ tcg_out32 (s, RLWIMI
+ | RA(args[0])
+ | RS(args[2])
+ | SH((32 - msb_ofs - len) & 31)
+ | MB(msb_ofs)
+ | ME((msb_ofs + len - 1) & 31));
+ }
+ break;
+
case INDEX_op_add2_i32:
if (args[0] == args[3] || args[0] == args[5]) {
tcg_out32 (s, ADDC | TAB (0, args[2], args[4]));
@@ -1829,9 +1844,9 @@ static const TCGTargetOpDef ppc_op_defs[] = {
{ INDEX_op_shl_i32, { "r", "r", "ri" } },
{ INDEX_op_shr_i32, { "r", "r", "ri" } },
{ INDEX_op_sar_i32, { "r", "r", "ri" } },
-
{ INDEX_op_rotl_i32, { "r", "r", "ri" } },
{ INDEX_op_rotr_i32, { "r", "r", "ri" } },
+ { INDEX_op_deposit_i32, { "r", "0", "r" } },
{ INDEX_op_brcond_i32, { "r", "ri" } },
@@ -92,6 +92,7 @@ enum {
#define TCG_TARGET_HAS_eqv_i32
#define TCG_TARGET_HAS_nand_i32
#define TCG_TARGET_HAS_nor_i32
+#define TCG_TARGET_HAS_deposit_i32
#define TCG_AREG0 TCG_REG_R27
Signed-off-by: Richard Henderson <rth@twiddle.net> --- tcg/ppc/tcg-target.c | 17 ++++++++++++++++- tcg/ppc/tcg-target.h | 1 + 2 files changed, 17 insertions(+), 1 deletions(-)