| Message ID | 1500867555-36277-1-git-send-email-qiang.zhao@nxp.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Delegated to: | Scott Wood |
| Headers | show |
Zhao Qiang <qiang.zhao@nxp.com> writes: > Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> > --- > Changes for v2: > - include all Errata QE_General4 in #ifdef > > drivers/soc/fsl/qe/qe.c | 2 ++ > 1 file changed, 2 insertions(+) AFAICS this driver can only be built on PPC, what am I missing? config QUICC_ENGINE bool "Freescale QUICC Engine (QE) Support" depends on FSL_SOC && PPC32 cheers
Fri 7/28/2017 2:14 PM, Michael Ellerman <mpe@ellerman.id.au> wrote: > -----Original Message----- > From: Michael Ellerman [mailto:mpe@ellerman.id.au] > Sent: Friday, July 28, 2017 2:14 PM > To: Qiang Zhao <qiang.zhao@nxp.com>; oss@buserror.net > Cc: valentin.longchamp@keymile.com; linuxppc-dev@lists.ozlabs.org; linux- > kernel@vger.kernel.org; Qiang Zhao <qiang.zhao@nxp.com> > Subject: Re: [PATCH v2] qe: fix compile issue for arm64 > > Zhao Qiang <qiang.zhao@nxp.com> writes: > > > Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> > > --- > > Changes for v2: > > - include all Errata QE_General4 in #ifdef > > > > drivers/soc/fsl/qe/qe.c | 2 ++ > > 1 file changed, 2 insertions(+) > > AFAICS this driver can only be built on PPC, what am I missing? > > config QUICC_ENGINE > bool "Freescale QUICC Engine (QE) Support" > depends on FSL_SOC && PPC32 > > cheers I sent another patchset to support it on arm64. Thank you! Best Regards Qiang Zhao
Qiang Zhao <qiang.zhao@nxp.com> writes: > Fri 7/28/2017 2:14 PM, Michael Ellerman <mpe@ellerman.id.au> wrote: > >> -----Original Message----- >> From: Michael Ellerman [mailto:mpe@ellerman.id.au] >> Sent: Friday, July 28, 2017 2:14 PM >> To: Qiang Zhao <qiang.zhao@nxp.com>; oss@buserror.net >> Cc: valentin.longchamp@keymile.com; linuxppc-dev@lists.ozlabs.org; linux- >> kernel@vger.kernel.org; Qiang Zhao <qiang.zhao@nxp.com> >> Subject: Re: [PATCH v2] qe: fix compile issue for arm64 >> >> Zhao Qiang <qiang.zhao@nxp.com> writes: >> >> > Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> >> > --- >> > Changes for v2: >> > - include all Errata QE_General4 in #ifdef >> > >> > drivers/soc/fsl/qe/qe.c | 2 ++ >> > 1 file changed, 2 insertions(+) >> >> AFAICS this driver can only be built on PPC, what am I missing? >> >> config QUICC_ENGINE >> bool "Freescale QUICC Engine (QE) Support" >> depends on FSL_SOC && PPC32 >> >> cheers > > I sent another patchset to support it on arm64. Where? I don't see it. Shouldn't this patch be part of that series? Otherwise when that series is merged the build will break on arm64. cheers
diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c index 2ef6fc6..4ac9ce8 100644 --- a/drivers/soc/fsl/qe/qe.c +++ b/drivers/soc/fsl/qe/qe.c @@ -229,9 +229,11 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier) /* Errata QE_General4, which affects some MPC832x and MPC836x SOCs, says that the BRG divisor must be even if you're not using divide-by-16 mode. */ +#ifdef CONFIG_PPC if (pvr_version_is(PVR_VER_836x) || pvr_version_is(PVR_VER_832x)) if (!div16 && (divisor & 1) && (divisor > 3)) divisor++; +#endif tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) | QE_BRGC_ENABLE | div16;
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> --- Changes for v2: - include all Errata QE_General4 in #ifdef drivers/soc/fsl/qe/qe.c | 2 ++ 1 file changed, 2 insertions(+)