| Message ID | 1480435656-28497-1-git-send-email-clg@kaod.org |
|---|---|
| State | New |
| Headers | show |
This is a duplicate resend. Our SMTP server had an issue and the message finaly went through ... On 11/29/2016 05:07 PM, Cédric Le Goater wrote: > The clock frequency is defined in the HW STRAP1 register of the SCU > device. > > Signed-off-by: Cédric Le Goater <clg@kaod.org> > Reviewed-by: Joel Stanley <joel@jms.id.au> > --- > hw/misc/aspeed_scu.c | 12 ++++++++++++ > include/hw/misc/aspeed_scu.h | 1 + > 2 files changed, 13 insertions(+) > > diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c > index 95022d3607ad..351b8f79aca0 100644 > --- a/hw/misc/aspeed_scu.c > +++ b/hw/misc/aspeed_scu.c > @@ -268,6 +268,18 @@ bool is_supported_silicon_rev(uint32_t silicon_rev) > return false; > } > > +#define ASPEED_PLL_25MHZ 25000000 > +#define ASPEED_PLL_24MHZ 24000000 > +#define ASPEED_PLL_12MHZ 12000000 > + > +uint32_t aspeed_scu_get_clk(AspeedSCUState *scu) > +{ > + if (scu->hw_strap1 & AST2400_CLK_25M_IN) > + return ASPEED_PLL_25MHZ; > + else > + return ASPEED_PLL_24MHZ; > +} > + > static void aspeed_scu_realize(DeviceState *dev, Error **errp) > { > SysBusDevice *sbd = SYS_BUS_DEVICE(dev); > diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h > index bd4ac013f997..067f9f01819d 100644 > --- a/include/hw/misc/aspeed_scu.h > +++ b/include/hw/misc/aspeed_scu.h > @@ -37,6 +37,7 @@ typedef struct AspeedSCUState { > #define AST2500_A1_SILICON_REV 0x04010303U > > extern bool is_supported_silicon_rev(uint32_t silicon_rev); > +extern uint32_t aspeed_scu_get_clk(AspeedSCUState *scu); > > /* > * Extracted from Aspeed SDK v00.03.21. Fixes and extra definitions >
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index 95022d3607ad..351b8f79aca0 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -268,6 +268,18 @@ bool is_supported_silicon_rev(uint32_t silicon_rev) return false; } +#define ASPEED_PLL_25MHZ 25000000 +#define ASPEED_PLL_24MHZ 24000000 +#define ASPEED_PLL_12MHZ 12000000 + +uint32_t aspeed_scu_get_clk(AspeedSCUState *scu) +{ + if (scu->hw_strap1 & AST2400_CLK_25M_IN) + return ASPEED_PLL_25MHZ; + else + return ASPEED_PLL_24MHZ; +} + static void aspeed_scu_realize(DeviceState *dev, Error **errp) { SysBusDevice *sbd = SYS_BUS_DEVICE(dev); diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h index bd4ac013f997..067f9f01819d 100644 --- a/include/hw/misc/aspeed_scu.h +++ b/include/hw/misc/aspeed_scu.h @@ -37,6 +37,7 @@ typedef struct AspeedSCUState { #define AST2500_A1_SILICON_REV 0x04010303U extern bool is_supported_silicon_rev(uint32_t silicon_rev); +extern uint32_t aspeed_scu_get_clk(AspeedSCUState *scu); /* * Extracted from Aspeed SDK v00.03.21. Fixes and extra definitions