Message ID | 484bd17c3f3.74dd55e@auth.smtp.1and1.co.uk (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
Hi All, I tried to revert this commit but unfortunately I doesn't work: git revert d6a9996e84ac4beb7713e9485f4563e100a9b03e error: could not revert d6a9996... powerpc/mm: vmalloc abstraction in preparation for radix hint: after resolving the conflicts, mark the corrected paths hint: with 'git add <paths>' or 'git rm <paths>' hint: and commit the result with 'git commit' Any hints? Thanks, Christian On 08 June 2016 at 1:33 PM, Darren Stevens wrote: > Hello Christian > > That's not where I ended up with my bisect, this commit is about 10 before the > one I found to be bad, which is: > > commit d6a9996e84ac4beb7713e9485f4563e100a9b03e > Author: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> > Date: Fri Apr 29 23:26:21 2016 +1000 > > powerpc/mm: vmalloc abstraction in preparation for radix > > The vmalloc range differs between hash and radix config. Hence make > VMALLOC_START and related constants a variable which will be runtime > initialized depending on whether hash or radix mode is active. > > Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> > [mpe: Fix missing init of ioremap_bot in pgtable_64.c for ppc64e] > Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> > > Not sure how we are getting different results though. I have attached my > bisect log and the suspect commit, whcih is quite large. I'm not sure which > part of it is at fault. I have some jobs to do now, but hope to get tesing > this later today. > > Regards > Darren
On Wed, 2016-06-08 at 12:33 +0100, Darren Stevens wrote: > On 07/06/2016, Christian Zigotzky wrote: > > > > 764041e0f43cc7846f6d8eb246d65b53cc06c764 is the first bad commit > > commit 764041e0f43cc7846f6d8eb246d65b53cc06c764 > > Author: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> > > Date: Fri Apr 29 23:26:09 2016 +1000 > > > > powerpc/mm/radix: Add checks in slice code to catch radix usage > > > > That's not where I ended up with my bisect, this commit is about 10 before the > one I found to be bad, which is: > > commit d6a9996e84ac4beb7713e9485f4563e100a9b03e > Author: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> > Date: Fri Apr 29 23:26:21 2016 +1000 > > powerpc/mm: vmalloc abstraction in preparation for radix > > The vmalloc range differs between hash and radix config. Hence make > VMALLOC_START and related constants a variable which will be runtime > initialized depending on whether hash or radix mode is active. > > Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> > [mpe: Fix missing init of ioremap_bot in pgtable_64.c for ppc64e] > Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> > > Not sure how we are getting different results though. I have attached my > bisect log and the suspect commit, whcih is quite large. I'm not sure which > part of it is at fault. I have some jobs to do now, but hope to get tesing > this later today. That one is more likely to be the problem, though I don't see anything glaringly wrong with it. Does your patch use any of the constants that are changed in that file? They now aren't constants, they're initialised at boot, so if you use them too early you'll get junk. cheers
Darren Stevens <darren@stevens-zone.net> writes: > Hello Christian > That's not where I ended up with my bisect, this commit is about 10 before the > one I found to be bad, which is: > > commit d6a9996e84ac4beb7713e9485f4563e100a9b03e > Author: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> > Date: Fri Apr 29 23:26:21 2016 +1000 > > powerpc/mm: vmalloc abstraction in preparation for radix > > The vmalloc range differs between hash and radix config. Hence make > VMALLOC_START and related constants a variable which will be runtime > initialized depending on whether hash or radix mode is active. > > Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> > [mpe: Fix missing init of ioremap_bot in pgtable_64.c for ppc64e] > Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> > Can you check the value of ISA_IO_BASE where you are using it. If you are calling it early, you will find wrong value in that. With the latest kernel it is a variable and is initialized in hash__early_init_mmu(); -aneesh
Hi Aneesh, We use it only in the file "pci-common.c". Part of the Nemo patch with ISA_IO_BASE: diff -rupN linux-4.7/arch/powerpc/kernel/pci-common.c linux-4.7-nemo/arch/powerpc/kernel/pci-common.c --- linux-4.7/arch/powerpc/kernel/pci-common.c 2016-05-20 10:23:06.588299920 +0200 +++ linux-4.7-nemo/arch/powerpc/kernel/pci-common.c 2016-05-20 10:21:28.652296699 +0200 @@ -723,6 +723,19 @@ void pci_process_bridge_OF_ranges(struct isa_io_base = (unsigned long)hose->io_base_virt; #endif /* CONFIG_PPC32 */ + + +#ifdef CONFIG_PPC_PASEMI_SB600 + /* Workaround for lack of device tree. New for kernel 3.17: range.cpu_addr instead of cpu_addr and range.size instead of size Ch. Zigotzky */ + if (primary) { + __ioremap_at(range.cpu_addr, (void *)ISA_IO_BASE, + range.size, pgprot_val(pgprot_noncached(__pgprot(0)))); + hose->io_base_virt = (void *)_IO_BASE; + /* _IO_BASE needs unsigned long long for the kernel 3.17 Ch. Zigotzky */ + printk("Initialised io_base_virt 0x%lx _IO_BASE 0x%llx\n", (unsigned long)hose->io_base_virt, (unsigned long long)_IO_BASE); + } +#endif + Cheers, Christian On 08 June 2016 at 5:11 PM, Aneesh Kumar K.V wrote: > > Can you check the value of ISA_IO_BASE where you are > using it. If you are calling it early, you will find wrong value in > that. With the latest kernel it is a variable and is initialized in > hash__early_init_mmu(); > > -aneesh > >
Shall I modify the workaround? Is the workaround for lack of the device tree the problem? FYI: The SB600 doesn't follow normal PCIe address decoding rules, as in its original use as an AMD south bridge it was designed to appear as if it were integrated into the north bridge. What shall I do? I don't know how long I can revert the PowerPC updates. - Christian On 08 June 2016 at 5:47 PM, Christian Zigotzky wrote: > Hi Aneesh, > > We use it only in the file "pci-common.c". > > Part of the Nemo patch with ISA_IO_BASE: > > diff -rupN linux-4.7/arch/powerpc/kernel/pci-common.c > linux-4.7-nemo/arch/powerpc/kernel/pci-common.c > --- linux-4.7/arch/powerpc/kernel/pci-common.c 2016-05-20 > 10:23:06.588299920 +0200 > +++ linux-4.7-nemo/arch/powerpc/kernel/pci-common.c 2016-05-20 > 10:21:28.652296699 +0200 > @@ -723,6 +723,19 @@ void pci_process_bridge_OF_ranges(struct > isa_io_base = > (unsigned long)hose->io_base_virt; > #endif /* CONFIG_PPC32 */ > + > + > +#ifdef CONFIG_PPC_PASEMI_SB600 > + /* Workaround for lack of device tree. New for > kernel 3.17: range.cpu_addr instead of cpu_addr and range.size instead > of size Ch. Zigotzky */ > + if (primary) { > + __ioremap_at(range.cpu_addr, (void > *)ISA_IO_BASE, > + range.size, > pgprot_val(pgprot_noncached(__pgprot(0)))); > + hose->io_base_virt = (void *)_IO_BASE; > + /* _IO_BASE needs unsigned long long for the kernel > 3.17 Ch. Zigotzky */ > + printk("Initialised io_base_virt 0x%lx > _IO_BASE 0x%llx\n", (unsigned long)hose->io_base_virt, (unsigned long > long)_IO_BASE); > + } > +#endif > + > > Cheers, > > Christian > > On 08 June 2016 at 5:11 PM, Aneesh Kumar K.V wrote: >> >> Can you check the value of ISA_IO_BASE where you are >> using it. If you are calling it early, you will find wrong value in >> that. With the latest kernel it is a variable and is initialized in >> hash__early_init_mmu(); >> >> -aneesh >> >> >
diff --git a/arch/powerpc/include/asm/book3s/64/hash.h b/arch/powerpc/include/asm/book3s/64/hash.h index cd3e915..f61cad3 100644 --- a/arch/powerpc/include/asm/book3s/64/hash.h +++ b/arch/powerpc/include/asm/book3s/64/hash.h @@ -45,17 +45,17 @@ /* * Define the address range of the kernel non-linear virtual area */ -#define KERN_VIRT_START ASM_CONST(0xD000000000000000) -#define KERN_VIRT_SIZE ASM_CONST(0x0000100000000000) +#define H_KERN_VIRT_START ASM_CONST(0xD000000000000000) +#define H_KERN_VIRT_SIZE ASM_CONST(0x0000100000000000) /* * The vmalloc space starts at the beginning of that region, and * occupies half of it on hash CPUs and a quarter of it on Book3E * (we keep a quarter for the virtual memmap) */ -#define VMALLOC_START KERN_VIRT_START -#define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1) -#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE) +#define H_VMALLOC_START H_KERN_VIRT_START +#define H_VMALLOC_SIZE (H_KERN_VIRT_SIZE >> 1) +#define H_VMALLOC_END (H_VMALLOC_START + H_VMALLOC_SIZE) /* * Region IDs @@ -64,7 +64,7 @@ #define REGION_MASK (0xfUL << REGION_SHIFT) #define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT) -#define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START)) +#define VMALLOC_REGION_ID (REGION_ID(H_VMALLOC_START)) #define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET)) #define VMEMMAP_REGION_ID (0xfUL) /* Server only */ #define USER_REGION_ID (0UL) @@ -73,7 +73,7 @@ * Defines the address of the vmemap area, in its own region on * hash table CPUs. */ -#define VMEMMAP_BASE (VMEMMAP_REGION_ID << REGION_SHIFT) +#define H_VMEMMAP_BASE (VMEMMAP_REGION_ID << REGION_SHIFT) #ifdef CONFIG_PPC_MM_SLICES #define HAVE_ARCH_UNMAPPED_AREA diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h b/arch/powerpc/include/asm/book3s/64/pgtable.h index 32a9756..f5628f9 100644 --- a/arch/powerpc/include/asm/book3s/64/pgtable.h +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h @@ -208,6 +208,18 @@ extern unsigned long __pgd_val_bits; #define PUD_MASKED_BITS 0xc0000000000000ffUL /* Bits to mask out from a PGD to get to the PUD page */ #define PGD_MASKED_BITS 0xc0000000000000ffUL + +extern unsigned long __vmalloc_start; +extern unsigned long __vmalloc_end; +#define VMALLOC_START __vmalloc_start +#define VMALLOC_END __vmalloc_end + +extern unsigned long __kernel_virt_start; +extern unsigned long __kernel_virt_size; +#define KERN_VIRT_START __kernel_virt_start +#define KERN_VIRT_SIZE __kernel_virt_size +extern struct page *vmemmap; +extern unsigned long ioremap_bot; #endif /* __ASSEMBLY__ */ #include <asm/book3s/64/hash.h> @@ -220,7 +232,6 @@ extern unsigned long __pgd_val_bits; #endif #include <asm/barrier.h> - /* * The second half of the kernel virtual space is used for IO mappings, * it's itself carved into the PIO region (ISA and PHB IO space) and @@ -239,8 +250,6 @@ extern unsigned long __pgd_val_bits; #define IOREMAP_BASE (PHB_IO_END) #define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE) -#define vmemmap ((struct page *)VMEMMAP_BASE) - /* Advertise special mapping type for AGP */ #define HAVE_PAGE_AGP diff --git a/arch/powerpc/include/asm/book3s/64/radix.h b/arch/powerpc/include/asm/book3s/64/radix.h index 63eb629..f470902 100644 --- a/arch/powerpc/include/asm/book3s/64/radix.h +++ b/arch/powerpc/include/asm/book3s/64/radix.h @@ -31,6 +31,74 @@ RADIX_PUD_INDEX_SIZE + RADIX_PGD_INDEX_SIZE + PAGE_SHIFT) #define RADIX_PGTABLE_RANGE (ASM_CONST(1) << RADIX_PGTABLE_EADDR_SIZE) +/* + * We support 52 bit address space, Use top bit for kernel + * virtual mapping. Also make sure kernel fit in the top + * quadrant. + * + * +------------------+ + * +------------------+ Kernel virtual map (0xc008000000000000) + * | | + * | | + * | | + * 0b11......+------------------+ Kernel linear map (0xc....) + * | | + * | 2 quadrant | + * | | + * 0b10......+------------------+ + * | | + * | 1 quadrant | + * | | + * 0b01......+------------------+ + * | | + * | 0 quadrant | + * | | + * 0b00......+------------------+ + * + * + * 3rd quadrant expanded: + * +------------------------------+ + * | | + * | | + * | | + * +------------------------------+ Kernel IO map end (0xc010000000000000) + * | | + * | | + * | 1/2 of virtual map | + * | | + * | | + * +------------------------------+ Kernel IO map start + * | | + * | 1/4 of virtual map | + * | | + * +------------------------------+ Kernel vmemap start + * | | + * | 1/4 of virtual map | + * | | + * +------------------------------+ Kernel virt start (0xc008000000000000) + * | | + * | | + * | | + * +------------------------------+ Kernel linear (0xc.....) + */ + +#define RADIX_KERN_VIRT_START ASM_CONST(0xc008000000000000) +#define RADIX_KERN_VIRT_SIZE ASM_CONST(0x0008000000000000) + +/* + * The vmalloc space starts at the beginning of that region, and + * occupies a quarter of it on radix config. + * (we keep a quarter for the virtual memmap) + */ +#define RADIX_VMALLOC_START RADIX_KERN_VIRT_START +#define RADIX_VMALLOC_SIZE (RADIX_KERN_VIRT_SIZE >> 2) +#define RADIX_VMALLOC_END (RADIX_VMALLOC_START + RADIX_VMALLOC_SIZE) +/* + * Defines the address of the vmemap area, in its own region on + * hash table CPUs. + */ +#define RADIX_VMEMMAP_BASE (RADIX_VMALLOC_END) + #ifndef __ASSEMBLY__ #define RADIX_PTE_TABLE_SIZE (sizeof(pte_t) << RADIX_PTE_INDEX_SIZE) #define RADIX_PMD_TABLE_SIZE (sizeof(pmd_t) << RADIX_PMD_INDEX_SIZE) diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c index 41503d7..3759df5 100644 --- a/arch/powerpc/kernel/pci_64.c +++ b/arch/powerpc/kernel/pci_64.c @@ -38,7 +38,7 @@ * ISA drivers use hard coded offsets. If no ISA bus exists nothing * is mapped on the first 64K of IO space */ -unsigned long pci_io_base = ISA_IO_BASE; +unsigned long pci_io_base; EXPORT_SYMBOL(pci_io_base); static int __init pcibios_init(void) @@ -47,6 +47,7 @@ static int __init pcibios_init(void) printk(KERN_INFO "PCI: Probing PCI hardware\n"); + pci_io_base = ISA_IO_BASE; /* For now, override phys_mem_access_prot. If we need it,g * later, we may move that initialization to each ppc_md */ diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index 64165a7..68aee43 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c @@ -889,6 +889,14 @@ void __init hash__early_init_mmu(void) __pmd_val_bits = 0; __pud_val_bits = 0; __pgd_val_bits = 0; + + __kernel_virt_start = H_KERN_VIRT_START; + __kernel_virt_size = H_KERN_VIRT_SIZE; + __vmalloc_start = H_VMALLOC_START; + __vmalloc_end = H_VMALLOC_END; + vmemmap = (struct page *)H_VMEMMAP_BASE; + ioremap_bot = IOREMAP_BASE; + /* Initialize the MMU Hash table and create the linear mapping * of memory. Has to be done before SLB initialization as this is * currently where the page size encoding is obtained. diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c index 6182b6c..13afacd 100644 --- a/arch/powerpc/mm/pgtable-radix.c +++ b/arch/powerpc/mm/pgtable-radix.c @@ -328,6 +328,13 @@ void __init radix__early_init_mmu(void) __pud_val_bits = RADIX_PUD_VAL_BITS; __pgd_val_bits = RADIX_PGD_VAL_BITS; + __kernel_virt_start = RADIX_KERN_VIRT_START; + __kernel_virt_size = RADIX_KERN_VIRT_SIZE; + __vmalloc_start = RADIX_VMALLOC_START; + __vmalloc_end = RADIX_VMALLOC_END; + vmemmap = (struct page *)RADIX_VMEMMAP_BASE; + ioremap_bot = IOREMAP_BASE; + radix_init_page_sizes(); if (!firmware_has_feature(FW_FEATURE_LPAR)) radix_init_partition_table(); diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c index b8c75e6..216e2bd 100644 --- a/arch/powerpc/mm/pgtable_64.c +++ b/arch/powerpc/mm/pgtable_64.c @@ -97,9 +97,20 @@ unsigned long __pud_val_bits; EXPORT_SYMBOL(__pud_val_bits); unsigned long __pgd_val_bits; EXPORT_SYMBOL(__pgd_val_bits); - -#endif +unsigned long __kernel_virt_start; +EXPORT_SYMBOL(__kernel_virt_start); +unsigned long __kernel_virt_size; +EXPORT_SYMBOL(__kernel_virt_size); +unsigned long __vmalloc_start; +EXPORT_SYMBOL(__vmalloc_start); +unsigned long __vmalloc_end; +EXPORT_SYMBOL(__vmalloc_end); +struct page *vmemmap; +EXPORT_SYMBOL(vmemmap); +unsigned long ioremap_bot; +#else /* !CONFIG_PPC_BOOK3S_64 */ unsigned long ioremap_bot = IOREMAP_BASE; +#endif /** * __ioremap_at - Low level function to establish the page tables diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S index 15b8f71..dfdb90c 100644 --- a/arch/powerpc/mm/slb_low.S +++ b/arch/powerpc/mm/slb_low.S @@ -91,7 +91,7 @@ slb_miss_kernel_load_vmemmap: * can be demoted from 64K -> 4K dynamically on some machines */ clrldi r11,r10,48 - cmpldi r11,(VMALLOC_SIZE >> 28) - 1 + cmpldi r11,(H_VMALLOC_SIZE >> 28) - 1 bgt 5f lhz r11,PACAVMALLOCSLLP(r13) b 6f