Message ID | 1457486494-11377-1-git-send-email-qiang.zhao@nxp.com (mailing list archive) |
---|---|
State | Superseded, archived |
Delegated to: | Scott Wood |
Headers | show |
On Wed, Mar 09, 2016 at 09:21:28AM +0800, Zhao Qiang wrote: > Add IC, SI and SIRAM document of QE to > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt > > Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> > Acked-by: Rob Herring <robh@kernel.org> > --- > changes for v2 > - Add interrupt-controller in Required properties > - delete address-cells and size-cells for qe-si and qe-siram > Changes for v3 > - Add SoC specific caompatible strings to qe-si and qe-siram > Changes for v4 > - NA > Changes for v5 > - NA > > .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt | 50 ++++++++++++++++++++++ > 1 file changed, 50 insertions(+) > > diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt > index 4f89302..7ab21cb 100644 > --- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt > +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt > @@ -69,6 +69,56 @@ Example: > }; > }; > > +* Interrupt Controller (IC) > + > +Required properties: > +- compatible : should be "fsl,qe-ic". > +- reg : Address range of IC register set. > +- interrupts : interrupts generated by the device. > +- interrupt-controller : this device is a interrupt controller. > + > +Example: > + > + qeic: interrupt-controller@80 { > + interrupt-controller; > + compatible = "fsl,qe-ic"; > + #address-cells = <0>; > + #interrupt-cells = <1>; > + reg = <0x80 0x80>; > + interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78 > + }; Why is the information about which interrupt is "high" and which is "low" in a comment in the example, rather than in the definition of the interrupts property? > +* Serial Interface Block (SI) > + > +The SI manages the routing of eight TDM lines to the QE block serial drivers > +, the MCC and the UCCs, for receive and transmit. > + > +Required properties: > +- compatible : should be "fsl,t1040-qe-si". > +- reg : Address range of SI register set. Is t1040 the only chip that has or will ever have this? -Scott
On Tue, May 17, 2016 at 07:22AM, Scott Wood wrote: > -----Original Message----- > From: Scott Wood [mailto:oss@buserror.net] > Sent: Tuesday, May 17, 2016 7:22 AM > To: Qiang Zhao <qiang.zhao@nxp.com> > Cc: robh+dt@kernel.org; devicetree@vger.kernel.org; linux- > kernel@vger.kernel.org; Xiaobo Xie <xiaobo.xie@nxp.com>; Yang-Leo Li > <leoyang.li@nxp.com>; linuxppc-dev@lists.ozlabs.org > Subject: Re: [v5,1/7] QE: Add IC, SI and SIRAM document to device tree > bindings. > > On Wed, Mar 09, 2016 at 09:21:28AM +0800, Zhao Qiang wrote: > > Add IC, SI and SIRAM document of QE to > > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt > > > > Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> > > Acked-by: Rob Herring <robh@kernel.org> > > --- > > changes for v2 > > - Add interrupt-controller in Required properties > > - delete address-cells and size-cells for qe-si and qe-siram Changes > > for v3 > > - Add SoC specific caompatible strings to qe-si and qe-siram Changes > > for v4 > > - NA > > Changes for v5 > > - NA > > > > .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt | 50 > > ++++++++++++++++++++++ > > 1 file changed, 50 insertions(+) > > +* Serial Interface Block (SI) > > + > > +The SI manages the routing of eight TDM lines to the QE block serial > > +drivers , the MCC and the UCCs, for receive and transmit. > > + > > +Required properties: > > +- compatible : should be "fsl,t1040-qe-si". > > +- reg : Address range of SI register set. > > Is t1040 the only chip that has or will ever have this? There also be t1024 and ls1043 supporting si. I thought to add them when adding their device node. If you think it is better to add them now, I will modify. -Zhao Qiang
On Tue, 2016-05-17 at 01:18 +0000, Qiang Zhao wrote: > On Tue, May 17, 2016 at 07:22AM, Scott Wood wrote: > > -----Original Message----- > > From: Scott Wood [mailto:oss@buserror.net] > > Sent: Tuesday, May 17, 2016 7:22 AM > > To: Qiang Zhao <qiang.zhao@nxp.com> > > Cc: robh+dt@kernel.org; devicetree@vger.kernel.org; linux- > > kernel@vger.kernel.org; Xiaobo Xie <xiaobo.xie@nxp.com>; Yang-Leo Li > > <leoyang.li@nxp.com>; linuxppc-dev@lists.ozlabs.org > > Subject: Re: [v5,1/7] QE: Add IC, SI and SIRAM document to device tree > > bindings. > > > > On Wed, Mar 09, 2016 at 09:21:28AM +0800, Zhao Qiang wrote: > > > Add IC, SI and SIRAM document of QE to > > > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt > > > > > > Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> > > > Acked-by: Rob Herring <robh@kernel.org> > > > --- > > > changes for v2 > > > - Add interrupt-controller in Required properties > > > - delete address-cells and size-cells for qe-si and qe-siram Changes > > > for v3 > > > - Add SoC specific caompatible strings to qe-si and qe-siram Changes > > > for v4 > > > - NA > > > Changes for v5 > > > - NA > > > > > > .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt | 50 > > > ++++++++++++++++++++++ > > > 1 file changed, 50 insertions(+) > > > +* Serial Interface Block (SI) > > > + > > > +The SI manages the routing of eight TDM lines to the QE block serial > > > +drivers , the MCC and the UCCs, for receive and transmit. > > > + > > > +Required properties: > > > +- compatible : should be "fsl,t1040-qe-si". > > > +- reg : Address range of SI register set. > > > > Is t1040 the only chip that has or will ever have this? > > There also be t1024 and ls1043 supporting si. > I thought to add them when adding their device node. > If you think it is better to add them now, I will modify. The binding is saying that the compatible "should" be "fsl,t1040-qe-si" regardless of whether it's actually a t1040. Instead say that compatible must include "fsl,<chip>-qe-si" and give t1040 as an example. If you intend "fsl,t1040-qe-si" to be something that other compatible chips list, in addition to their own <chip> compatibles, then also say that explicitly. -Scott
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt index 4f89302..7ab21cb 100644 --- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt @@ -69,6 +69,56 @@ Example: }; }; +* Interrupt Controller (IC) + +Required properties: +- compatible : should be "fsl,qe-ic". +- reg : Address range of IC register set. +- interrupts : interrupts generated by the device. +- interrupt-controller : this device is a interrupt controller. + +Example: + + qeic: interrupt-controller@80 { + interrupt-controller; + compatible = "fsl,qe-ic"; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x80 0x80>; + interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78 + }; + +* Serial Interface Block (SI) + +The SI manages the routing of eight TDM lines to the QE block serial drivers +, the MCC and the UCCs, for receive and transmit. + +Required properties: +- compatible : should be "fsl,t1040-qe-si". +- reg : Address range of SI register set. + +Example: + + si1: si@700 { + compatible = "fsl,t1040-qe-si"; + reg = <0x700 0x80>; + }; + +* Serial Interface Block RAM(SIRAM) + +store the routing entries of SI + +Required properties: +- compatible : should be "fsl,t1040-qe-siram". +- reg : Address range of SI RAM. + +Example: + + siram1: siram@1000 { + compatible = "fsl,t1040-qe-siram"; + reg = <0x1000 0x800>; + }; + * QE Firmware Node This node defines a firmware binary that is embedded in the device tree, for