Message ID | ea588b3cb5418d4cfbfa7c479d9c6f9a62d8eb4a.1270682952.git.rth@twiddle.net |
---|---|
State | New |
Headers | show |
On Fri, Mar 12, 2010 at 03:58:08PM +0100, Richard Henderson wrote: Thanks, applied. > --- > cpu-exec.c | 38 +++++++++++++++++++++++++++++++------- > 1 files changed, 31 insertions(+), 7 deletions(-) > > diff --git a/cpu-exec.c b/cpu-exec.c > index 372aeac..0f84857 100644 > --- a/cpu-exec.c > +++ b/cpu-exec.c > @@ -1197,15 +1197,39 @@ int cpu_signal_handler(int host_signum, void *pinfo, > { > struct siginfo *info = pinfo; > struct ucontext *uc = puc; > - unsigned long pc; > - int is_write; > + unsigned long pc = uc->uc_mcontext.sc_iaoq[0]; > + uint32_t insn = *(uint32_t *)pc; > + int is_write = 0; > + > + /* XXX: need kernel patch to get write flag faster. */ > + switch (insn >> 26) { > + case 0x1a: /* STW */ > + case 0x19: /* STH */ > + case 0x18: /* STB */ > + case 0x1b: /* STWM */ > + is_write = 1; > + break; > + > + case 0x09: /* CSTWX, FSTWX, FSTWS */ > + case 0x0b: /* CSTDX, FSTDX, FSTDS */ > + /* Distinguish from coprocessor load ... */ > + is_write = (insn >> 9) & 1; > + break; > + > + case 0x03: > + switch ((insn >> 6) & 15) { > + case 0xa: /* STWS */ > + case 0x9: /* STHS */ > + case 0x8: /* STBS */ > + case 0xe: /* STWAS */ > + case 0xc: /* STBYS */ > + is_write = 1; > + } > + break; > + } > > - pc = uc->uc_mcontext.sc_iaoq[0]; > - /* FIXME: compute is_write */ > - is_write = 0; > return handle_cpu_signal(pc, (unsigned long)info->si_addr, > - is_write, > - &uc->uc_sigmask, puc); > + is_write, &uc->uc_sigmask, puc); > } > > #else > -- > 1.6.2.5 > > > >
diff --git a/cpu-exec.c b/cpu-exec.c index 372aeac..0f84857 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -1197,15 +1197,39 @@ int cpu_signal_handler(int host_signum, void *pinfo, { struct siginfo *info = pinfo; struct ucontext *uc = puc; - unsigned long pc; - int is_write; + unsigned long pc = uc->uc_mcontext.sc_iaoq[0]; + uint32_t insn = *(uint32_t *)pc; + int is_write = 0; + + /* XXX: need kernel patch to get write flag faster. */ + switch (insn >> 26) { + case 0x1a: /* STW */ + case 0x19: /* STH */ + case 0x18: /* STB */ + case 0x1b: /* STWM */ + is_write = 1; + break; + + case 0x09: /* CSTWX, FSTWX, FSTWS */ + case 0x0b: /* CSTDX, FSTDX, FSTDS */ + /* Distinguish from coprocessor load ... */ + is_write = (insn >> 9) & 1; + break; + + case 0x03: + switch ((insn >> 6) & 15) { + case 0xa: /* STWS */ + case 0x9: /* STHS */ + case 0x8: /* STBS */ + case 0xe: /* STWAS */ + case 0xc: /* STBYS */ + is_write = 1; + } + break; + } - pc = uc->uc_mcontext.sc_iaoq[0]; - /* FIXME: compute is_write */ - is_write = 0; return handle_cpu_signal(pc, (unsigned long)info->si_addr, - is_write, - &uc->uc_sigmask, puc); + is_write, &uc->uc_sigmask, puc); } #else