diff mbox

[for-2.5,16/30] m68k: Add all access modes and data sizes to some 680x0 instructions

Message ID 1439151229-27747-17-git-send-email-laurent@vivier.eu
State New
Headers show

Commit Message

Laurent Vivier Aug. 9, 2015, 8:13 p.m. UTC 
The following instruction can use all access modes and data sizes:

add, sub, neg, not, and, or, eor, ori, andi, subi, addi, eori, cmpi, swap

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
 target-m68k/translate.c | 123 ++++++++++++++++++++++++++++++------------------
 1 file changed, 76 insertions(+), 47 deletions(-)

Comments

Richard Henderson Aug. 12, 2015, 4:25 p.m. UTC | #1 
On 08/09/2015 01:13 PM, Laurent Vivier wrote:
>      case 6: /* cmpi */
>          tcg_gen_mov_i32(dest, src1);
>          tcg_gen_subi_i32(dest, dest, im);
>          gen_update_cc_add(dest, tcg_const_i32(im));
> -        set_cc_op(s, CC_OP_SUB);
> +        SET_CC_OP(opsize, SUB);
>          break;
>      default:
>          abort();
>      }
> -    if (op != 6) {
> -        DEST_EA(env, insn, OS_LONG, dest, &addr);
> -    }
> +    DEST_EA(env, insn, opsize, dest, &addr);

It appears you've lost the if that doesn't write back the result of compare.
Did you intend to change the case 6 break to a return?


r~
Richard Henderson Aug. 12, 2015, 4:27 p.m. UTC | #2 
On 08/09/2015 01:13 PM, Laurent Vivier wrote:
> -        SRC_EA(env, tmp, OS_LONG, 0, &addr);
> +        SRC_EA(env, tmp, opsize, -1, &addr);

Oh, I'm also wondering why you changed all of the inputs from unsigned to
signed.  It appears to be unrelated to updating the modes, and unnecessary.

I'm all for reducing churn and doing both at once, so long as you say why.  But
at present it looks like a mistake.


r~
diff mbox

Patch

diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index d3a3695..6a426e1 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -1110,31 +1110,33 @@  DISAS_INSN(addsub)
     TCGv tmp;
     TCGv addr;
     int add;
+    int opsize;
 
     add = (insn & 0x4000) != 0;
+    opsize = insn_opsize(insn, 6);
     reg = DREG(insn, 9);
     dest = tcg_temp_new();
     if (insn & 0x100) {
-        SRC_EA(env, tmp, OS_LONG, 0, &addr);
+        SRC_EA(env, tmp, opsize, -1, &addr);
         src = reg;
     } else {
         tmp = reg;
-        SRC_EA(env, src, OS_LONG, 0, NULL);
+        SRC_EA(env, src, opsize, -1, NULL);
     }
     if (add) {
         tcg_gen_add_i32(dest, tmp, src);
-        SET_X_FLAG(OS_LONG, dest, src);
-        set_cc_op(s, CC_OP_ADD);
+        SET_X_FLAG(opsize, dest, src);
+        SET_CC_OP(opsize, ADD);
     } else {
-        SET_X_FLAG(OS_LONG, tmp, src);
+        SET_X_FLAG(opsize, tmp, src);
         tcg_gen_sub_i32(dest, tmp, src);
-        set_cc_op(s, CC_OP_SUB);
+        SET_CC_OP(opsize, SUB);
     }
     gen_update_cc_add(dest, src);
     if (insn & 0x100) {
-        DEST_EA(env, insn, OS_LONG, dest, &addr);
+        DEST_EA(env, insn, opsize, dest, &addr);
     } else {
-        tcg_gen_mov_i32(reg, dest);
+        gen_partset_reg(opsize, reg, dest);
     }
 }
 
@@ -1348,50 +1350,62 @@  DISAS_INSN(arith_im)
     TCGv src1;
     TCGv dest;
     TCGv addr;
+    int opsize;
 
     op = (insn >> 9) & 7;
-    SRC_EA(env, src1, OS_LONG, 0, (op == 6) ? NULL : &addr);
-    im = read_im32(env, s);
+    opsize = insn_opsize(insn, 6);
+    switch (opsize) {
+    case OS_BYTE:
+        im = read_im8(env, s);
+        break;
+    case OS_WORD:
+        im = read_im16(env, s);
+        break;
+    case OS_LONG:
+        im = read_im32(env, s);
+        break;
+    default:
+       abort();
+    }
+    SRC_EA(env, src1, opsize, -1, (op == 6) ? NULL : &addr);
     dest = tcg_temp_new();
     switch (op) {
     case 0: /* ori */
         tcg_gen_ori_i32(dest, src1, im);
-        gen_logic_cc(s, dest, OS_LONG);
+        gen_logic_cc(s, dest, opsize);
         break;
     case 1: /* andi */
         tcg_gen_andi_i32(dest, src1, im);
-        gen_logic_cc(s, dest, OS_LONG);
+        gen_logic_cc(s, dest, opsize);
         break;
     case 2: /* subi */
         tcg_gen_mov_i32(dest, src1);
-        SET_X_FLAG(OS_LONG, dest, tcg_const_i32(im));
+        SET_X_FLAG(opsize, dest, tcg_const_i32(im));
         tcg_gen_subi_i32(dest, dest, im);
         gen_update_cc_add(dest, tcg_const_i32(im));
-        set_cc_op(s, CC_OP_SUB);
+        SET_CC_OP(opsize, SUB);
         break;
     case 3: /* addi */
         tcg_gen_mov_i32(dest, src1);
         tcg_gen_addi_i32(dest, dest, im);
         gen_update_cc_add(dest, tcg_const_i32(im));
-        SET_X_FLAG(OS_LONG, dest, tcg_const_i32(im));
-        set_cc_op(s, CC_OP_ADD);
+        SET_X_FLAG(opsize, dest, tcg_const_i32(im));
+        SET_CC_OP(opsize, ADD);
         break;
     case 5: /* eori */
         tcg_gen_xori_i32(dest, src1, im);
-        gen_logic_cc(s, dest, OS_LONG);
+        gen_logic_cc(s, dest, opsize);
         break;
     case 6: /* cmpi */
         tcg_gen_mov_i32(dest, src1);
         tcg_gen_subi_i32(dest, dest, im);
         gen_update_cc_add(dest, tcg_const_i32(im));
-        set_cc_op(s, CC_OP_SUB);
+        SET_CC_OP(opsize, SUB);
         break;
     default:
         abort();
     }
-    if (op != 6) {
-        DEST_EA(env, insn, OS_LONG, dest, &addr);
-    }
+    DEST_EA(env, insn, opsize, dest, &addr);
 }
 
 DISAS_INSN(byterev)
@@ -1497,17 +1511,19 @@  DISAS_INSN(move_from_ccr)
 
 DISAS_INSN(neg)
 {
-    TCGv reg;
     TCGv src1;
+    TCGv dest;
+    TCGv addr;
+    int opsize;
 
-    reg = DREG(insn, 0);
-    src1 = tcg_temp_new();
-    tcg_gen_mov_i32(src1, reg);
-    tcg_gen_neg_i32(reg, src1);
-    set_cc_op(s, CC_OP_SUB);
-    gen_update_cc_add(reg, src1);
-    SET_X_FLAG(OS_LONG, tcg_const_i32(0), src1);
-    set_cc_op(s, CC_OP_SUB);
+    opsize = insn_opsize(insn, 6);
+    SRC_EA(env, src1, opsize, -1, &addr);
+    dest = tcg_temp_new();
+    tcg_gen_neg_i32(dest, src1);
+    SET_CC_OP(opsize, SUB);
+    gen_update_cc_add(dest, src1);
+    SET_X_FLAG(opsize, tcg_const_i32(0), dest);
+    DEST_EA(env, insn, opsize, dest, &addr);
 }
 
 static void gen_set_sr_im(DisasContext *s, uint16_t val, int ccr_only)
@@ -1548,11 +1564,17 @@  DISAS_INSN(move_to_ccr)
 
 DISAS_INSN(not)
 {
-    TCGv reg;
+    TCGv src1;
+    TCGv dest;
+    TCGv addr;
+    int opsize;
 
-    reg = DREG(insn, 0);
-    tcg_gen_not_i32(reg, reg);
-    gen_logic_cc(s, reg, OS_LONG);
+    opsize = insn_opsize(insn, 6);
+    SRC_EA(env, src1, opsize, -1, &addr);
+    dest = tcg_temp_new();
+    tcg_gen_not_i32(dest, src1);
+    DEST_EA(env, insn, opsize, dest, &addr);
+    gen_logic_cc(s, dest, opsize);
 }
 
 DISAS_INSN(swap)
@@ -1842,19 +1864,21 @@  DISAS_INSN(or)
     TCGv dest;
     TCGv src;
     TCGv addr;
+    int opsize;
 
+    opsize = insn_opsize(insn, 6);
     reg = DREG(insn, 9);
     dest = tcg_temp_new();
     if (insn & 0x100) {
-        SRC_EA(env, src, OS_LONG, 0, &addr);
+        SRC_EA(env, src, opsize, -1, &addr);
         tcg_gen_or_i32(dest, src, reg);
-        DEST_EA(env, insn, OS_LONG, dest, &addr);
+        DEST_EA(env, insn, opsize, dest, &addr);
     } else {
-        SRC_EA(env, src, OS_LONG, 0, NULL);
+        SRC_EA(env, src, opsize, -1, NULL);
         tcg_gen_or_i32(dest, src, reg);
-        tcg_gen_mov_i32(reg, dest);
+        gen_partset_reg(opsize, reg, dest);
     }
-    gen_logic_cc(s, dest, OS_LONG);
+    gen_logic_cc(s, dest, opsize);
 }
 
 DISAS_INSN(suba)
@@ -1933,13 +1957,16 @@  DISAS_INSN(eor)
     TCGv reg;
     TCGv dest;
     TCGv addr;
+    int opsize;
 
-    SRC_EA(env, src, OS_LONG, 0, &addr);
+    opsize = insn_opsize(insn, 6);
+
+    SRC_EA(env, src, opsize, -1, &addr);
     reg = DREG(insn, 9);
     dest = tcg_temp_new();
     tcg_gen_xor_i32(dest, src, reg);
-    gen_logic_cc(s, dest, OS_LONG);
-    DEST_EA(env, insn, OS_LONG, dest, &addr);
+    gen_logic_cc(s, dest, opsize);
+    DEST_EA(env, insn, opsize, dest, &addr);
 }
 
 DISAS_INSN(and)
@@ -1948,19 +1975,21 @@  DISAS_INSN(and)
     TCGv reg;
     TCGv dest;
     TCGv addr;
+    int opsize;
 
+    opsize = insn_opsize(insn, 6);
     reg = DREG(insn, 9);
     dest = tcg_temp_new();
     if (insn & 0x100) {
-        SRC_EA(env, src, OS_LONG, 0, &addr);
+        SRC_EA(env, src, opsize, -1, &addr);
         tcg_gen_and_i32(dest, src, reg);
-        DEST_EA(env, insn, OS_LONG, dest, &addr);
+        DEST_EA(env, insn, opsize, dest, &addr);
     } else {
-        SRC_EA(env, src, OS_LONG, 0, NULL);
+        SRC_EA(env, src, opsize, -1, NULL);
         tcg_gen_and_i32(dest, src, reg);
-        tcg_gen_mov_i32(reg, dest);
+        gen_partset_reg(opsize, reg, dest);
     }
-    gen_logic_cc(s, dest, OS_LONG);
+    gen_logic_cc(s, dest, opsize);
 }
 
 DISAS_INSN(adda)