| Message ID | 1437623745-21259-1-git-send-email-chenhui.zhao@freescale.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Scott Wood |
| Headers | show |
On Thu, Jul 23, 2015 at 11:55:45AM +0800, chenhui zhao wrote: > Core reset may cause issue if using the proxy mode of MPIC. > Use the mixed mode of MPIC if enabling CPU hotplug. > > Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> > --- > arch/powerpc/platforms/85xx/corenet_generic.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c > index bd839dc..0119224 100644 > --- a/arch/powerpc/platforms/85xx/corenet_generic.c > +++ b/arch/powerpc/platforms/85xx/corenet_generic.c > @@ -212,7 +212,15 @@ define_machine(corenet_generic) { > .pcibios_fixup_bus = fsl_pcibios_fixup_bus, > .pcibios_fixup_phb = fsl_pcibios_fixup_phb, > #endif > +/* > + * Core reset may cause issue if using the proxy mode of MPIC. > + * So, use the mixed mode of MPIC if enabling CPU hotplug. > + */ > +#ifdef CONFIG_HOTPLUG_CPU > + .get_irq = mpic_get_irq, > +#else > .get_irq = mpic_get_coreint_irq, > +#endif Between this and kexec needing the same thing, I'm wondering if we should just drop support for coreint. Do you have any benchmarks for the performance impact of this patch? Is there an erratum for the hardware problem? -Scott
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c index bd839dc..0119224 100644 --- a/arch/powerpc/platforms/85xx/corenet_generic.c +++ b/arch/powerpc/platforms/85xx/corenet_generic.c @@ -212,7 +212,15 @@ define_machine(corenet_generic) { .pcibios_fixup_bus = fsl_pcibios_fixup_bus, .pcibios_fixup_phb = fsl_pcibios_fixup_phb, #endif +/* + * Core reset may cause issue if using the proxy mode of MPIC. + * So, use the mixed mode of MPIC if enabling CPU hotplug. + */ +#ifdef CONFIG_HOTPLUG_CPU + .get_irq = mpic_get_irq, +#else .get_irq = mpic_get_coreint_irq, +#endif .restart = fsl_rstcr_restart, .calibrate_decr = generic_calibrate_decr, .progress = udbg_progress,
Core reset may cause issue if using the proxy mode of MPIC. Use the mixed mode of MPIC if enabling CPU hotplug. Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com> --- arch/powerpc/platforms/85xx/corenet_generic.c | 8 ++++++++ 1 file changed, 8 insertions(+)