From patchwork Thu Mar 21 04:32:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangbo Lu X-Patchwork-Id: 1059780 X-Patchwork-Delegate: van.freenix@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="f7qd3JnD"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44Pv6S4X03z9sRC for ; Thu, 21 Mar 2019 15:33:04 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 55AB6C22062; Thu, 21 Mar 2019 04:32:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=SPF_HELO_PASS, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 82A31C2204F; Thu, 21 Mar 2019 04:32:36 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 6EB6BC2205F; Thu, 21 Mar 2019 04:32:33 +0000 (UTC) Received: from EUR01-HE1-obe.outbound.protection.outlook.com (mail-eopbgr130058.outbound.protection.outlook.com [40.107.13.58]) by lists.denx.de (Postfix) with ESMTPS id 04121C22033 for ; Thu, 21 Mar 2019 04:32:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=TfSGuiedHvhBXY5d6Cjq0VAWcHdzWRFqjY5RNdBhmto=; b=f7qd3JnD06I+wofX+fFW19PjSaSZO3hulwAAKi4EaMCmFmu7SDBX/vCmv3kZQfMKW1XSCK/cWqoJjNL21K3nST3+HpgPVvD6TeV3Ib990ZWjVKKgYOWOyjq25szXYtledOsEd7oaglrJtD2TTLRlk7wRLyyr32GR9OybGbdbrSQ= Received: from VI1PR0401MB2237.eurprd04.prod.outlook.com (10.169.133.18) by VI1PR0401MB2592.eurprd04.prod.outlook.com (10.168.65.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1709.16; Thu, 21 Mar 2019 04:32:25 +0000 Received: from VI1PR0401MB2237.eurprd04.prod.outlook.com ([fe80::c118:ba51:b223:4b33]) by VI1PR0401MB2237.eurprd04.prod.outlook.com ([fe80::c118:ba51:b223:4b33%2]) with mapi id 15.20.1730.013; Thu, 21 Mar 2019 04:32:25 +0000 From: "Y.b. Lu" To: "u-boot@lists.denx.de" Thread-Topic: [v2, 1/5] Move CONFIG_FSL_ESDHC to defconfig Thread-Index: AQHU358VnMqDp/tni0WFPOiYIE9onA== Date: Thu, 21 Mar 2019 04:32:25 +0000 Message-ID: <20190321043404.1833-2-yangbo.lu@nxp.com> References: <20190321043404.1833-1-yangbo.lu@nxp.com> In-Reply-To: <20190321043404.1833-1-yangbo.lu@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0P153CA0010.APCP153.PROD.OUTLOOK.COM (2603:1096:203:18::22) To VI1PR0401MB2237.eurprd04.prod.outlook.com (2603:10a6:800:28::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yangbo.lu@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 11e0b59c-d43a-4487-1c33-08d6adb637a6 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(4618075)(2017052603328)(7153060)(7193020); SRVR:VI1PR0401MB2592; x-ms-traffictypediagnostic: VI1PR0401MB2592: x-microsoft-antispam-prvs: x-forefront-prvs: 0983EAD6B2 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(136003)(39860400002)(346002)(396003)(366004)(376002)(199004)(189003)(4326008)(6116002)(6512007)(53936002)(105586002)(5640700003)(52116002)(305945005)(2351001)(99286004)(71200400001)(1076003)(256004)(71190400001)(106356001)(486006)(5660300002)(66066001)(81156014)(8676002)(81166006)(476003)(50226002)(478600001)(446003)(25786009)(316002)(86362001)(14454004)(6486002)(186003)(26005)(102836004)(6916009)(6506007)(76176011)(386003)(2616005)(11346002)(2906002)(97736004)(3846002)(7736002)(68736007)(8936002)(54906003)(2501003)(6436002)(36756003); DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR0401MB2592; H:VI1PR0401MB2237.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: +XTCvLstdj6s0IWOvtWAq7tE5NWXzZeHOGiKUz1gyo7pHl0hlIuOIubYm4PWMe2tuFVgvQTwkrqvrA7mG3U2mmNwY/zanvU8A5p7zOx8xyQew+3IeYGVeil6NdRDPPH1VNW6yME68jxZrKurZtwlFw22aWqhhgHUtDiXCfBGDoJGRGr5Vq54c+scckMHpGMkVcvnypPHIQKsfbBzEYygWXl0bA9qwgjArcP7c8v+jOEDLEr5jfJgXBroutQG8fvWx3XKSDy5G+x9XHN7gk/TDCOqQjFwnErNmuBywppzWuLs2Rj4udWe4HomVMtOUimUQ5vj02DRVNJ2XJT4uR2NIQUwgJcVtqE4PZbMEEoXbYL8jj1NPZUPsPyIsG1qoImxIcrrcFUYeZn5j8UpVXD9P6pOYKpAXPz04vht3OEVvT8= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 11e0b59c-d43a-4487-1c33-08d6adb637a6 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Mar 2019 04:32:25.6206 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0401MB2592 Subject: [U-Boot] [v2, 1/5] Move CONFIG_FSL_ESDHC to defconfig X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Moved CONFIG_FSL_ESDHC from header files to defconfig files. Signed-off-by: Yangbo Lu --- Changes for v2: - Rebased. --- configs/imx8mq_evk_defconfig | 1 + configs/imx8qxp_mek_defconfig | 1 + configs/kp_imx53_defconfig | 1 + configs/kp_imx6q_tpc_defconfig | 1 + configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_qspi_defconfig | 1 + configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1012afrwy_tfa_defconfig | 1 + include/configs/imx8mq_evk.h | 1 - include/configs/imx8qxp_mek.h | 1 - include/configs/kp_imx53.h | 1 - include/configs/kp_imx6q_tpc.h | 1 - include/configs/ls1012afrwy.h | 1 - 13 files changed, 8 insertions(+), 5 deletions(-) diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 46100b6719..9e2ff29a04 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -28,6 +28,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_ETH=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX8M=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index a94998b8b5..88da3ac784 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -51,6 +51,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ATHEROS=y diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig index cfe96fcce5..d00c8cde62 100644 --- a/configs/kp_imx53_defconfig +++ b/configs/kp_imx53_defconfig @@ -29,6 +29,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx53-kp" CONFIG_ENV_IS_IN_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_DEFAULT_BUS_NUMBER=0x1 CONFIG_PHYLIB=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index cb58ed6678..3f48463c0c 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not set CONFIG_ENV_IS_IN_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y CONFIG_FEC_MXC=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index d5034b7b26..9608141ab4 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index 6fa13b205e..8b88b6df83 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -32,6 +32,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index 02f5dedfa2..676c588938 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -31,6 +31,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 1da166e43a..92ea06951b 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -32,6 +32,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA_CEVA=y CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index a9e38a70e6..e15745018e 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -219,7 +219,6 @@ #define CONFIG_IMX_BOOTAUX #define CONFIG_CMD_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 312e30dc6c..c262736d8b 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -49,7 +49,6 @@ #undef CONFIG_CMD_CRC32 #undef CONFIG_BOOTM_NETBSD -#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h index 080eec47ca..d0be94bdb9 100644 --- a/include/configs/kp_imx53.h +++ b/include/configs/kp_imx53.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) /* MMC Configs */ -#define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_ESDHC_NUM 1 diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index b6b27ee1d5..dec83bdfce 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -44,7 +44,6 @@ #define CONFIG_SYS_I2C_SPEED 100000 /* MMC Configs */ -#define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 2 diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index ebb1df41c7..2ee94d68fd 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -41,7 +41,6 @@ /* MMC */ #ifdef CONFIG_MMC -#define CONFIG_FSL_ESDHC #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 #endif From patchwork Thu Mar 21 04:32:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangbo Lu X-Patchwork-Id: 1059782 X-Patchwork-Delegate: van.freenix@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; 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Lu" To: "u-boot@lists.denx.de" Thread-Topic: [v2, 2/5] mmc: split fsl_esdhc driver for i.MX Thread-Index: AQHU358XDUDF1UKDckaBpao/r3GxNQ== Date: Thu, 21 Mar 2019 04:32:28 +0000 Message-ID: <20190321043404.1833-3-yangbo.lu@nxp.com> References: <20190321043404.1833-1-yangbo.lu@nxp.com> In-Reply-To: <20190321043404.1833-1-yangbo.lu@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0P153CA0010.APCP153.PROD.OUTLOOK.COM (2603:1096:203:18::22) To VI1PR0401MB2237.eurprd04.prod.outlook.com (2603:10a6:800:28::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yangbo.lu@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 82cb4e3d-11db-4daf-eca9-08d6adb63968 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(4618075)(2017052603328)(7153060)(7193020); SRVR:VI1PR0401MB2592; x-ms-traffictypediagnostic: VI1PR0401MB2592: x-microsoft-antispam-prvs: x-forefront-prvs: 0983EAD6B2 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(136003)(39860400002)(346002)(396003)(366004)(376002)(199004)(189003)(4326008)(6116002)(6512007)(53936002)(105586002)(5640700003)(52116002)(305945005)(2351001)(99286004)(71200400001)(1076003)(256004)(71190400001)(106356001)(486006)(5660300002)(66066001)(81156014)(8676002)(81166006)(476003)(50226002)(478600001)(446003)(25786009)(316002)(86362001)(14454004)(6486002)(186003)(26005)(102836004)(6916009)(6506007)(76176011)(386003)(2616005)(11346002)(2906002)(97736004)(3846002)(7736002)(68736007)(8936002)(54906003)(2501003)(6436002)(36756003); DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR0401MB2592; H:VI1PR0401MB2237.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: cRtHN/K8Fn0XB78GbL02Nxqwz0zxSnHx+uZzBCCcj2MjJKTk2IZZ2js2QLvSaduy8cJXDFDHCItcpdTjjU6Z3uqBXORJ1I9VHuvFC1j3UnxAKgtjFF/+t7Cw7wFjgibsC3BmoiFosduMXbO91Ly6G0S/PdL2+gulJGC7QEwzZT6ov0jnQa7OigK7CeiNoGKbjbmvCfgOiki6Nuj4Mn3qxTMVvZbVUvC3kGf5/2BeLS1OEdU+4nXBS2xrK7FC6SWqNqiCwv+82OshYB/0R/ir+EGw1NS/4FYruVIl3Nc1PpevyIfdTxZn8mZZ5/SEt6e1rZq5wSoMc7eSHOEA56HUfh49XHI47gmXStWbwy7MzKt7H5cKSRcGiIvU2pFXDqa//DJAf24glx4rTa9fzYtaVhwfnLypJ8zqi5U8CheybgI= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 82cb4e3d-11db-4daf-eca9-08d6adb63968 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Mar 2019 04:32:28.1497 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0401MB2592 Subject: [U-Boot] [v2, 2/5] mmc: split fsl_esdhc driver for i.MX X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX initially. The later QoriQ series PowerPC processors (which were evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and i.MX series processors were using this driver for their eSDHCs too. For the two series processors, the eSDHCs are becoming more and more different. We should have split it into two drivers, like them (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel. This patch is just to create a fsl_esdhc_imx driver which is a copy of fsl_esdhc driver for i.MX processors. We will convert i.MX processors to use fsl_esdhc_imx, and clean up the two drivers separately in the future patches. Signed-off-by: Yangbo Lu --- Changes for v2: - None. --- drivers/mmc/Kconfig | 6 ++++++ drivers/mmc/Makefile | 1 + drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} | 5 +++-- include/{fsl_esdhc.h => fsl_esdhc_imx.h} | 11 ++++++----- 4 files changed, 16 insertions(+), 7 deletions(-) copy drivers/mmc/{fsl_esdhc.c => fsl_esdhc_imx.c} (99%) copy include/{fsl_esdhc.h => fsl_esdhc_imx.h} (97%) diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 04a4e7716f..09bc02fe9c 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -641,6 +641,12 @@ config FSL_ESDHC This selects support for the eSDHC (enhanced secure digital host controller) found on numerous Freescale/NXP SoCs. +config FSL_ESDHC_IMX + bool "Freescale/NXP i.MX eSDHC controller support" + help + This selects support for the i.MX eSDHC (enhanced secure digital host + controller) found on numerous Freescale/NXP SoCs. + endmenu config SYS_FSL_ERRATUM_ESDHC111 diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 7892c468f0..1287ad4cc1 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_MMC_DW_K3) += hi6220_dw_mmc.o obj-$(CONFIG_MMC_DW_ROCKCHIP) += rockchip_dw_mmc.o obj-$(CONFIG_MMC_DW_SOCFPGA) += socfpga_dw_mmc.o obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o +obj-$(CONFIG_FSL_ESDHC_IMX) += fsl_esdhc_imx.o obj-$(CONFIG_FTSDC010) += ftsdc010_mci.o obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o obj-$(CONFIG_MMC_MESON_GX) += meson_gx_mmc.o diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc_imx.c similarity index 99% copy from drivers/mmc/fsl_esdhc.c copy to drivers/mmc/fsl_esdhc_imx.c index 9e34557d16..a031c628ea 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -2,6 +2,7 @@ /* * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc * Andy Fleming + * Copyright 2019 NXP * * Based vaguely on the pxa mmc code: * (C) Copyright 2003 @@ -18,7 +19,7 @@ #include #include #include -#include +#include #include #include #include @@ -110,7 +111,7 @@ struct esdhc_soc_data { * @non_removable: 0: removable; 1: non-removable * @wp_enable: 1: enable checking wp; 0: no check * @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V - * @flags: ESDHC_FLAG_xx in include/fsl_esdhc.h + * @flags: ESDHC_FLAG_xx in include/fsl_esdhc_imx.h * @caps: controller capabilities * @tuning_step: tuning step setting in tuning_ctrl register * @start_tuning_tap: the start point for tuning in tuning_ctrl register diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc_imx.h similarity index 97% copy from include/fsl_esdhc.h copy to include/fsl_esdhc_imx.h index 8dbd5249a7..e05b24e7e8 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc_imx.h @@ -4,10 +4,11 @@ *------------------------------------------------------------------- * * Copyright 2007-2008,2010-2011 Freescale Semiconductor, Inc + * Copyright 2019 NXP */ -#ifndef __FSL_ESDHC_H__ -#define __FSL_ESDHC_H__ +#ifndef __FSL_ESDHC_IMX_H__ +#define __FSL_ESDHC_IMX_H__ #include #include @@ -258,15 +259,15 @@ struct fsl_esdhc_cfg { #error "Endianess is not defined: please fix to continue" #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int fsl_esdhc_mmc_init(bd_t *bis); int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg); void fdt_fixup_esdhc(void *blob, bd_t *bd); #else static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; } static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {} -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ void __noreturn mmc_boot(void); void mmc_spl_load_image(uint32_t offs, unsigned int size, void *vdst); -#endif /* __FSL_ESDHC_H__ */ +#endif /* __FSL_ESDHC_IMX_H__ */ From patchwork Thu Mar 21 04:32:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yangbo Lu X-Patchwork-Id: 1059952 X-Patchwork-Delegate: van.freenix@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; 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Lu" To: "u-boot@lists.denx.de" Thread-Topic: [v2, 3/5] Convert to use fsl_esdhc_imx for i.MX platforms Thread-Index: AQHU358YYWvrPHmDbEe8zGcoaK527Q== Date: Thu, 21 Mar 2019 04:32:31 +0000 Message-ID: <20190321043404.1833-4-yangbo.lu@nxp.com> References: <20190321043404.1833-1-yangbo.lu@nxp.com> In-Reply-To: <20190321043404.1833-1-yangbo.lu@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0P153CA0010.APCP153.PROD.OUTLOOK.COM (2603:1096:203:18::22) To VI1PR0401MB2237.eurprd04.prod.outlook.com (2603:10a6:800:28::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yangbo.lu@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 0328416b-a209-411a-aebc-08d6adb63aea x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(4618075)(2017052603328)(7153060)(7193020); SRVR:VI1PR0401MB2592; x-ms-traffictypediagnostic: VI1PR0401MB2592: x-microsoft-antispam-prvs: x-forefront-prvs: 0983EAD6B2 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(979002)(136003)(39860400002)(346002)(396003)(366004)(376002)(199004)(189003)(4326008)(6116002)(6512007)(53936002)(53946003)(105586002)(5640700003)(52116002)(305945005)(2351001)(99286004)(71200400001)(1076003)(14444005)(256004)(71190400001)(106356001)(486006)(5660300002)(66066001)(81156014)(8676002)(81166006)(476003)(50226002)(478600001)(446003)(25786009)(316002)(86362001)(14454004)(6486002)(186003)(26005)(102836004)(6916009)(6506007)(30864003)(76176011)(386003)(2616005)(11346002)(2906002)(97736004)(3846002)(7736002)(68736007)(8936002)(54906003)(2501003)(6436002)(36756003)(959014)(559001)(579004)(569006); DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR0401MB2592; H:VI1PR0401MB2237.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: qkXOJcTuewkS8lF5vmEgYvAvynLsq9AD6RnEf704+FO3jBOBnmebFPGmmhJT+HSaaltHwJBG1cahB/1LZViME1hIXGcgpoaC5uh82NlNuTxwkbetJRRKRcVX97hfZw7puPduKrpwBOws6kdhtVfnAzdWCQUnCDO0GZfyCJDSrk7DoE3+MdeqpXtut+mVZGBUzUXWWCEmQ26AkVsgzUcQLM9VVyMRHaaCSMIDfifs6RPx39xnU5s2TOYB1vKlMI+tNE4B4UximzqiXk60MnvDd/juKkq3GW9jsKrcAyXSw5s5DM3ld2H1JKopTHTmLM44WsQ0THAixnT02LPkimJZB9YN52FRKuGy+wQqFUYXer8r//m9k4cHdnB9RssOpDEx23iT0NUbT2dpnGou/Un97bI+RVMG0c86xxOApGks2Os= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0328416b-a209-411a-aebc-08d6adb63aea X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Mar 2019 04:32:31.2202 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0401MB2592 X-Mailman-Approved-At: Thu, 21 Mar 2019 10:10:12 +0000 Subject: [U-Boot] [v2, 3/5] Convert to use fsl_esdhc_imx for i.MX platforms X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Converted to use fsl_esdhc_imx for i.MX platforms. Signed-off-by: Yangbo Lu --- Changes for v2: - Rebased. --- arch/arm/cpu/arm1136/mx35/generic.c | 10 +++++----- arch/arm/cpu/arm926ejs/mx25/generic.c | 8 ++++---- arch/arm/cpu/armv7/vf610/generic.c | 10 +++++----- arch/arm/cpu/armv8/s32v234/generic.c | 2 +- arch/arm/include/asm/global_data.h | 2 +- arch/arm/mach-imx/cpu.c | 6 +++--- arch/arm/mach-imx/mx6/litesom.c | 4 ++-- arch/arm/mach-imx/mx7/clock.c | 4 ++-- arch/arm/mach-imx/mx7ulp/clock.c | 2 +- arch/arm/mach-imx/speed.c | 4 ++-- board/Arcturus/ucp1020/spl.c | 2 +- board/advantech/dms-ba16/dms-ba16.c | 4 ++-- board/aristainetos/aristainetos-v1.c | 2 +- board/aristainetos/aristainetos-v2.c | 2 +- board/aristainetos/aristainetos.c | 4 ++-- board/bachmann/ot1200/ot1200.c | 2 +- board/barco/platinum/platinum.c | 2 +- board/barco/titanium/titanium.c | 4 ++-- board/beckhoff/mx53cx9020/mx53cx9020.c | 4 ++-- board/boundary/nitrogen6x/nitrogen6x.c | 4 ++-- board/ccv/xpress/xpress.c | 2 +- board/compulab/cl-som-imx7/cl-som-imx7.c | 6 +++--- board/compulab/cl-som-imx7/common.c | 6 +++--- board/compulab/cl-som-imx7/common.h | 8 ++++---- board/compulab/cl-som-imx7/mux.c | 8 ++++---- board/compulab/cl-som-imx7/spl.c | 6 +++--- board/compulab/cm_fx6/cm_fx6.c | 4 ++-- board/compulab/cm_fx6/common.c | 4 ++-- board/compulab/cm_fx6/spl.c | 2 +- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 4 ++-- board/dhelectronics/dh_imx6/dh_imx6.c | 4 ++-- board/dhelectronics/dh_imx6/dh_imx6_spl.c | 2 +- board/el/el6x/el6x.c | 4 ++-- board/embest/mx6boards/mx6boards.c | 4 ++-- board/freescale/imx8mq_evk/imx8mq_evk.c | 2 +- board/freescale/imx8mq_evk/spl.c | 2 +- board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 +- board/freescale/m54418twr/m54418twr.c | 2 +- board/freescale/mx25pdk/mx25pdk.c | 6 +++--- board/freescale/mx35pdk/mx35pdk.c | 4 ++-- board/freescale/mx51evk/mx51evk.c | 6 +++--- board/freescale/mx53ard/mx53ard.c | 4 ++-- board/freescale/mx53evk/mx53evk.c | 4 ++-- board/freescale/mx53loco/mx53loco.c | 4 ++-- board/freescale/mx53smd/mx53smd.c | 4 ++-- board/freescale/mx6qarm2/mx6qarm2.c | 4 ++-- board/freescale/mx6sabreauto/mx6sabreauto.c | 4 ++-- board/freescale/mx6sabresd/mx6sabresd.c | 4 ++-- board/freescale/mx6slevk/mx6slevk.c | 2 +- board/freescale/mx6sxsabreauto/mx6sxsabreauto.c | 2 +- board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 +- board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 4 ++-- board/freescale/mx6ullevk/mx6ullevk.c | 2 +- board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +- board/freescale/s32v234evb/s32v234evb.c | 4 ++-- board/freescale/vf610twr/vf610twr.c | 4 ++-- board/gateworks/gw_ventana/common.c | 6 +++--- board/gateworks/gw_ventana/gw_ventana.c | 2 +- board/ge/bx50v3/bx50v3.c | 4 ++-- board/ge/mx53ppd/mx53ppd.c | 4 ++-- board/grinn/liteboard/board.c | 4 ++-- board/inversepath/usbarmory/usbarmory.c | 2 +- board/k+p/kp_imx53/kp_imx53.c | 4 ++-- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c | 4 ++-- board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c | 2 +- board/kosagi/novena/novena.c | 4 ++-- board/kosagi/novena/novena_spl.c | 6 +++--- board/liebherr/display5/common.c | 2 +- board/liebherr/display5/display5.c | 6 +++--- board/liebherr/display5/spl.c | 2 +- board/liebherr/mccmon6/mccmon6.c | 2 +- board/liebherr/mccmon6/spl.c | 2 +- board/logicpd/imx6/imx6logic.c | 4 ++-- board/menlo/m53menlo/m53menlo.c | 4 ++-- board/phytec/pcl063/pcl063.c | 2 +- board/phytec/pcl063/spl.c | 6 +++--- board/phytec/pcm052/pcm052.c | 2 +- board/phytec/pcm058/pcm058.c | 2 +- board/phytec/pfla02/pfla02.c | 2 +- board/samtec/vining_2000/vining_2000.c | 2 +- board/seco/common/mx6.c | 2 +- board/seco/mx6quq7/mx6quq7.c | 2 +- board/sks-kinkel/sksimx6/sksimx6.c | 2 +- board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +- board/sysam/stmark2/stmark2.c | 2 +- board/tbs/tbs2910/tbs2910.c | 6 +++--- board/technexion/pico-imx7d/pico-imx7d.c | 2 +- board/technologic/ts4800/ts4800.c | 6 +++--- board/toradex/apalis_imx6/apalis_imx6.c | 4 ++-- board/toradex/colibri-imx6ull/colibri-imx6ull.c | 6 +++--- board/toradex/colibri_imx6/colibri_imx6.c | 4 ++-- board/toradex/colibri_imx7/colibri_imx7.c | 2 +- board/toradex/colibri_vf/colibri_vf.c | 4 ++-- board/tqc/tqma6/tqma6.c | 2 +- board/tqc/tqma6/tqma6_mba6.c | 2 +- board/tqc/tqma6/tqma6_wru4.c | 2 +- board/udoo/neo/neo.c | 2 +- board/udoo/udoo.c | 2 +- board/udoo/udoo_spl.c | 2 +- board/wandboard/spl.c | 2 +- board/wandboard/wandboard.c | 2 +- board/warp/warp.c | 2 +- board/woodburn/woodburn.c | 4 ++-- configs/apalis_imx6_defconfig | 2 +- configs/apalis_imx6_nospl_com_defconfig | 2 +- configs/apalis_imx6_nospl_it_defconfig | 2 +- configs/aristainetos2_defconfig | 2 +- configs/aristainetos2b_defconfig | 2 +- configs/aristainetos_defconfig | 2 +- configs/bk4r1_defconfig | 2 +- configs/cgtqmx6eval_defconfig | 2 +- configs/cl-som-imx7_defconfig | 2 +- configs/cm_fx6_defconfig | 2 +- configs/colibri-imx6ull_defconfig | 2 +- configs/colibri_imx6_defconfig | 2 +- configs/colibri_imx6_nospl_defconfig | 2 +- configs/colibri_imx7_defconfig | 2 +- configs/colibri_imx7_emmc_defconfig | 2 +- configs/colibri_vf_defconfig | 2 +- configs/dh_imx6_defconfig | 2 +- configs/display5_defconfig | 2 +- configs/display5_factory_defconfig | 2 +- configs/dms-ba16-1g_defconfig | 2 +- configs/dms-ba16_defconfig | 2 +- configs/ge_bx50v3_defconfig | 2 +- configs/gwventana_emmc_defconfig | 2 +- configs/gwventana_gw5904_defconfig | 2 +- configs/gwventana_nand_defconfig | 2 +- configs/imx6dl_icore_nand_defconfig | 2 +- configs/imx6dl_mamoj_defconfig | 2 +- configs/imx6q_icore_nand_defconfig | 2 +- configs/imx6q_logic_defconfig | 2 +- configs/imx6qdl_icore_mipi_defconfig | 2 +- configs/imx6qdl_icore_mmc_defconfig | 2 +- configs/imx6qdl_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_rqs_defconfig | 2 +- configs/imx6ul_geam_mmc_defconfig | 2 +- configs/imx6ul_geam_nand_defconfig | 2 +- configs/imx6ul_isiot_emmc_defconfig | 2 +- configs/imx6ul_isiot_nand_defconfig | 2 +- configs/imx8mq_evk_defconfig | 2 +- configs/imx8qxp_mek_defconfig | 2 +- configs/kp_imx53_defconfig | 2 +- configs/kp_imx6q_tpc_defconfig | 2 +- configs/liteboard_defconfig | 2 +- configs/m53menlo_defconfig | 2 +- configs/marsboard_defconfig | 2 +- configs/mccmon6_nor_defconfig | 2 +- configs/mccmon6_sd_defconfig | 2 +- configs/mx25pdk_defconfig | 2 +- configs/mx35pdk_defconfig | 2 +- configs/mx51evk_defconfig | 2 +- configs/mx53ard_defconfig | 2 +- configs/mx53cx9020_defconfig | 2 +- configs/mx53evk_defconfig | 2 +- configs/mx53loco_defconfig | 2 +- configs/mx53ppd_defconfig | 2 +- configs/mx53smd_defconfig | 2 +- configs/mx6cuboxi_defconfig | 2 +- configs/mx6dlarm2_defconfig | 2 +- configs/mx6dlarm2_lpddr2_defconfig | 2 +- configs/mx6qarm2_defconfig | 2 +- configs/mx6qarm2_lpddr2_defconfig | 2 +- configs/mx6qsabrelite_defconfig | 2 +- configs/mx6sabreauto_defconfig | 2 +- configs/mx6sabresd_defconfig | 2 +- configs/mx6slevk_defconfig | 2 +- configs/mx6slevk_spinor_defconfig | 2 +- configs/mx6slevk_spl_defconfig | 2 +- configs/mx6sllevk_defconfig | 2 +- configs/mx6sllevk_plugin_defconfig | 2 +- configs/mx6sxsabreauto_defconfig | 2 +- configs/mx6sxsabresd_defconfig | 2 +- configs/mx6sxsabresd_spl_defconfig | 2 +- configs/mx6ul_14x14_evk_defconfig | 2 +- configs/mx6ul_9x9_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_defconfig | 2 +- configs/mx6ull_14x14_evk_plugin_defconfig | 2 +- configs/mx7dsabresd_defconfig | 2 +- configs/mx7dsabresd_qspi_defconfig | 2 +- configs/mx7ulp_evk_defconfig | 2 +- configs/mx7ulp_evk_plugin_defconfig | 2 +- configs/nitrogen6dl2g_defconfig | 2 +- configs/nitrogen6dl_defconfig | 2 +- configs/nitrogen6q2g_defconfig | 2 +- configs/nitrogen6q_defconfig | 2 +- configs/nitrogen6s1g_defconfig | 2 +- configs/nitrogen6s_defconfig | 2 +- configs/novena_defconfig | 2 +- configs/opos6uldev_defconfig | 2 +- configs/ot1200_defconfig | 2 +- configs/ot1200_spl_defconfig | 2 +- configs/pcm052_defconfig | 2 +- configs/pcm058_defconfig | 2 +- configs/pfla02_defconfig | 2 +- configs/phycore_pcl063_defconfig | 2 +- configs/pico-hobbit-imx6ul_defconfig | 2 +- configs/pico-hobbit-imx7d_defconfig | 2 +- configs/pico-imx6ul_defconfig | 2 +- configs/pico-imx7d_defconfig | 2 +- configs/pico-pi-imx6ul_defconfig | 2 +- configs/pico-pi-imx7d_defconfig | 2 +- configs/platinum_picon_defconfig | 2 +- configs/platinum_titanium_defconfig | 2 +- configs/riotboard_defconfig | 2 +- configs/riotboard_spl_defconfig | 2 +- configs/s32v234evb_defconfig | 2 +- configs/secomx6quq7_defconfig | 2 +- configs/sksimx6_defconfig | 2 +- configs/tbs2910_defconfig | 2 +- configs/titanium_defconfig | 2 +- configs/tqma6dl_mba6_mmc_defconfig | 2 +- configs/tqma6dl_mba6_spi_defconfig | 2 +- configs/tqma6q_mba6_mmc_defconfig | 2 +- configs/tqma6q_mba6_spi_defconfig | 2 +- configs/tqma6s_mba6_mmc_defconfig | 2 +- configs/tqma6s_mba6_spi_defconfig | 2 +- configs/tqma6s_wru4_mmc_defconfig | 2 +- configs/ts4800_defconfig | 2 +- configs/udoo_defconfig | 2 +- configs/udoo_neo_defconfig | 2 +- configs/usbarmory_defconfig | 2 +- configs/vf610twr_defconfig | 2 +- configs/vf610twr_nand_defconfig | 2 +- configs/vining_2000_defconfig | 2 +- configs/wandboard_defconfig | 2 +- configs/warp7_bl33_defconfig | 2 +- configs/warp7_defconfig | 2 +- configs/warp_defconfig | 2 +- configs/woodburn_defconfig | 2 +- configs/woodburn_sd_defconfig | 2 +- configs/xpress_defconfig | 2 +- configs/xpress_spl_defconfig | 2 +- configs/zc5202_defconfig | 2 +- configs/zc5601_defconfig | 2 +- 235 files changed, 315 insertions(+), 315 deletions(-) diff --git a/arch/arm/cpu/arm1136/mx35/generic.c b/arch/arm/cpu/arm1136/mx35/generic.c index cbc43644a9..a651b8c341 100644 --- a/arch/arm/cpu/arm1136/mx35/generic.c +++ b/arch/arm/cpu/arm1136/mx35/generic.c @@ -14,8 +14,8 @@ #include #include #include -#ifdef CONFIG_FSL_ESDHC -#include +#ifdef CONFIG_FSL_ESDHC_IMX +#include #endif #include #include @@ -27,7 +27,7 @@ #define CCM_GET_DIVIDER(x, m, o) (((x) & (m)) >> (o)) -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif @@ -446,7 +446,7 @@ int cpu_eth_init(bd_t *bis) return rc; } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /* * Initializes on-chip MMC controllers. * to override, implement board_mmc_init() @@ -459,7 +459,7 @@ int cpu_mmc_init(bd_t *bis) int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); #elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index 2795a5f22e..5fcf06ae1a 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -16,8 +16,8 @@ #include #include -#ifdef CONFIG_FSL_ESDHC -#include +#ifdef CONFIG_FSL_ESDHC_IMX +#include DECLARE_GLOBAL_DATA_PTR; #endif @@ -233,7 +233,7 @@ int cpu_eth_init(bd_t *bis) int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); #else @@ -243,7 +243,7 @@ int get_clocks(void) return 0; } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /* * Initializes on-chip MMC controllers. * to override, implement board_mmc_init() diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index cbd3391918..a1687bb597 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -10,11 +10,11 @@ #include #include #include -#ifdef CONFIG_FSL_ESDHC -#include +#ifdef CONFIG_FSL_ESDHC_IMX +#include #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif @@ -345,7 +345,7 @@ int cpu_eth_init(bd_t *bis) return rc; } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int cpu_mmc_init(bd_t *bis) { return fsl_esdhc_mmc_init(bis); @@ -354,7 +354,7 @@ int cpu_mmc_init(bd_t *bis) int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); #endif return 0; diff --git a/arch/arm/cpu/armv8/s32v234/generic.c b/arch/arm/cpu/armv8/s32v234/generic.c index 273b88e9d3..2c4ea36e07 100644 --- a/arch/arm/cpu/armv8/s32v234/generic.c +++ b/arch/arm/cpu/armv8/s32v234/generic.c @@ -342,7 +342,7 @@ int cpu_eth_init(bd_t * bis) int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX gd->arch.sdhc_clk = mxc_get_clock(MXC_USDHC_CLK); #endif return 0; diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index c3ee5f0c7b..26690524a8 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -9,7 +9,7 @@ /* Architecture-specific global data */ struct arch_global_data { -#if defined(CONFIG_FSL_ESDHC) +#if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_FSL_ESDHC_IMX) u32 sdhc_clk; #endif diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index 6b83f92662..8f5a01bc0b 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -21,8 +21,8 @@ #include #include -#ifdef CONFIG_FSL_ESDHC -#include +#ifdef CONFIG_FSL_ESDHC_IMX +#include #endif static u32 reset_cause = -1; @@ -258,7 +258,7 @@ int cpu_eth_init(bd_t *bis) return rc; } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /* * Initializes on-chip MMC controllers. * to override, implement board_mmc_init() diff --git a/arch/arm/mach-imx/mx6/litesom.c b/arch/arm/mach-imx/mx6/litesom.c index c332d6805b..4f4df7433b 100644 --- a/arch/arm/mach-imx/mx6/litesom.c +++ b/arch/arm/mach-imx/mx6/litesom.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include @@ -49,7 +49,7 @@ static iomux_v3_cfg_t const emmc_pads[] = { MX6_PAD_NAND_ALE__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), }; -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg emmc_cfg = {USDHC2_BASE_ADDR, 0, 8}; #define EMMC_PWR_GPIO IMX_GPIO_NR(4, 10) diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c index 8cda71cf55..a98ae371b5 100644 --- a/arch/arm/mach-imx/mx7/clock.c +++ b/arch/arm/mach-imx/mx7/clock.c @@ -19,13 +19,13 @@ struct mxc_ccm_anatop_reg *ccm_anatop = (struct mxc_ccm_anatop_reg *) ANATOP_BASE_ADDR; struct mxc_ccm_reg *ccm_reg = (struct mxc_ccm_reg *)CCM_BASE_ADDR; -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); #elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR diff --git a/arch/arm/mach-imx/mx7ulp/clock.c b/arch/arm/mach-imx/mx7ulp/clock.c index fac9011388..dc317fe810 100644 --- a/arch/arm/mach-imx/mx7ulp/clock.c +++ b/arch/arm/mach-imx/mx7ulp/clock.c @@ -14,7 +14,7 @@ DECLARE_GLOBAL_DATA_PTR; int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC0_RBASE gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); #elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC1_RBASE diff --git a/arch/arm/mach-imx/speed.c b/arch/arm/mach-imx/speed.c index ab134d06c5..f9e486c7df 100644 --- a/arch/arm/mach-imx/speed.c +++ b/arch/arm/mach-imx/speed.c @@ -11,13 +11,13 @@ #include #include -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX DECLARE_GLOBAL_DATA_PTR; #endif int get_clocks(void) { -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #ifdef CONFIG_FSL_USDHC #if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); diff --git a/board/Arcturus/ucp1020/spl.c b/board/Arcturus/ucp1020/spl.c index 451a9d78bb..57629b5a96 100644 --- a/board/Arcturus/ucp1020/spl.c +++ b/board/Arcturus/ucp1020/spl.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c index 09620435d3..2eccc053d8 100644 --- a/board/advantech/dms-ba16/dms-ba16.c +++ b/board/advantech/dms-ba16/dms-ba16.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include @@ -221,7 +221,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/aristainetos/aristainetos-v1.c b/board/aristainetos/aristainetos-v1.c index 5231c2e372..de1a018c1f 100644 --- a/board/aristainetos/aristainetos-v1.c +++ b/board/aristainetos/aristainetos-v1.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/aristainetos/aristainetos-v2.c b/board/aristainetos/aristainetos-v2.c index b33a75c82c..9b768ff659 100644 --- a/board/aristainetos/aristainetos-v2.c +++ b/board/aristainetos/aristainetos-v2.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c index c88b9fc8c0..9f744b30b3 100644 --- a/board/aristainetos/aristainetos.c +++ b/board/aristainetos/aristainetos.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include #include @@ -107,7 +107,7 @@ int dram_init(void) return 0; } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC1_BASE_ADDR}, {USDHC2_BASE_ADDR}, diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c index 2d73441620..067a970830 100644 --- a/board/bachmann/ot1200/ot1200.c +++ b/board/bachmann/ot1200/ot1200.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/barco/platinum/platinum.c b/board/barco/platinum/platinum.c index b484ec2e78..1c6514af6e 100644 --- a/board/barco/platinum/platinum.c +++ b/board/barco/platinum/platinum.c @@ -6,7 +6,7 @@ #include #include -#include +#include #include #include #include diff --git a/board/barco/titanium/titanium.c b/board/barco/titanium/titanium.c index e9955c816f..407bfe95ed 100644 --- a/board/barco/titanium/titanium.c +++ b/board/barco/titanium/titanium.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include @@ -215,7 +215,7 @@ int board_ehci_hcd_init(int port) #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[1] = { { USDHC3_BASE_ADDR }, }; diff --git a/board/beckhoff/mx53cx9020/mx53cx9020.c b/board/beckhoff/mx53cx9020/mx53cx9020.c index 79d8a62cf1..e5c1239878 100644 --- a/board/beckhoff/mx53cx9020/mx53cx9020.c +++ b/board/beckhoff/mx53cx9020/mx53cx9020.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include #include @@ -136,7 +136,7 @@ int board_ehci_hcd_init(int port) } #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index 84d7cee740..867eade4bd 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include #include @@ -283,7 +283,7 @@ int board_ehci_power(int port, int on) #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR}, {USDHC4_BASE_ADDR}, diff --git a/board/ccv/xpress/xpress.c b/board/ccv/xpress/xpress.c index dcf5e1448f..35e1c557b5 100644 --- a/board/ccv/xpress/xpress.c +++ b/board/ccv/xpress/xpress.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/compulab/cl-som-imx7/cl-som-imx7.c b/board/compulab/cl-som-imx7/cl-som-imx7.c index 1bc33b0a7b..94e7bf194b 100644 --- a/board/compulab/cl-som-imx7/cl-som-imx7.c +++ b/board/compulab/cl-som-imx7/cl-som-imx7.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include #include @@ -68,7 +68,7 @@ int dram_init(void) return 0; } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #define CL_SOM_IMX7_GPIO_USDHC3_PWR IMX_GPIO_NR(6, 11) @@ -116,7 +116,7 @@ int board_mmc_init(bd_t *bis) return 0; } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ #ifdef CONFIG_FEC_MXC diff --git a/board/compulab/cl-som-imx7/common.c b/board/compulab/cl-som-imx7/common.c index e0f90fd5c4..40ba0f7a96 100644 --- a/board/compulab/cl-som-imx7/common.c +++ b/board/compulab/cl-som-imx7/common.c @@ -8,7 +8,7 @@ */ #include -#include +#include #include #include "common.h" @@ -23,7 +23,7 @@ int board_spi_cs_gpio(unsigned int bus, unsigned int cs) #endif /* CONFIG_SPI */ -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int board_mmc_getcd(struct mmc *mmc) { @@ -42,4 +42,4 @@ int board_mmc_getcd(struct mmc *mmc) return ret; } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ diff --git a/board/compulab/cl-som-imx7/common.h b/board/compulab/cl-som-imx7/common.h index 8b15a59abe..bc19867f87 100644 --- a/board/compulab/cl-som-imx7/common.h +++ b/board/compulab/cl-som-imx7/common.h @@ -9,19 +9,19 @@ #define PADS_SET_PROT(pads_array) void cl_som_imx7_##pads_array##_set(void) -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #define CL_SOM_IMX7_GPIO_USDHC1_CD IMX_GPIO_NR(5, 0) PADS_SET_PROT(usdhc1_pads); -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ PADS_SET_PROT(uart1_pads); #ifdef CONFIG_SPI PADS_SET_PROT(espi1_pads); #endif /* CONFIG_SPI */ #ifndef CONFIG_SPL_BUILD -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX PADS_SET_PROT(usdhc3_emmc_pads); -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ #ifdef CONFIG_FEC_MXC PADS_SET_PROT(phy1_rst_pads); PADS_SET_PROT(fec1_pads); diff --git a/board/compulab/cl-som-imx7/mux.c b/board/compulab/cl-som-imx7/mux.c index e29d2deaf2..18f16a4873 100644 --- a/board/compulab/cl-som-imx7/mux.c +++ b/board/compulab/cl-som-imx7/mux.c @@ -17,7 +17,7 @@ void cl_som_imx7_##pads_array##_set(void) \ imx_iomux_v3_setup_multiple_pads(pads_array, ARRAY_SIZE(pads_array)); \ } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ PAD_CTL_HYS | PAD_CTL_PUE | \ @@ -36,7 +36,7 @@ static iomux_v3_cfg_t const usdhc1_pads[] = { PADS_SET(usdhc1_pads) -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) @@ -69,7 +69,7 @@ PADS_SET(espi1_pads) #ifndef CONFIG_SPL_BUILD -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static iomux_v3_cfg_t const usdhc3_emmc_pads[] = { MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -89,7 +89,7 @@ static iomux_v3_cfg_t const usdhc3_emmc_pads[] = { PADS_SET(usdhc3_emmc_pads) -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ #ifdef CONFIG_FEC_MXC diff --git a/board/compulab/cl-som-imx7/spl.c b/board/compulab/cl-som-imx7/spl.c index 76a4c8beb0..f9a19f08da 100644 --- a/board/compulab/cl-som-imx7/spl.c +++ b/board/compulab/cl-som-imx7/spl.c @@ -9,14 +9,14 @@ #include #include -#include +#include #include #include #include #include #include "common.h" -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg cl_som_imx7_spl_usdhc_cfg = { USDHC1_BASE_ADDR, 0, 4}; @@ -27,7 +27,7 @@ int board_mmc_init(bd_t *bis) cl_som_imx7_spl_usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); return fsl_esdhc_initialize(bis, &cl_som_imx7_spl_usdhc_cfg); } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ static iomux_v3_cfg_t const led_pads[] = { MX7D_PAD_SAI1_TX_SYNC__GPIO6_IO14 | MUX_PAD_CTRL(PAD_CTL_PUS_PU5KOHM | diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c index d42f57d4b7..e9262c64a5 100644 --- a/board/compulab/cm_fx6/cm_fx6.c +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include #include @@ -608,7 +608,7 @@ int board_init(void) cm_fx6_setup_display(); /* This should be done in the MMC driver when MX6 has a clock driver */ -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX if (IS_ENABLED(CONFIG_BLK)) { int i; diff --git a/board/compulab/cm_fx6/common.c b/board/compulab/cm_fx6/common.c index e1e4a67f8a..ed8c7a3bf5 100644 --- a/board/compulab/cm_fx6/common.c +++ b/board/compulab/cm_fx6/common.c @@ -11,10 +11,10 @@ #include #include #include -#include +#include #include "common.h" -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS) diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c index acbb2ad400..66186ec853 100644 --- a/board/compulab/cm_fx6/spl.c +++ b/board/compulab/cm_fx6/spl.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include "common.h" enum ddr_config { diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c index 50124f8516..7c767fb8b4 100644 --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include #include @@ -411,7 +411,7 @@ static void setup_spi(void) } #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c b/board/dhelectronics/dh_imx6/dh_imx6.c index f9ac5c10e1..fb2f24fd2a 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6.c +++ b/board/dhelectronics/dh_imx6/dh_imx6.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include #include @@ -186,7 +186,7 @@ int board_eth_init(bd_t *bis) } #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #define USDHC2_CD_GPIO IMX_GPIO_NR(6, 16) #define USDHC3_CD_GPIO IMX_GPIO_NR(7, 8) diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c index 04e9eab272..f9174675ce 100644 --- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/el/el6x/el6x.c b/board/el/el6x/el6x.c index dd0c112088..55db26a819 100644 --- a/board/el/el6x/el6x.c +++ b/board/el/el6x/el6x.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include @@ -255,7 +255,7 @@ iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), }; -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC2_BASE_ADDR}, {USDHC4_BASE_ADDR}, diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c index fed92aa88a..bcfe1250ad 100644 --- a/board/embest/mx6boards/mx6boards.c +++ b/board/embest/mx6boards/mx6boards.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include #include #include #include @@ -181,7 +181,7 @@ iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_NANDF_ALE__GPIO6_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL), }; -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/freescale/imx8mq_evk/imx8mq_evk.c b/board/freescale/imx8mq_evk/imx8mq_evk.c index 54e0c38431..322713cced 100644 --- a/board/freescale/imx8mq_evk/imx8mq_evk.c +++ b/board/freescale/imx8mq_evk/imx8mq_evk.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c index e6cbc34b0d..f5681ff9f1 100644 --- a/board/freescale/imx8mq_evk/spl.c +++ b/board/freescale/imx8mq_evk/spl.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c index a4c587a390..e042636b21 100644 --- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c +++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c @@ -7,7 +7,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/m54418twr/m54418twr.c b/board/freescale/m54418twr/m54418twr.c index aa6f0e6b78..a4943e76ae 100644 --- a/board/freescale/m54418twr/m54418twr.c +++ b/board/freescale/m54418twr/m54418twr.c @@ -9,7 +9,7 @@ #include #include #include -#include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/freescale/mx25pdk/mx25pdk.c b/board/freescale/mx25pdk/mx25pdk.c index 18922d8131..c59f0fb922 100644 --- a/board/freescale/mx25pdk/mx25pdk.c +++ b/board/freescale/mx25pdk/mx25pdk.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include #include @@ -24,7 +24,7 @@ DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {IMX_MMC_SDHC1_BASE}, }; @@ -151,7 +151,7 @@ int board_late_init(void) return 0; } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int board_mmc_getcd(struct mmc *mmc) { /* Set up the Card Detect pin. */ diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c index fa67230a85..aba17a6b82 100644 --- a/board/freescale/mx35pdk/mx35pdk.c +++ b/board/freescale/mx35pdk/mx35pdk.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include @@ -261,7 +261,7 @@ int board_eth_init(bd_t *bis) return cpu_eth_init(bis); } -#if defined(CONFIG_FSL_ESDHC) +#if defined(CONFIG_FSL_ESDHC_IMX) struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR}; diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index 68a9c77970..d1bb852f37 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include @@ -24,7 +24,7 @@ DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, @@ -262,7 +262,7 @@ static void power_init(void) gpio_set_value(IMX_GPIO_NR(2, 14), 1); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int board_mmc_getcd(struct mmc *mmc) { struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; diff --git a/board/freescale/mx53ard/mx53ard.c b/board/freescale/mx53ard/mx53ard.c index 9ed466895f..e8fccccafd 100644 --- a/board/freescale/mx53ard/mx53ard.c +++ b/board/freescale/mx53ard/mx53ard.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include #define ETHERNET_INT IMX_GPIO_NR(2, 31) @@ -112,7 +112,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, diff --git a/board/freescale/mx53evk/mx53evk.c b/board/freescale/mx53evk/mx53evk.c index 5603658f06..56985c63d7 100644 --- a/board/freescale/mx53evk/mx53evk.c +++ b/board/freescale/mx53evk/mx53evk.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include @@ -137,7 +137,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC3_BASE_ADDR}, diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index b66cdcde67..d023ce667d 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include @@ -92,7 +92,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC3_BASE_ADDR}, diff --git a/board/freescale/mx53smd/mx53smd.c b/board/freescale/mx53smd/mx53smd.c index 1a1a03955b..cab0e79a6b 100644 --- a/board/freescale/mx53smd/mx53smd.c +++ b/board/freescale/mx53smd/mx53smd.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -77,7 +77,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {MMC_SDHC1_BASE_ADDR}, }; diff --git a/board/freescale/mx6qarm2/mx6qarm2.c b/board/freescale/mx6qarm2/mx6qarm2.c index f445f4bd82..3957c09ac0 100644 --- a/board/freescale/mx6qarm2/mx6qarm2.c +++ b/board/freescale/mx6qarm2/mx6qarm2.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include #include @@ -103,7 +103,7 @@ static void setup_iomux_enet(void) imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR}, {USDHC4_BASE_ADDR}, diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c index dd72de9fc6..e1a3b47425 100644 --- a/board/freescale/mx6sabreauto/mx6sabreauto.c +++ b/board/freescale/mx6sabreauto/mx6sabreauto.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include @@ -282,7 +282,7 @@ static void setup_iomux_uart(void) SETUP_IOMUX_PADS(uart4_pads); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[1] = { {USDHC3_BASE_ADDR}, }; diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 385a18e923..6dd0977679 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include #include @@ -250,7 +250,7 @@ static void setup_iomux_uart(void) SETUP_IOMUX_PADS(uart1_pads); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index e05aea6b3e..4c48679037 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c index 6e606dae3e..15e921aeca 100644 --- a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c +++ b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c index 3e10c7fef1..8ee85cc384 100644 --- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c +++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c index 636c008993..785247f7e2 100644 --- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include @@ -189,7 +189,7 @@ static int board_qspi_init(void) } #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC1_BASE_ADDR, 0, 4}, #if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK) diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c index ad83f36ef7..1f0f70efbd 100644 --- a/board/freescale/mx6ullevk/mx6ullevk.c +++ b/board/freescale/mx6ullevk/mx6ullevk.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c index 191b59a6d4..86bf030d35 100644 --- a/board/freescale/mx7dsabresd/mx7dsabresd.c +++ b/board/freescale/mx7dsabresd/mx7dsabresd.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/s32v234evb/s32v234evb.c b/board/freescale/s32v234evb/s32v234evb.c index 464be2b4e0..9bc9ddf649 100644 --- a/board/freescale/s32v234evb/s32v234evb.c +++ b/board/freescale/s32v234evb/s32v234evb.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include #include @@ -74,7 +74,7 @@ void setup_iomux_nfc(void) } #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {USDHC_BASE_ADDR}, }; diff --git a/board/freescale/vf610twr/vf610twr.c b/board/freescale/vf610twr/vf610twr.c index 63be3bd719..f6cd7a4c8d 100644 --- a/board/freescale/vf610twr/vf610twr.c +++ b/board/freescale/vf610twr/vf610twr.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include #include @@ -234,7 +234,7 @@ static void setup_iomux_qspi(void) imx_iomux_v3_setup_multiple_pads(qspi0_pads, ARRAY_SIZE(qspi0_pads)); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {ESDHC1_BASE_ADDR}, }; diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c index 8786a12dc0..a543916615 100644 --- a/board/gateworks/gw_ventana/common.c +++ b/board/gateworks/gw_ventana/common.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include #include @@ -1656,7 +1656,7 @@ void setup_pmic(void) } } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[2]; int board_mmc_init(bd_t *bis) @@ -1753,4 +1753,4 @@ int board_mmc_getcd(struct mmc *mmc) return -1; } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index c63fb41e1b..92edc10381 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index 079d302fbe..b6f39f0fae 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include @@ -229,7 +229,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[3] = { {USDHC2_BASE_ADDR}, {USDHC3_BASE_ADDR}, diff --git a/board/ge/mx53ppd/mx53ppd.c b/board/ge/mx53ppd/mx53ppd.c index 23bfe55541..af0730ee38 100644 --- a/board/ge/mx53ppd/mx53ppd.c +++ b/board/ge/mx53ppd/mx53ppd.c @@ -23,7 +23,7 @@ #include #include #include -#include +#include #include #include #include @@ -122,7 +122,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC3_BASE_ADDR}, {MMC_SDHC1_BASE_ADDR}, diff --git a/board/grinn/liteboard/board.c b/board/grinn/liteboard/board.c index 80910e4713..1491b8c3d4 100644 --- a/board/grinn/liteboard/board.c +++ b/board/grinn/liteboard/board.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include #include @@ -66,7 +66,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg sd_cfg = {USDHC1_BASE_ADDR, 0, 4}; #define SD_CD_GPIO IMX_GPIO_NR(1, 19) diff --git a/board/inversepath/usbarmory/usbarmory.c b/board/inversepath/usbarmory/usbarmory.c index a490aa814e..de4ad83226 100644 --- a/board/inversepath/usbarmory/usbarmory.c +++ b/board/inversepath/usbarmory/usbarmory.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/k+p/kp_imx53/kp_imx53.c b/board/k+p/kp_imx53/kp_imx53.c index becb6a63fa..974f1f6c4d 100644 --- a/board/k+p/kp_imx53/kp_imx53.c +++ b/board/k+p/kp_imx53/kp_imx53.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include #include "kp_id_rev.h" @@ -54,7 +54,7 @@ int board_ehci_hcd_init(int port) } #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[] = { {MMC_SDHC3_BASE_ADDR}, }; diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c index ace986fa05..7bdc64b1be 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include @@ -166,7 +166,7 @@ int board_phy_config(struct phy_device *phydev) } #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4) static struct fsl_esdhc_cfg usdhc_cfg[] = { diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c index d89e1120a5..e284d5ec57 100644 --- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c +++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c index 9f2586521d..54d10a42f4 100644 --- a/board/kosagi/novena/novena.c +++ b/board/kosagi/novena/novena.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include #include @@ -102,7 +102,7 @@ int drv_keyboard_init(void) /* * SDHC */ -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg[] = { { USDHC3_BASE_ADDR, 0, 4 }, /* Micro SD */ { USDHC2_BASE_ADDR, 0, 4 }, /* Big SD */ diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c index b2d670e0ed..00210ab254 100644 --- a/board/kosagi/novena/novena_spl.c +++ b/board/kosagi/novena/novena_spl.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include #include @@ -404,7 +404,7 @@ static inline void novena_spl_setup_iomux_video(void) {} /* * SPL boots from uSDHC card */ -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR, 0, 4 }; @@ -566,7 +566,7 @@ void board_init_f(ulong dummy) #ifdef CONFIG_BOARD_POSTCLK_INIT board_postclk_init(); #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX get_clocks(); #endif diff --git a/board/liebherr/display5/common.c b/board/liebherr/display5/common.c index 4eb86d8c5d..7b89d16970 100644 --- a/board/liebherr/display5/common.c +++ b/board/liebherr/display5/common.c @@ -89,7 +89,7 @@ void displ5_set_iomux_ecspi_spl(void) {} void displ5_set_iomux_ecspi(void) {} #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), diff --git a/board/liebherr/display5/display5.c b/board/liebherr/display5/display5.c index d8383170d2..6b7ff0acb6 100644 --- a/board/liebherr/display5/display5.c +++ b/board/liebherr/display5/display5.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include #include @@ -186,7 +186,7 @@ iomux_v3_cfg_t const misc_pads[] = { MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), }; -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[1] = { { USDHC4_BASE_ADDR, 0, 8, }, }; @@ -204,7 +204,7 @@ int board_mmc_init(bd_t *bis) return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ static void displ5_setup_ecspi(void) { diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c index 0c0172e201..27f843ec45 100644 --- a/board/liebherr/display5/spl.c +++ b/board/liebherr/display5/spl.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/liebherr/mccmon6/mccmon6.c b/board/liebherr/mccmon6/mccmon6.c index 946b91f3a1..0e069a7755 100644 --- a/board/liebherr/mccmon6/mccmon6.c +++ b/board/liebherr/mccmon6/mccmon6.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/liebherr/mccmon6/spl.c b/board/liebherr/mccmon6/spl.c index acfc4902c1..f0ed78c847 100644 --- a/board/liebherr/mccmon6/spl.c +++ b/board/liebherr/mccmon6/spl.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c index b17a3b1d39..1bca1c480a 100644 --- a/board/logicpd/imx6/imx6logic.c +++ b/board/logicpd/imx6/imx6logic.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include #include @@ -199,7 +199,7 @@ static iomux_v3_cfg_t const usdhc2_pads[] = { MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ }; -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg usdhc_cfg[] = { {USDHC1_BASE_ADDR}, /* SOM */ {USDHC2_BASE_ADDR} /* Baseboard */ diff --git a/board/menlo/m53menlo/m53menlo.c b/board/menlo/m53menlo/m53menlo.c index 6bdd6d5b23..35e9b02e86 100644 --- a/board/menlo/m53menlo/m53menlo.c +++ b/board/menlo/m53menlo/m53menlo.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include @@ -150,7 +150,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg = { MMC_SDHC1_BASE_ADDR, }; diff --git a/board/phytec/pcl063/pcl063.c b/board/phytec/pcl063/pcl063.c index 38b233d1b0..b99fa6a6f1 100644 --- a/board/phytec/pcl063/pcl063.c +++ b/board/phytec/pcl063/pcl063.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/phytec/pcl063/spl.c b/board/phytec/pcl063/spl.c index b93cd493f2..fc4a9ccbd8 100644 --- a/board/phytec/pcl063/spl.c +++ b/board/phytec/pcl063/spl.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include /* Configuration for Micron MT41K256M16TW-107 IT:P, 32M x 16 x 8 -> 256MiB */ @@ -100,7 +100,7 @@ static void spl_dram_init(void) mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \ @@ -137,7 +137,7 @@ int board_mmc_init(bd_t *bis) return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ void board_init_f(ulong dummy) { diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c index f988af2abc..3921f212cd 100644 --- a/board/phytec/pcm052/pcm052.c +++ b/board/phytec/pcm052/pcm052.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/phytec/pcm058/pcm058.c b/board/phytec/pcm058/pcm058.c index 5ecaf00be7..ac5e3a2328 100644 --- a/board/phytec/pcm058/pcm058.c +++ b/board/phytec/pcm058/pcm058.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/phytec/pfla02/pfla02.c b/board/phytec/pfla02/pfla02.c index aae23a3e44..753cf2b87d 100644 --- a/board/phytec/pfla02/pfla02.c +++ b/board/phytec/pfla02/pfla02.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/samtec/vining_2000/vining_2000.c b/board/samtec/vining_2000/vining_2000.c index f37365c5cb..8f6b026ede 100644 --- a/board/samtec/vining_2000/vining_2000.c +++ b/board/samtec/vining_2000/vining_2000.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/seco/common/mx6.c b/board/seco/common/mx6.c index fd7008a776..51832b9d08 100644 --- a/board/seco/common/mx6.c +++ b/board/seco/common/mx6.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/seco/mx6quq7/mx6quq7.c b/board/seco/mx6quq7/mx6quq7.c index 094a2100e7..c1e36b652e 100644 --- a/board/seco/mx6quq7/mx6quq7.c +++ b/board/seco/mx6quq7/mx6quq7.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/sks-kinkel/sksimx6/sksimx6.c b/board/sks-kinkel/sksimx6/sksimx6.c index f6e3d4d12e..59a07a9ffd 100644 --- a/board/sks-kinkel/sksimx6/sksimx6.c +++ b/board/sks-kinkel/sksimx6/sksimx6.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c index cf63427e52..d333ccc446 100644 --- a/board/solidrun/mx6cuboxi/mx6cuboxi.c +++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c @@ -24,7 +24,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/sysam/stmark2/stmark2.c b/board/sysam/stmark2/stmark2.c index 790199a640..fae9a6ec87 100644 --- a/board/sysam/stmark2/stmark2.c +++ b/board/sysam/stmark2/stmark2.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c index ecb45f208d..6bad50a179 100644 --- a/board/tbs/tbs2910/tbs2910.c +++ b/board/tbs/tbs2910/tbs2910.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include @@ -154,7 +154,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static iomux_v3_cfg_t const usdhc2_pads[] = { MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -267,7 +267,7 @@ int board_mmc_get_env_part(int devno) { return (devno == 3) ? 1 : 0; /* part 0 for SD2 / SD3, part 1 for eMMC */ } -#endif /* CONFIG_FSL_ESDHC */ +#endif /* CONFIG_FSL_ESDHC_IMX */ #ifdef CONFIG_VIDEO_IPUV3 static void do_enable_hdmi(struct display_info_t const *dev) diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c index 767d13dfe5..d6d74405a8 100644 --- a/board/technexion/pico-imx7d/pico-imx7d.c +++ b/board/technexion/pico-imx7d/pico-imx7d.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/technologic/ts4800/ts4800.c b/board/technologic/ts4800/ts4800.c index a0e021e3ce..927a19d05a 100644 --- a/board/technologic/ts4800/ts4800.c +++ b/board/technologic/ts4800/ts4800.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include #include @@ -29,7 +29,7 @@ DECLARE_GLOBAL_DATA_PTR; -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[2] = { {MMC_SDHC1_BASE_ADDR}, {MMC_SDHC2_BASE_ADDR}, @@ -96,7 +96,7 @@ static void setup_iomux_fec(void) imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX int board_mmc_getcd(struct mmc *mmc) { struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index d11207c7f4..62216b0d53 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include #include #include #include @@ -359,7 +359,7 @@ int board_ehci_power(int port, int on) } #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /* use the following sequence: eMMC, MMC, SD */ struct fsl_esdhc_cfg usdhc_cfg[CONFIG_SYS_FSL_USDHC_NUM] = { {USDHC3_BASE_ADDR}, diff --git a/board/toradex/colibri-imx6ull/colibri-imx6ull.c b/board/toradex/colibri-imx6ull/colibri-imx6ull.c index fcb49a0718..7ba1c25ad6 100644 --- a/board/toradex/colibri-imx6ull/colibri-imx6ull.c +++ b/board/toradex/colibri-imx6ull/colibri-imx6ull.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include @@ -69,7 +69,7 @@ static iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_UART1_CTS_B__UART1_DTE_RTS | MUX_PAD_CTRL(UART_PAD_CTRL), }; -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX static iomux_v3_cfg_t const usdhc1_pads[] = { MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -192,7 +192,7 @@ static void setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); } -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX #define USDHC1_CD_GPIO IMX_GPIO_NR(5, 0) diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index 17876f27e9..36e864e444 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -26,7 +26,7 @@ #include #include #include -#include +#include #include #include #include @@ -302,7 +302,7 @@ int board_ehci_power(int port, int on) } #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX /* use the following sequence: eMMC, MMC */ struct fsl_esdhc_cfg usdhc_cfg[CONFIG_SYS_FSL_USDHC_NUM] = { {USDHC3_BASE_ADDR}, diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c index 61bf8bfd58..0eb83474c4 100644 --- a/board/toradex/colibri_imx7/colibri_imx7.c +++ b/board/toradex/colibri_imx7/colibri_imx7.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index 79f702f2bf..349415ea53 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include @@ -331,7 +331,7 @@ static void setup_tcon(void) } #endif -#ifdef CONFIG_FSL_ESDHC +#ifdef CONFIG_FSL_ESDHC_IMX struct fsl_esdhc_cfg esdhc_cfg[1] = { {ESDHC1_BASE_ADDR}, }; diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c index 816672edc6..eeddb5c247 100644 --- a/board/tqc/tqma6/tqma6.c +++ b/board/tqc/tqma6/tqma6.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c index f7072b8563..8a2431edab 100644 --- a/board/tqc/tqma6/tqma6_mba6.c +++ b/board/tqc/tqma6/tqma6_mba6.c @@ -18,7 +18,7 @@ #include #include -#include +#include #include #include #include diff --git a/board/tqc/tqma6/tqma6_wru4.c b/board/tqc/tqma6/tqma6_wru4.c index aaee9bfbec..99196ad685 100644 --- a/board/tqc/tqma6/tqma6_wru4.c +++ b/board/tqc/tqma6/tqma6_wru4.c @@ -21,7 +21,7 @@ #include #include -#include +#include #include #include #include diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c index 828161360c..d51f648178 100644 --- a/board/udoo/neo/neo.c +++ b/board/udoo/neo/neo.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/udoo/udoo.c b/board/udoo/udoo.c index 491e9be1c2..c34a5a636b 100644 --- a/board/udoo/udoo.c +++ b/board/udoo/udoo.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/udoo/udoo_spl.c b/board/udoo/udoo_spl.c index 30663e2025..b287fbf410 100644 --- a/board/udoo/udoo_spl.c +++ b/board/udoo/udoo_spl.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c index 9c3350019c..c7773aaebb 100644 --- a/board/wandboard/spl.c +++ b/board/wandboard/spl.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index 6af1b45882..021622dca1 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/warp/warp.c b/board/warp/warp.c index f346b9269a..a44a5789e4 100644 --- a/board/warp/warp.c +++ b/board/warp/warp.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/woodburn/woodburn.c b/board/woodburn/woodburn.c index 42633ed49d..5cab3f4487 100644 --- a/board/woodburn/woodburn.c +++ b/board/woodburn/woodburn.c @@ -17,7 +17,7 @@ #include #include #include -#include +#include #include #include #include @@ -206,7 +206,7 @@ int board_init(void) return 0; } -#if defined(CONFIG_FSL_ESDHC) +#if defined(CONFIG_FSL_ESDHC_IMX) struct fsl_esdhc_cfg esdhc_cfg = {MMC_SDHC1_BASE_ADDR}; int board_mmc_init(bd_t *bis) diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index 86dabd3736..6239bfd6f5 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -55,7 +55,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DWC_AHSATA=y CONFIG_DFU_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/apalis_imx6_nospl_com_defconfig b/configs/apalis_imx6_nospl_com_defconfig index b6ab5285c2..b9fb26af0a 100644 --- a/configs/apalis_imx6_nospl_com_defconfig +++ b/configs/apalis_imx6_nospl_com_defconfig @@ -44,7 +44,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DWC_AHSATA=y CONFIG_DFU_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/apalis_imx6_nospl_it_defconfig b/configs/apalis_imx6_nospl_it_defconfig index c972b11eb5..0ff9cca6b8 100644 --- a/configs/apalis_imx6_nospl_it_defconfig +++ b/configs/apalis_imx6_nospl_it_defconfig @@ -44,7 +44,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DWC_AHSATA=y CONFIG_DFU_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig index f7de4e3b9a..aceede07f0 100644 --- a/configs/aristainetos2_defconfig +++ b/configs/aristainetos2_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig index ff21f1f2c4..a3799d2420 100644 --- a/configs/aristainetos2b_defconfig +++ b/configs/aristainetos2b_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig index 950f9f6baa..4ac10c43c6 100644 --- a/configs/aristainetos_defconfig +++ b/configs/aristainetos_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index 9e31b4ac97..c290f8eb37 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -30,7 +30,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig index 99c581b2de..e812eef39f 100644 --- a/configs/cgtqmx6eval_defconfig +++ b/configs/cgtqmx6eval_defconfig @@ -54,7 +54,7 @@ CONFIG_DFU_MMC=y CONFIG_DFU_SF=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_PHYLIB=y CONFIG_MII=y diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index 3501e2b864..2c818809b4 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -49,7 +49,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx7d-sdb" # CONFIG_ENV_IS_IN_MMC is not set CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_EON=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index c8d1e83111..14eeeb5c02 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -53,7 +53,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DWC_AHSATA=y CONFIG_DM_KEYBOARD=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_SPI_FLASH=y diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index dfe6ec1ce7..05ed20ea86 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -48,7 +48,7 @@ CONFIG_DFU_NAND=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 2072281354..e7346a0d0e 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -54,7 +54,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DFU_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_MII=y diff --git a/configs/colibri_imx6_nospl_defconfig b/configs/colibri_imx6_nospl_defconfig index 5e9490bc42..d08ae669fa 100644 --- a/configs/colibri_imx6_nospl_defconfig +++ b/configs/colibri_imx6_nospl_defconfig @@ -43,7 +43,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DFU_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_MII=y diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index 7a52361a2a..f6ec426fcc 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -50,7 +50,7 @@ CONFIG_DFU_NAND=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS_DT=y diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index 5e2a204a88..590f7f7419 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -45,7 +45,7 @@ CONFIG_DFU_MMC=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_MII=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 4192501257..ddb91d09bb 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -49,7 +49,7 @@ CONFIG_DFU_MMC=y CONFIG_DFU_NAND=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_VF610_NFC_60_ECC_BYTES=y CONFIG_MTD_UBI_FASTMAP=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index a14c5f2261..77df20579d 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -39,7 +39,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index cdf3642dd2..da2f4ca7ed 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -62,7 +62,7 @@ CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 6b9febf62f..ad47517d84 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -63,7 +63,7 @@ CONFIG_PARTITION_TYPE_GUID=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DFU_MMC=y CONFIG_DFU_SF=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig index a2f4395b9e..3b60ec3d44 100644 --- a/configs/dms-ba16-1g_defconfig +++ b/configs/dms-ba16-1g_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig index 2784c1268e..21adacc2f2 100644 --- a/configs/dms-ba16_defconfig +++ b/configs/dms-ba16_defconfig @@ -31,7 +31,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index a250719703..6a6da714dd 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -36,7 +36,7 @@ CONFIG_BOOTCOUNT_EXT=y CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="1:5" CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 07171c7009..c5737bf55f 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -61,7 +61,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_RPMB=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_PHYLIB=y CONFIG_E1000=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 0ed2209e3b..3664dad532 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -61,7 +61,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_RPMB=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_DEVICE=y CONFIG_PHYLIB=y CONFIG_MV88E61XX_SWITCH=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 57e4a999ab..2723ce0f96 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -63,7 +63,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_SUPPORT_EMMC_RPMB=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index c34c515080..920371ad5b 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -38,7 +38,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-icore" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index f3661c0a76..53f8f52df9 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -31,7 +31,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x10000000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=2 CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_FEC_MXC=y diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index cf149d615b..5bd45ca634 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -39,7 +39,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index 8a875a8716..24a9950eff 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -58,7 +58,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_PCF8575_GPIO=y CONFIG_LED=y CONFIG_LED_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index 7a0e5169b6..663b12866f 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -44,7 +44,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-mipi" CONFIG_OF_LIST="imx6q-icore-mipi imx6dl-icore-mipi" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 68ad1c6d20..7236e162af 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -55,7 +55,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_OF_LIST="imx6q-icore imx6dl-icore" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index cf149d615b..5bd45ca634 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -39,7 +39,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index a4766063ca..502d5de64d 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -41,7 +41,7 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs" CONFIG_OF_LIST="imx6q-icore-rqs imx6dl-icore-rqs" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_FEC_MXC=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index 8a7f41b53c..2749eaf7e9 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -38,7 +38,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index bf61f768ab..a3d89ab065 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -40,7 +40,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-geam" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index abf1a93a98..00546b4fc2 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -38,7 +38,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-emmc" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_SMSC=y CONFIG_FEC_MXC=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index 8961661a90..a00faa04e5 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -40,7 +40,7 @@ CONFIG_CMD_UBI=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-isiot-nand" CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 9e2ff29a04..5c198b1523 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -28,7 +28,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_ETH=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX8M=y diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index 88da3ac784..2749d4d3be 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -51,7 +51,7 @@ CONFIG_I2C_MUX=y CONFIG_I2C_MUX_PCA954x=y CONFIG_MISC=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ATHEROS=y diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig index d00c8cde62..66ce2701af 100644 --- a/configs/kp_imx53_defconfig +++ b/configs/kp_imx53_defconfig @@ -29,7 +29,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx53-kp" CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_DEFAULT_BUS_NUMBER=0x1 CONFIG_PHYLIB=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 3f48463c0c..99965b6504 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not set CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y CONFIG_FEC_MXC=y diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index e4a2fcc7fb..6a55cf92b5 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -37,7 +37,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_DM_ETH=y CONFIG_MII=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index 5555e05030..e1ae6b4c61 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -51,7 +51,7 @@ CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_BOOTCOUNT_ADDR=0x53FA401C CONFIG_SYS_BOOTCOUNT_MAGIC=0x0B01C041 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_PHYLIB=y diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index 48bec11c10..4b32b5b7b9 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -21,7 +21,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 1ab29c1ca6..98bcbc649a 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -28,7 +28,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 6d47db57ee..d9aa40439b 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -29,7 +29,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_MTD_DEVICE=y diff --git a/configs/mx25pdk_defconfig b/configs/mx25pdk_defconfig index c024d7947b..a6ee105385 100644 --- a/configs/mx25pdk_defconfig +++ b/configs/mx25pdk_defconfig @@ -19,7 +19,7 @@ CONFIG_CMD_DATE=y CONFIG_CMD_FS_GENERIC=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_FS_EXT4=y CONFIG_FS_FAT=y diff --git a/configs/mx35pdk_defconfig b/configs/mx35pdk_defconfig index 7fec4b6aa0..3d36045ab5 100644 --- a/configs/mx35pdk_defconfig +++ b/configs/mx35pdk_defconfig @@ -26,7 +26,7 @@ CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index e93e81f3c3..7c277acba8 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -21,7 +21,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_DATE=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig index 96c43e0d2f..26572fe638 100644 --- a/configs/mx53ard_defconfig +++ b/configs/mx53ard_defconfig @@ -15,7 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXC=y CONFIG_MII=y diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig index 07f3a23028..4215db4a8f 100644 --- a/configs/mx53cx9020_defconfig +++ b/configs/mx53cx9020_defconfig @@ -25,7 +25,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_FPGA_ALTERA=y CONFIG_FPGA_CYCLON2=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/mx53evk_defconfig b/configs/mx53evk_defconfig index 67582b55ef..ab9e485bc6 100644 --- a/configs/mx53evk_defconfig +++ b/configs/mx53evk_defconfig @@ -14,6 +14,6 @@ CONFIG_CMD_PING=y CONFIG_CMD_DATE=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index 4e161371e3..021e1104e6 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -23,7 +23,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 28540719df..00728ee9eb 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -33,7 +33,7 @@ CONFIG_BOOTCOUNT_EXT=y CONFIG_BOOTCOUNT_BOOTLIMIT=10 CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="0:5" CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_RTC_S35392A=y CONFIG_USB=y diff --git a/configs/mx53smd_defconfig b/configs/mx53smd_defconfig index 3795ff1ef5..f3ec35e50a 100644 --- a/configs/mx53smd_defconfig +++ b/configs/mx53smd_defconfig @@ -14,6 +14,6 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_OF_LIBFDT=y diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig index 506e3a71df..beb3a9224d 100644 --- a/configs/mx6cuboxi_defconfig +++ b/configs/mx6cuboxi_defconfig @@ -32,7 +32,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6dlarm2_defconfig b/configs/mx6dlarm2_defconfig index 4c364bbb78..bb97a2069b 100644 --- a/configs/mx6dlarm2_defconfig +++ b/configs/mx6dlarm2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6dlarm2_lpddr2_defconfig b/configs/mx6dlarm2_lpddr2_defconfig index b8a8c734fe..33698a8273 100644 --- a/configs/mx6dlarm2_lpddr2_defconfig +++ b/configs/mx6dlarm2_lpddr2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6qarm2_defconfig b/configs/mx6qarm2_defconfig index 5127e1f027..bbc22f6413 100644 --- a/configs/mx6qarm2_defconfig +++ b/configs/mx6qarm2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6qarm2_lpddr2_defconfig b/configs/mx6qarm2_lpddr2_defconfig index 184283034c..6847eaf676 100644 --- a/configs/mx6qarm2_lpddr2_defconfig +++ b/configs/mx6qarm2_lpddr2_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MII=y CONFIG_USB=y CONFIG_USB_STORAGE=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 2666340615..f635ed963e 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -34,7 +34,7 @@ CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index f51b5af7ab..cc280561e5 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -59,7 +59,7 @@ CONFIG_DFU_MMC=y CONFIG_DFU_SF=y CONFIG_DM_GPIO=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index ac879a3d20..fbb98a011c 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -72,7 +72,7 @@ CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=2 CONFIG_DM_GPIO=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 44cd50bc6d..1813507d2f 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -34,7 +34,7 @@ CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index 72212fb04b..c434452534 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -34,7 +34,7 @@ CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index bcfeb30910..ecdb552336 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -42,7 +42,7 @@ CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig index ec79468f72..b300818e58 100644 --- a/configs/mx6sllevk_defconfig +++ b/configs/mx6sllevk_defconfig @@ -30,7 +30,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig index dbd3510edb..532919b084 100644 --- a/configs/mx6sllevk_plugin_defconfig +++ b/configs/mx6sllevk_plugin_defconfig @@ -31,7 +31,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index b60e9b6722..a6a6e61a76 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -34,7 +34,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_DM_SPI_FLASH=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 5c0aa635c8..333aaeba65 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -38,7 +38,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig index 0b6bb2286b..8c0be694cf 100644 --- a/configs/mx6sxsabresd_spl_defconfig +++ b/configs/mx6sxsabresd_spl_defconfig @@ -46,7 +46,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PCI=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index 4a3c56faa6..7cd68f3502 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -43,7 +43,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index 185f543df6..e4fd88e781 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -43,7 +43,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index a5a1cb504d..f6db29e854 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -30,7 +30,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_74X164=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index 831b8ccd79..6b79d26c23 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -31,7 +31,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_74X164=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index 380b4af687..52b92a20dd 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -47,7 +47,7 @@ CONFIG_DM_MMC=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS200_SUPPORT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y CONFIG_PHYLIB=y diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig index 81f4538fe2..a1fc4bd024 100644 --- a/configs/mx7dsabresd_qspi_defconfig +++ b/configs/mx7dsabresd_qspi_defconfig @@ -47,7 +47,7 @@ CONFIG_DM_MMC=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS200_SUPPORT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_EON=y diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index 6bbacaa686..cff6c0b563 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -21,7 +21,7 @@ CONFIG_IMX_RGPIO2P=y # CONFIG_MXC_GPIO is not set CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7ULP=y CONFIG_DM_REGULATOR=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index 549ca2e964..2f9e7e9c23 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -20,7 +20,7 @@ CONFIG_IMX_RGPIO2P=y # CONFIG_MXC_GPIO is not set CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7ULP=y CONFIG_DM_REGULATOR=y diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index af59a71d3b..1a3728bc4b 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 9072c04446..1e7732515b 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index b92d27a475..6b0ed43c73 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -38,7 +38,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index 3b8cc6ad2f..3f6ec750db 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -38,7 +38,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DWC_AHSATA=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 36cfe2196c..cafe0d1569 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 40c09d7ab6..b296bc083e 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -36,7 +36,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 4c9c1cb9eb..b8cbf2e5d6 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -41,7 +41,7 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_MMC=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig index 3660eaad61..1ef93bd862 100644 --- a/configs/opos6uldev_defconfig +++ b/configs/opos6uldev_defconfig @@ -67,7 +67,7 @@ CONFIG_SYSCON=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_PWRSEQ=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_FEC_MXC=y diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig index 2825e44db9..8bf82f0555 100644 --- a/configs/ot1200_defconfig +++ b/configs/ot1200_defconfig @@ -31,7 +31,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_CMD_PCA953X=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig index c8c53e8d91..a207ba230d 100644 --- a/configs/ot1200_spl_defconfig +++ b/configs/ot1200_spl_defconfig @@ -40,7 +40,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_CMD_PCA953X=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index e207df51a8..58b4dc13e3 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -29,7 +29,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_PHYLIB=y diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig index af4768f710..78fe0aebcb 100644 --- a/configs/pcm058_defconfig +++ b/configs/pcm058_defconfig @@ -42,7 +42,7 @@ CONFIG_CMD_UBI=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig index 2eb59e4abe..b1ac96639f 100644 --- a/configs/pfla02_defconfig +++ b/configs/pfla02_defconfig @@ -41,7 +41,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:-(nand);spi2.0:1024k(bootloader),64k CONFIG_CMD_UBI=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index 75058f664a..14b51148f3 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -34,7 +34,7 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="imx6ul-phycore-segin" CONFIG_DM_I2C_GPIO=y CONFIG_SYS_I2C_MXC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y CONFIG_NAND=y CONFIG_NAND_MXS=y diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index 4cfef86882..e30d814606 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -44,7 +44,7 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_MII=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index f58d5171ba..6b448c7d23 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -46,7 +46,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x10000000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index edbca4ee14..e903d6c644 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -46,7 +46,7 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_MII=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 7e13923cb4..0587be154a 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -46,7 +46,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x10000000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index 18abf83806..d4ae4073d0 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -44,7 +44,7 @@ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_MII=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index c8ac2ffd5f..90e6513c16 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -46,7 +46,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x10000000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig index edb11996a7..04c688972e 100644 --- a/configs/platinum_picon_defconfig +++ b/configs/platinum_picon_defconfig @@ -46,7 +46,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:14M(spl),2M(uboot),512k(env1),512k(env2),495M(ubi0),14M(res0),2M(res1),512k(res2),512k(res3),-(ubi1)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig index a317ebb355..19893ae0ed 100644 --- a/configs/platinum_titanium_defconfig +++ b/configs/platinum_titanium_defconfig @@ -46,7 +46,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:14M(spl),2M(uboot),512k(env1),512k(env2),-(ubi)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index a9191ad846..d48a524cd3 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -21,7 +21,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/riotboard_spl_defconfig b/configs/riotboard_spl_defconfig index 2298d5b615..310624afcd 100644 --- a/configs/riotboard_spl_defconfig +++ b/configs/riotboard_spl_defconfig @@ -30,7 +30,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y diff --git a/configs/s32v234evb_defconfig b/configs/s32v234evb_defconfig index b18a63b325..2acb660026 100644 --- a/configs/s32v234evb_defconfig +++ b/configs/s32v234evb_defconfig @@ -11,7 +11,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_DM_SERIAL=y CONFIG_FSL_LINFLEXUART=y CONFIG_OF_LIBFDT=y diff --git a/configs/secomx6quq7_defconfig b/configs/secomx6quq7_defconfig index 8526f05fe2..40ca954487 100644 --- a/configs/secomx6quq7_defconfig +++ b/configs/secomx6quq7_defconfig @@ -26,7 +26,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/sksimx6_defconfig b/configs/sksimx6_defconfig index b614f97fc9..160dc9b293 100644 --- a/configs/sksimx6_defconfig +++ b/configs/sksimx6_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 78beb9a522..43ba89a588 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -39,7 +39,7 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PCI=y diff --git a/configs/titanium_defconfig b/configs/titanium_defconfig index 1e19240a05..2816f66c8e 100644 --- a/configs/titanium_defconfig +++ b/configs/titanium_defconfig @@ -34,7 +34,7 @@ CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:16M(uboot),512k(env1),512k(env2),-(ubi)" CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_NAND=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND=y CONFIG_NAND_MXS=y CONFIG_PHYLIB=y diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig index af72877f99..9fcd972da8 100644 --- a/configs/tqma6dl_mba6_mmc_defconfig +++ b/configs/tqma6dl_mba6_mmc_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig index f69189bce9..3117340862 100644 --- a/configs/tqma6dl_mba6_spi_defconfig +++ b/configs/tqma6dl_mba6_spi_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig index 744547bd41..db54cb5f55 100644 --- a/configs/tqma6q_mba6_mmc_defconfig +++ b/configs/tqma6q_mba6_mmc_defconfig @@ -31,7 +31,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index c99301e2d9..8d79e1f134 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig index 8d5f54c864..cfd8f302b4 100644 --- a/configs/tqma6s_mba6_mmc_defconfig +++ b/configs/tqma6s_mba6_mmc_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index 3470a78df5..daa42ef5a9 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y diff --git a/configs/tqma6s_wru4_mmc_defconfig b/configs/tqma6s_wru4_mmc_defconfig index 1a95973ca0..46011bf44f 100644 --- a/configs/tqma6s_wru4_mmc_defconfig +++ b/configs/tqma6s_wru4_mmc_defconfig @@ -59,7 +59,7 @@ CONFIG_LED_STATUS_BIT5=5 CONFIG_LED_STATUS_STATE5=2 CONFIG_LED_STATUS_CMD=y CONFIG_PCA9551_LED=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/ts4800_defconfig b/configs/ts4800_defconfig index e1766bde99..a95b38b731 100644 --- a/configs/ts4800_defconfig +++ b/configs/ts4800_defconfig @@ -15,7 +15,7 @@ CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_SPI=y diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig index a8cec9bb30..4993bcd110 100644 --- a/configs/udoo_defconfig +++ b/configs/udoo_defconfig @@ -28,7 +28,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index eac1dc9aee..e41aa33553 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -27,7 +27,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_MII=y diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig index b1f872405b..29b51234a3 100644 --- a/configs/usbarmory_defconfig +++ b/configs/usbarmory_defconfig @@ -13,6 +13,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_USB=y CONFIG_OF_LIBFDT=y diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index 24f8243300..5f844b4d8f 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -32,7 +32,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_PHYLIB=y diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index 4dc8b82e6a..aaf3bae748 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -32,7 +32,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y CONFIG_DM_GPIO=y CONFIG_VYBRID_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_PHYLIB=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 1f452c10f7..00e01e9deb 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SUPPORT_EMMC_RPMB=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_PCI=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index 5725487446..9f579eb943 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -36,7 +36,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_DM=y CONFIG_DWC_AHSATA=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_DM_THERMAL=y diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig index 6eaf152bac..0798420b9a 100644 --- a/configs/warp7_bl33_defconfig +++ b/configs/warp7_bl33_defconfig @@ -29,7 +29,7 @@ CONFIG_DFU_MMC=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y CONFIG_DM_PMIC=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 28aa06fa59..3a5cffd5ea 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -38,7 +38,7 @@ CONFIG_DFU_MMC=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y CONFIG_DM_PMIC=y diff --git a/configs/warp_defconfig b/configs/warp_defconfig index 0e00253938..a05840acf4 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -29,7 +29,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y # CONFIG_NET is not set CONFIG_DFU_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y diff --git a/configs/woodburn_defconfig b/configs/woodburn_defconfig index a5cc579ce5..17c97bb033 100644 --- a/configs/woodburn_defconfig +++ b/configs/woodburn_defconfig @@ -27,7 +27,7 @@ CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/woodburn_sd_defconfig b/configs/woodburn_sd_defconfig index 00c219f046..a38ba36a05 100644 --- a/configs/woodburn_sd_defconfig +++ b/configs/woodburn_sd_defconfig @@ -38,7 +38,7 @@ CONFIG_EFI_PARTITION=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_IS_IN_FLASH=y CONFIG_MXC_GPIO=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y diff --git a/configs/xpress_defconfig b/configs/xpress_defconfig index 2cbeeb3900..00f2fe30e1 100644 --- a/configs/xpress_defconfig +++ b/configs/xpress_defconfig @@ -25,7 +25,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/xpress_spl_defconfig b/configs/xpress_spl_defconfig index 908d92e96f..80d9b8bbe4 100644 --- a/configs/xpress_spl_defconfig +++ b/configs/xpress_spl_defconfig @@ -35,7 +35,7 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_PHYLIB=y CONFIG_MII=y CONFIG_USB=y diff --git a/configs/zc5202_defconfig b/configs/zc5202_defconfig index cca1f2ddd3..c72e312811 100644 --- a/configs/zc5202_defconfig +++ b/configs/zc5202_defconfig @@ -33,7 +33,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MII=y diff --git a/configs/zc5601_defconfig b/configs/zc5601_defconfig index cfe80b38de..41397ddecd 100644 --- a/configs/zc5601_defconfig +++ b/configs/zc5601_defconfig @@ -32,7 +32,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_FSL_ESDHC=y +CONFIG_FSL_ESDHC_IMX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y From patchwork Thu Mar 21 04:32:34 2019 Content-Type: text/plain; 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Lu" To: "u-boot@lists.denx.de" Thread-Topic: [v2, 4/5] mmc: fsl_esdhc: drop i.MX code Thread-Index: AQHU358aV4eT/mpVTEuzTtI4ZtPn5Q== Date: Thu, 21 Mar 2019 04:32:34 +0000 Message-ID: <20190321043404.1833-5-yangbo.lu@nxp.com> References: <20190321043404.1833-1-yangbo.lu@nxp.com> In-Reply-To: <20190321043404.1833-1-yangbo.lu@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0P153CA0010.APCP153.PROD.OUTLOOK.COM (2603:1096:203:18::22) To VI1PR0401MB2237.eurprd04.prod.outlook.com (2603:10a6:800:28::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yangbo.lu@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: def2292f-7409-409d-5ca7-08d6adb63d08 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(4618075)(2017052603328)(7153060)(7193020); SRVR:VI1PR0401MB2237; x-ms-traffictypediagnostic: VI1PR0401MB2237: x-microsoft-antispam-prvs: x-forefront-prvs: 0983EAD6B2 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(136003)(376002)(396003)(346002)(39860400002)(366004)(199004)(189003)(6916009)(68736007)(2501003)(1076003)(256004)(2906002)(6436002)(2616005)(6486002)(50226002)(476003)(486006)(8936002)(11346002)(4326008)(14444005)(3846002)(6116002)(30864003)(81156014)(81166006)(446003)(52116002)(5660300002)(8676002)(478600001)(76176011)(316002)(86362001)(54906003)(25786009)(105586002)(102836004)(99286004)(97736004)(71200400001)(14454004)(36756003)(66066001)(26005)(305945005)(106356001)(6512007)(5640700003)(2351001)(7736002)(53946003)(6506007)(186003)(71190400001)(386003)(53936002)(579004)(559001); DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR0401MB2237; H:VI1PR0401MB2237.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: GlR+WdScdpICDdPMlGS3f0BdmUM48M5nYcE8m09VKU6jXQzItuvfbICFNGelCzK31cJLXX4SrnnBWN9hlevgQIc7/b5e4AAf6v71bSX74lbwwF+SONqS8i+iR1FTlCWi37qfRvgme9tzxP30X7howfAndHU9KNMGvRvN80s1TX2FfBTrGNcGJXvXEA979ZU6nA4/DzIQR+GhNwxwUARF9bV0Vc4XS45KyKo2JO87jqc8VLfs8mDHfflBrP7TNb5zwfkczM7nIIe94S4eb+7v+foVnCfEJwBC7XaTtxu6DUpmc/s2v8JB1cfnO5Rk2nprGQTuojvjER3KUqkJk+WqCshwTOwlBey8t0Wx0FRl5e340HUTS8Xw19W7xMODxbDF8VG3yDfMMzkzuABcliQfSGBwIB96at6vYydXM87jXaA= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: def2292f-7409-409d-5ca7-08d6adb63d08 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Mar 2019 04:32:34.2928 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0401MB2237 Subject: [U-Boot] [v2, 4/5] mmc: fsl_esdhc: drop i.MX code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Dropped i.MX code which couldn't be reused. Signed-off-by: Yangbo Lu --- Changes for v2: - Added this patch. --- drivers/mmc/fsl_esdhc.c | 576 ++-------------------------------------- include/fsl_esdhc.h | 57 ---- 2 files changed, 15 insertions(+), 618 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 9e34557d16..3f4f75ae4c 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -16,14 +16,11 @@ #include #include #include -#include #include #include #include #include #include -#include -#include DECLARE_GLOBAL_DATA_PTR; @@ -33,8 +30,6 @@ DECLARE_GLOBAL_DATA_PTR; IRQSTATEN_CIE | IRQSTATEN_DTOE | IRQSTATEN_DCE | \ IRQSTATEN_DEBE | IRQSTATEN_BRR | IRQSTATEN_BWR | \ IRQSTATEN_DINT) -#define MAX_TUNING_LOOP 40 - struct fsl_esdhc { uint dsaddr; /* SDMA system address register */ uint blkattr; /* Block attributes register */ @@ -54,37 +49,20 @@ struct fsl_esdhc { uint autoc12err; /* Auto CMD error status register */ uint hostcapblt; /* Host controller capabilities register */ uint wml; /* Watermark level register */ - uint mixctrl; /* For USDHC */ - char reserved1[4]; /* reserved */ + char reserved1[8]; /* reserved */ uint fevt; /* Force event register */ uint admaes; /* ADMA error status register */ uint adsaddr; /* ADMA system address register */ - char reserved2[4]; - uint dllctrl; - uint dllstat; - uint clktunectrlstatus; - char reserved3[4]; - uint strobe_dllctrl; - uint strobe_dllstat; - char reserved4[72]; - uint vendorspec; - uint mmcboot; - uint vendorspec2; - uint tuning_ctrl; /* on i.MX6/7/8 */ - char reserved5[44]; + char reserved2[160]; uint hostver; /* Host controller version register */ - char reserved6[4]; /* reserved */ + char reserved3[4]; /* reserved */ uint dmaerraddr; /* DMA error address register */ - char reserved7[4]; /* reserved */ + char reserved4[4]; /* reserved */ uint dmaerrattr; /* DMA error attribute register */ - char reserved8[4]; /* reserved */ + char reserved5[4]; /* reserved */ uint hostcapblt2; /* Host controller capabilities register 2 */ - char reserved9[8]; /* reserved */ - uint tcr; /* Tuning control register */ - char reserved10[28]; /* reserved */ - uint sddirctl; /* SD direction control register */ - char reserved11[712];/* reserved */ - uint scr; /* eSDHC control register */ + char reserved6[756]; /* reserved */ + uint esdhcctl; /* eSDHC control register */ }; struct fsl_esdhc_plat { @@ -92,11 +70,6 @@ struct fsl_esdhc_plat { struct mmc mmc; }; -struct esdhc_soc_data { - u32 flags; - u32 caps; -}; - /** * struct fsl_esdhc_priv * @@ -109,13 +82,6 @@ struct esdhc_soc_data { * @dev: pointer for the device * @non_removable: 0: removable; 1: non-removable * @wp_enable: 1: enable checking wp; 0: no check - * @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V - * @flags: ESDHC_FLAG_xx in include/fsl_esdhc.h - * @caps: controller capabilities - * @tuning_step: tuning step setting in tuning_ctrl register - * @start_tuning_tap: the start point for tuning in tuning_ctrl register - * @strobe_dll_delay_target: settings in strobe_dllctrl - * @signal_voltage: indicating the current voltage * @cd_gpio: gpio for card detection * @wp_gpio: gpio for write protection */ @@ -124,7 +90,6 @@ struct fsl_esdhc_priv { unsigned int sdhc_clk; struct clk per_clk; unsigned int clock; - unsigned int mode; unsigned int bus_width; #if !CONFIG_IS_ENABLED(BLK) struct mmc *mmc; @@ -132,21 +97,6 @@ struct fsl_esdhc_priv { struct udevice *dev; int non_removable; int wp_enable; - int vs18_enable; - u32 flags; - u32 caps; - u32 tuning_step; - u32 tuning_start_tap; - u32 strobe_dll_delay_target; - u32 signal_voltage; -#if IS_ENABLED(CONFIG_DM_REGULATOR) - struct udevice *vqmmc_dev; - struct udevice *vmmc_dev; -#endif -#ifdef CONFIG_DM_GPIO - struct gpio_desc cd_gpio; - struct gpio_desc wp_gpio; -#endif }; /* Return the XFERTYP flags for a given command and data packet */ @@ -258,8 +208,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_FSL_LAYERSCAPE) dma_addr_t addr; #endif uint wml_value; @@ -272,8 +221,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_FSL_LAYERSCAPE) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -302,8 +250,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_FSL_LAYERSCAPE) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -368,8 +315,7 @@ static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_FSL_LAYERSCAPE) dma_addr_t addr; addr = virt_to_phys((void *)(data->dest)); @@ -459,14 +405,7 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, /* Send the command */ esdhc_write32(®s->cmdarg, cmd->cmdarg); -#if defined(CONFIG_FSL_USDHC) - esdhc_write32(®s->mixctrl, - (esdhc_read32(®s->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F) - | (mmc->ddr_mode ? XFERTYP_DDREN : 0)); - esdhc_write32(®s->xfertyp, xfertyp & 0xFFFF0000); -#else esdhc_write32(®s->xfertyp, xfertyp); -#endif if ((cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK) || (cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200)) @@ -493,15 +432,6 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, goto out; } - /* Switch voltage to 1.8V if CMD11 succeeded */ - if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V) { - esdhc_setbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT); - - printf("Run CMD11 1.8V switch\n"); - /* Sleep for 5 ms - max time for card to switch to 1.8V */ - udelay(5000); - } - /* Workaround for ESDHC errata ENGcm03648 */ if (!data && (cmd->resp_type & MMC_RSP_BUSY)) { int timeout = 6000; @@ -589,10 +519,6 @@ out: while ((esdhc_read32(®s->sysctl) & SYSCTL_RSTD)) ; } - - /* If this was CMD11, then notify that power cycle is needed */ - if (cmd->cmdidx == SD_CMD_SWITCH_UHS18V) - printf("CMD11 to switch to 1.8V mode failed, card requires power cycle.\n"); } esdhc_write32(®s->irqstat, -1); @@ -604,16 +530,7 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) { struct fsl_esdhc *regs = priv->esdhc_regs; int div = 1; -#ifdef ARCH_MXC -#ifdef CONFIG_MX53 - /* For i.MX53 eSDHCv3, SYSCTL.SDCLKFS may not be set to 0. */ - int pre_div = (regs == (struct fsl_esdhc *)MMC_SDHC3_BASE_ADDR) ? 2 : 1; -#else - int pre_div = 1; -#endif -#else int pre_div = 2; -#endif int ddr_pre_div = mmc->ddr_mode ? 2 : 1; int sdhc_clk = priv->sdhc_clk; uint clk; @@ -632,21 +549,13 @@ static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock) clk = (pre_div << 8) | (div << 4); -#ifdef CONFIG_FSL_USDHC - esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN); -#else esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN); -#endif esdhc_clrsetbits32(®s->sysctl, SYSCTL_CLOCK_MASK, clk); udelay(10000); -#ifdef CONFIG_FSL_USDHC - esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | VENDORSPEC_CKEN); -#else esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); -#endif priv->clock = clock; } @@ -680,317 +589,20 @@ static void esdhc_clock_control(struct fsl_esdhc_priv *priv, bool enable) } #endif -#ifdef MMC_SUPPORTS_TUNING -static int esdhc_change_pinstate(struct udevice *dev) -{ - struct fsl_esdhc_priv *priv = dev_get_priv(dev); - int ret; - - switch (priv->mode) { - case UHS_SDR50: - case UHS_DDR50: - ret = pinctrl_select_state(dev, "state_100mhz"); - break; - case UHS_SDR104: - case MMC_HS_200: - case MMC_HS_400: - ret = pinctrl_select_state(dev, "state_200mhz"); - break; - default: - ret = pinctrl_select_state(dev, "default"); - break; - } - - if (ret) - printf("%s %d error\n", __func__, priv->mode); - - return ret; -} - -static void esdhc_reset_tuning(struct mmc *mmc) -{ - struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev); - struct fsl_esdhc *regs = priv->esdhc_regs; - - if (priv->flags & ESDHC_FLAG_USDHC) { - if (priv->flags & ESDHC_FLAG_STD_TUNING) { - esdhc_clrbits32(®s->autoc12err, - MIX_CTRL_SMPCLK_SEL | - MIX_CTRL_EXE_TUNE); - } - } -} - -static void esdhc_set_strobe_dll(struct mmc *mmc) -{ - struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev); - struct fsl_esdhc *regs = priv->esdhc_regs; - u32 val; - - if (priv->clock > ESDHC_STROBE_DLL_CLK_FREQ) { - writel(ESDHC_STROBE_DLL_CTRL_RESET, ®s->strobe_dllctrl); - - /* - * enable strobe dll ctrl and adjust the delay target - * for the uSDHC loopback read clock - */ - val = ESDHC_STROBE_DLL_CTRL_ENABLE | - (priv->strobe_dll_delay_target << - ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT); - writel(val, ®s->strobe_dllctrl); - /* wait 1us to make sure strobe dll status register stable */ - mdelay(1); - val = readl(®s->strobe_dllstat); - if (!(val & ESDHC_STROBE_DLL_STS_REF_LOCK)) - pr_warn("HS400 strobe DLL status REF not lock!\n"); - if (!(val & ESDHC_STROBE_DLL_STS_SLV_LOCK)) - pr_warn("HS400 strobe DLL status SLV not lock!\n"); - } -} - -static int esdhc_set_timing(struct mmc *mmc) -{ - struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev); - struct fsl_esdhc *regs = priv->esdhc_regs; - u32 mixctrl; - - mixctrl = readl(®s->mixctrl); - mixctrl &= ~(MIX_CTRL_DDREN | MIX_CTRL_HS400_EN); - - switch (mmc->selected_mode) { - case MMC_LEGACY: - case SD_LEGACY: - esdhc_reset_tuning(mmc); - writel(mixctrl, ®s->mixctrl); - break; - case MMC_HS_400: - mixctrl |= MIX_CTRL_DDREN | MIX_CTRL_HS400_EN; - writel(mixctrl, ®s->mixctrl); - esdhc_set_strobe_dll(mmc); - break; - case MMC_HS: - case MMC_HS_52: - case MMC_HS_200: - case SD_HS: - case UHS_SDR12: - case UHS_SDR25: - case UHS_SDR50: - case UHS_SDR104: - writel(mixctrl, ®s->mixctrl); - break; - case UHS_DDR50: - case MMC_DDR_52: - mixctrl |= MIX_CTRL_DDREN; - writel(mixctrl, ®s->mixctrl); - break; - default: - printf("Not supported %d\n", mmc->selected_mode); - return -EINVAL; - } - - priv->mode = mmc->selected_mode; - - return esdhc_change_pinstate(mmc->dev); -} - -static int esdhc_set_voltage(struct mmc *mmc) -{ - struct fsl_esdhc_priv *priv = dev_get_priv(mmc->dev); - struct fsl_esdhc *regs = priv->esdhc_regs; - int ret; - - priv->signal_voltage = mmc->signal_voltage; - switch (mmc->signal_voltage) { - case MMC_SIGNAL_VOLTAGE_330: - if (priv->vs18_enable) - return -EIO; -#if CONFIG_IS_ENABLED(DM_REGULATOR) - if (!IS_ERR_OR_NULL(priv->vqmmc_dev)) { - ret = regulator_set_value(priv->vqmmc_dev, 3300000); - if (ret) { - printf("Setting to 3.3V error"); - return -EIO; - } - /* Wait for 5ms */ - mdelay(5); - } -#endif - - esdhc_clrbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT); - if (!(esdhc_read32(®s->vendorspec) & - ESDHC_VENDORSPEC_VSELECT)) - return 0; - - return -EAGAIN; - case MMC_SIGNAL_VOLTAGE_180: -#if CONFIG_IS_ENABLED(DM_REGULATOR) - if (!IS_ERR_OR_NULL(priv->vqmmc_dev)) { - ret = regulator_set_value(priv->vqmmc_dev, 1800000); - if (ret) { - printf("Setting to 1.8V error"); - return -EIO; - } - } -#endif - esdhc_setbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT); - if (esdhc_read32(®s->vendorspec) & ESDHC_VENDORSPEC_VSELECT) - return 0; - - return -EAGAIN; - case MMC_SIGNAL_VOLTAGE_120: - return -ENOTSUPP; - default: - return 0; - } -} - -static void esdhc_stop_tuning(struct mmc *mmc) -{ - struct mmc_cmd cmd; - - cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; - cmd.cmdarg = 0; - cmd.resp_type = MMC_RSP_R1b; - - dm_mmc_send_cmd(mmc->dev, &cmd, NULL); -} - -static int fsl_esdhc_execute_tuning(struct udevice *dev, uint32_t opcode) -{ - struct fsl_esdhc_plat *plat = dev_get_platdata(dev); - struct fsl_esdhc_priv *priv = dev_get_priv(dev); - struct fsl_esdhc *regs = priv->esdhc_regs; - struct mmc *mmc = &plat->mmc; - u32 irqstaten = readl(®s->irqstaten); - u32 irqsigen = readl(®s->irqsigen); - int i, ret = -ETIMEDOUT; - u32 val, mixctrl; - - /* clock tuning is not needed for upto 52MHz */ - if (mmc->clock <= 52000000) - return 0; - - /* This is readw/writew SDHCI_HOST_CONTROL2 when tuning */ - if (priv->flags & ESDHC_FLAG_STD_TUNING) { - val = readl(®s->autoc12err); - mixctrl = readl(®s->mixctrl); - val &= ~MIX_CTRL_SMPCLK_SEL; - mixctrl &= ~(MIX_CTRL_FBCLK_SEL | MIX_CTRL_AUTO_TUNE_EN); - - val |= MIX_CTRL_EXE_TUNE; - mixctrl |= MIX_CTRL_FBCLK_SEL | MIX_CTRL_AUTO_TUNE_EN; - - writel(val, ®s->autoc12err); - writel(mixctrl, ®s->mixctrl); - } - - /* sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE); */ - mixctrl = readl(®s->mixctrl); - mixctrl = MIX_CTRL_DTDSEL_READ | (mixctrl & ~MIX_CTRL_SDHCI_MASK); - writel(mixctrl, ®s->mixctrl); - - writel(IRQSTATEN_BRR, ®s->irqstaten); - writel(IRQSTATEN_BRR, ®s->irqsigen); - - /* - * Issue opcode repeatedly till Execute Tuning is set to 0 or the number - * of loops reaches 40 times. - */ - for (i = 0; i < MAX_TUNING_LOOP; i++) { - u32 ctrl; - - if (opcode == MMC_CMD_SEND_TUNING_BLOCK_HS200) { - if (mmc->bus_width == 8) - writel(0x7080, ®s->blkattr); - else if (mmc->bus_width == 4) - writel(0x7040, ®s->blkattr); - } else { - writel(0x7040, ®s->blkattr); - } - - /* sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE) */ - val = readl(®s->mixctrl); - val = MIX_CTRL_DTDSEL_READ | (val & ~MIX_CTRL_SDHCI_MASK); - writel(val, ®s->mixctrl); - - /* We are using STD tuning, no need to check return value */ - mmc_send_tuning(mmc, opcode, NULL); - - ctrl = readl(®s->autoc12err); - if ((!(ctrl & MIX_CTRL_EXE_TUNE)) && - (ctrl & MIX_CTRL_SMPCLK_SEL)) { - /* - * need to wait some time, make sure sd/mmc fininsh - * send out tuning data, otherwise, the sd/mmc can't - * response to any command when the card still out - * put the tuning data. - */ - mdelay(1); - ret = 0; - break; - } - - /* Add 1ms delay for SD and eMMC */ - mdelay(1); - } - - writel(irqstaten, ®s->irqstaten); - writel(irqsigen, ®s->irqsigen); - - esdhc_stop_tuning(mmc); - - return ret; -} -#endif - static int esdhc_set_ios_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) { struct fsl_esdhc *regs = priv->esdhc_regs; - int ret __maybe_unused; #ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK /* Select to use peripheral clock */ esdhc_clock_control(priv, false); - esdhc_setbits32(®s->scr, ESDHCCTL_PCS); + esdhc_setbits32(®s->esdhcctl, ESDHCCTL_PCS); esdhc_clock_control(priv, true); #endif /* Set the clock speed */ if (priv->clock != mmc->clock) set_sysctl(priv, mmc, mmc->clock); -#ifdef MMC_SUPPORTS_TUNING - if (mmc->clk_disable) { -#ifdef CONFIG_FSL_USDHC - esdhc_clrbits32(®s->vendorspec, VENDORSPEC_CKEN); -#else - esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN); -#endif - } else { -#ifdef CONFIG_FSL_USDHC - esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | - VENDORSPEC_CKEN); -#else - esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_CKEN); -#endif - } - - if (priv->mode != mmc->selected_mode) { - ret = esdhc_set_timing(mmc); - if (ret) { - printf("esdhc_set_timing error %d\n", ret); - return ret; - } - } - - if (priv->signal_voltage != mmc->signal_voltage) { - ret = esdhc_set_voltage(mmc); - if (ret) { - printf("esdhc_set_voltage error %d\n", ret); - return ret; - } - } -#endif - /* Set the bus width */ esdhc_clrbits32(®s->proctl, PROCTL_DTW_4 | PROCTL_DTW_8); @@ -1017,34 +629,10 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) return -ETIMEDOUT; } -#if defined(CONFIG_FSL_USDHC) - /* RSTA doesn't reset MMC_BOOT register, so manually reset it */ - esdhc_write32(®s->mmcboot, 0x0); - /* Reset MIX_CTRL and CLK_TUNE_CTRL_STATUS regs to 0 */ - esdhc_write32(®s->mixctrl, 0x0); - esdhc_write32(®s->clktunectrlstatus, 0x0); - - /* Put VEND_SPEC to default value */ - if (priv->vs18_enable) - esdhc_write32(®s->vendorspec, (VENDORSPEC_INIT | - ESDHC_VENDORSPEC_VSELECT)); - else - esdhc_write32(®s->vendorspec, VENDORSPEC_INIT); - - /* Disable DLL_CTRL delay line */ - esdhc_write32(®s->dllctrl, 0x0); -#endif - -#ifndef ARCH_MXC /* Enable cache snooping */ - esdhc_write32(®s->scr, 0x00000040); -#endif + esdhc_write32(®s->esdhcctl, 0x00000040); -#ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN); -#else - esdhc_setbits32(®s->vendorspec, VENDORSPEC_HCKEN | VENDORSPEC_IPGEN); -#endif /* Set the initial clock speed */ mmc_set_clock(mmc, 400000, MMC_CLK_ENABLE); @@ -1078,10 +666,6 @@ static int esdhc_getcd_common(struct fsl_esdhc_priv *priv) #if CONFIG_IS_ENABLED(DM_MMC) if (priv->non_removable) return 1; -#ifdef CONFIG_DM_GPIO - if (dm_gpio_is_valid(&priv->cd_gpio)) - return dm_gpio_get_value(&priv->cd_gpio); -#endif #endif while (!(esdhc_read32(®s->prsstat) & PRSSTAT_CINS) && --timeout) @@ -1170,20 +754,8 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD); #endif -#ifndef CONFIG_FSL_USDHC - esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN - | SYSCTL_IPGEN | SYSCTL_CKEN); - /* Clearing tuning bits in case ROM has set it already */ - esdhc_write32(®s->mixctrl, 0); - esdhc_write32(®s->autoc12err, 0); - esdhc_write32(®s->clktunectrlstatus, 0); -#else - esdhc_setbits32(®s->vendorspec, VENDORSPEC_PEREN | - VENDORSPEC_HCKEN | VENDORSPEC_IPGEN | VENDORSPEC_CKEN); -#endif - - if (priv->vs18_enable) - esdhc_setbits32(®s->vendorspec, ESDHC_VENDORSPEC_VSELECT); + esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | + SYSCTL_IPGEN | SYSCTL_CKEN); writel(SDHCI_IRQ_EN_BITS, ®s->irqstaten); cfg = &plat->cfg; @@ -1259,27 +831,11 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, cfg->host_caps &= ~MMC_MODE_8BIT; #endif - cfg->host_caps |= priv->caps; - cfg->f_min = 400000; cfg->f_max = min(priv->sdhc_clk, (u32)200000000); cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; - writel(0, ®s->dllctrl); - if (priv->flags & ESDHC_FLAG_USDHC) { - if (priv->flags & ESDHC_FLAG_STD_TUNING) { - u32 val = readl(®s->tuning_ctrl); - - val |= ESDHC_STD_TUNING_EN; - val &= ~ESDHC_TUNING_START_TAP_MASK; - val |= priv->tuning_start_tap; - val &= ~ESDHC_TUNING_STEP_MASK; - val |= (priv->tuning_step) << ESDHC_TUNING_STEP_SHIFT; - writel(val, ®s->tuning_ctrl); - } - } - return 0; } @@ -1294,7 +850,6 @@ static int fsl_esdhc_cfg_to_priv(struct fsl_esdhc_cfg *cfg, priv->bus_width = cfg->max_bus_width; priv->sdhc_clk = cfg->sdhc_clk; priv->wp_enable = cfg->wp_enable; - priv->vs18_enable = cfg->vs18_enable; return 0; }; @@ -1429,22 +984,11 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) #if CONFIG_IS_ENABLED(DM_MMC) #include -__weak void init_clk_usdhc(u32 index) -{ -} - static int fsl_esdhc_probe(struct udevice *dev) { struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct fsl_esdhc_plat *plat = dev_get_platdata(dev); struct fsl_esdhc_priv *priv = dev_get_priv(dev); - const void *fdt = gd->fdt_blob; - int node = dev_of_offset(dev); - struct esdhc_soc_data *data = - (struct esdhc_soc_data *)dev_get_driver_data(dev); -#if CONFIG_IS_ENABLED(DM_REGULATOR) - struct udevice *vqmmc_dev; -#endif fdt_addr_t addr; unsigned int val; struct mmc *mmc; @@ -1456,11 +1000,6 @@ static int fsl_esdhc_probe(struct udevice *dev) priv->esdhc_regs = (struct fsl_esdhc *)addr; priv->dev = dev; - priv->mode = -1; - if (data) { - priv->flags = data->flags; - priv->caps = data->caps; - } val = dev_read_u32_default(dev, "bus-width", -1); if (val == 8) @@ -1470,81 +1009,14 @@ static int fsl_esdhc_probe(struct udevice *dev) else priv->bus_width = 1; - val = fdtdec_get_int(fdt, node, "fsl,tuning-step", 1); - priv->tuning_step = val; - val = fdtdec_get_int(fdt, node, "fsl,tuning-start-tap", - ESDHC_TUNING_START_TAP_DEFAULT); - priv->tuning_start_tap = val; - val = fdtdec_get_int(fdt, node, "fsl,strobe-dll-delay-target", - ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT); - priv->strobe_dll_delay_target = val; - if (dev_read_bool(dev, "non-removable")) { priv->non_removable = 1; } else { priv->non_removable = 0; -#ifdef CONFIG_DM_GPIO - gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, - GPIOD_IS_IN); -#endif } priv->wp_enable = 1; -#ifdef CONFIG_DM_GPIO - ret = gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, - GPIOD_IS_IN); - if (ret) - priv->wp_enable = 0; -#endif - - priv->vs18_enable = 0; - -#if CONFIG_IS_ENABLED(DM_REGULATOR) - /* - * If emmc I/O has a fixed voltage at 1.8V, this must be provided, - * otherwise, emmc will work abnormally. - */ - ret = device_get_supply_regulator(dev, "vqmmc-supply", &vqmmc_dev); - if (ret) { - dev_dbg(dev, "no vqmmc-supply\n"); - } else { - ret = regulator_set_enable(vqmmc_dev, true); - if (ret) { - dev_err(dev, "fail to enable vqmmc-supply\n"); - return ret; - } - - if (regulator_get_value(vqmmc_dev) == 1800000) - priv->vs18_enable = 1; - } -#endif - - if (fdt_get_property(fdt, node, "no-1-8-v", NULL)) - priv->caps &= ~(UHS_CAPS | MMC_MODE_HS200 | MMC_MODE_HS400); - - /* - * TODO: - * Because lack of clk driver, if SDHC clk is not enabled, - * need to enable it first before this driver is invoked. - * - * we use MXC_ESDHC_CLK to get clk freq. - * If one would like to make this function work, - * the aliases should be provided in dts as this: - * - * aliases { - * mmc0 = &usdhc1; - * mmc1 = &usdhc2; - * mmc2 = &usdhc3; - * mmc3 = &usdhc4; - * }; - * Then if your board only supports mmc2 and mmc3, but we can - * correctly get the seq as 2 and 3, then let mxc_get_clock - * work as expected. - */ - - init_clk_usdhc(dev->seq); - if (IS_ENABLED(CONFIG_CLK)) { /* Assigned clock already set clock */ ret = clk_get_by_name(dev, "per", &priv->per_clk); @@ -1610,28 +1082,10 @@ static const struct dm_mmc_ops fsl_esdhc_ops = { .get_cd = fsl_esdhc_get_cd, .send_cmd = fsl_esdhc_send_cmd, .set_ios = fsl_esdhc_set_ios, -#ifdef MMC_SUPPORTS_TUNING - .execute_tuning = fsl_esdhc_execute_tuning, -#endif }; #endif -static struct esdhc_soc_data usdhc_imx7d_data = { - .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING - | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200 - | ESDHC_FLAG_HS400, - .caps = UHS_CAPS | MMC_MODE_HS200 | MMC_MODE_DDR_52MHz | - MMC_MODE_HS_52MHz | MMC_MODE_HS, -}; - static const struct udevice_id fsl_esdhc_ids[] = { - { .compatible = "fsl,imx53-esdhc", }, - { .compatible = "fsl,imx6ul-usdhc", }, - { .compatible = "fsl,imx6sx-usdhc", }, - { .compatible = "fsl,imx6sl-usdhc", }, - { .compatible = "fsl,imx6q-usdhc", }, - { .compatible = "fsl,imx7d-usdhc", .data = (ulong)&usdhc_imx7d_data,}, - { .compatible = "fsl,imx7ulp-usdhc", }, { .compatible = "fsl,esdhc", }, { /* sentinel */ } }; diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 8dbd5249a7..7d7e946ab3 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -9,7 +9,6 @@ #ifndef __FSL_ESDHC_H__ #define __FSL_ESDHC_H__ -#include #include #include @@ -25,22 +24,14 @@ #define SYSCTL_INITA 0x08000000 #define SYSCTL_TIMEOUT_MASK 0x000f0000 #define SYSCTL_CLOCK_MASK 0x0000fff0 -#if !defined(CONFIG_FSL_USDHC) #define SYSCTL_CKEN 0x00000008 #define SYSCTL_PEREN 0x00000004 #define SYSCTL_HCKEN 0x00000002 #define SYSCTL_IPGEN 0x00000001 -#endif #define SYSCTL_RSTA 0x01000000 #define SYSCTL_RSTC 0x02000000 #define SYSCTL_RSTD 0x04000000 -#define VENDORSPEC_CKEN 0x00004000 -#define VENDORSPEC_PEREN 0x00002000 -#define VENDORSPEC_HCKEN 0x00001000 -#define VENDORSPEC_IPGEN 0x00000800 -#define VENDORSPEC_INIT 0x20007809 - #define IRQSTAT 0x0002e030 #define IRQSTAT_DMAE (0x10000000) #define IRQSTAT_AC12E (0x01000000) @@ -172,54 +163,6 @@ #define ESDHC_HOSTCAPBLT_DMAS 0x00400000 #define ESDHC_HOSTCAPBLT_HSS 0x00200000 -#define ESDHC_VENDORSPEC_VSELECT 0x00000002 /* Use 1.8V */ - -/* Imported from Linux Kernel drivers/mmc/host/sdhci-esdhc-imx.c */ -#define MIX_CTRL_DDREN BIT(3) -#define MIX_CTRL_DTDSEL_READ BIT(4) -#define MIX_CTRL_AC23EN BIT(7) -#define MIX_CTRL_EXE_TUNE BIT(22) -#define MIX_CTRL_SMPCLK_SEL BIT(23) -#define MIX_CTRL_AUTO_TUNE_EN BIT(24) -#define MIX_CTRL_FBCLK_SEL BIT(25) -#define MIX_CTRL_HS400_EN BIT(26) -#define MIX_CTRL_HS400_ES BIT(27) -/* Bits 3 and 6 are not SDHCI standard definitions */ -#define MIX_CTRL_SDHCI_MASK 0xb7 -/* Tuning bits */ -#define MIX_CTRL_TUNING_MASK 0x03c00000 - -/* strobe dll register */ -#define ESDHC_STROBE_DLL_CTRL 0x70 -#define ESDHC_STROBE_DLL_CTRL_ENABLE BIT(0) -#define ESDHC_STROBE_DLL_CTRL_RESET BIT(1) -#define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT 0x7 -#define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT 3 - -#define ESDHC_STROBE_DLL_STATUS 0x74 -#define ESDHC_STROBE_DLL_STS_REF_LOCK BIT(1) -#define ESDHC_STROBE_DLL_STS_SLV_LOCK 0x1 -#define ESDHC_STROBE_DLL_CLK_FREQ 100000000 - -#define ESDHC_STD_TUNING_EN BIT(24) -/* NOTE: the minimum valid tuning start tap for mx6sl is 1 */ -#define ESDHC_TUNING_START_TAP_DEFAULT 0x1 -#define ESDHC_TUNING_START_TAP_MASK 0xff -#define ESDHC_TUNING_STEP_MASK 0x00070000 -#define ESDHC_TUNING_STEP_SHIFT 16 - -#define ESDHC_FLAG_MULTIBLK_NO_INT BIT(1) -#define ESDHC_FLAG_ENGCM07207 BIT(2) -#define ESDHC_FLAG_USDHC BIT(3) -#define ESDHC_FLAG_MAN_TUNING BIT(4) -#define ESDHC_FLAG_STD_TUNING BIT(5) -#define ESDHC_FLAG_HAVE_CAP1 BIT(6) -#define ESDHC_FLAG_ERR004536 BIT(7) -#define ESDHC_FLAG_HS200 BIT(8) -#define ESDHC_FLAG_HS400 BIT(9) -#define ESDHC_FLAG_ERR010450 BIT(10) -#define ESDHC_FLAG_HS400_ES BIT(11) - struct fsl_esdhc_cfg { phys_addr_t esdhc_base; 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Lu" To: "u-boot@lists.denx.de" Thread-Topic: [v2, 5/5] mmc: fsl_esdhc_imx: drop useless code Thread-Index: AQHU358c2pUyn3zu20WfggjpFk6/Fw== Date: Thu, 21 Mar 2019 04:32:36 +0000 Message-ID: <20190321043404.1833-6-yangbo.lu@nxp.com> References: <20190321043404.1833-1-yangbo.lu@nxp.com> In-Reply-To: <20190321043404.1833-1-yangbo.lu@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0P153CA0010.APCP153.PROD.OUTLOOK.COM (2603:1096:203:18::22) To VI1PR0401MB2237.eurprd04.prod.outlook.com (2603:10a6:800:28::18) authentication-results: spf=none (sender IP is ) smtp.mailfrom=yangbo.lu@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-mailer: git-send-email 2.17.1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 7e068aae-9765-4b61-811c-08d6adb63e94 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; PCL:0; RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600127)(711020)(4605104)(4618075)(2017052603328)(7153060)(7193020); SRVR:VI1PR0401MB2237; x-ms-traffictypediagnostic: VI1PR0401MB2237: x-microsoft-antispam-prvs: x-forefront-prvs: 0983EAD6B2 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(136003)(376002)(396003)(346002)(39860400002)(366004)(199004)(189003)(6916009)(68736007)(2501003)(1076003)(256004)(2906002)(6436002)(2616005)(6486002)(50226002)(476003)(486006)(8936002)(11346002)(4326008)(14444005)(3846002)(6116002)(81156014)(81166006)(446003)(52116002)(5660300002)(8676002)(478600001)(76176011)(316002)(86362001)(54906003)(25786009)(105586002)(102836004)(99286004)(97736004)(71200400001)(14454004)(36756003)(66066001)(26005)(305945005)(106356001)(6512007)(5640700003)(2351001)(7736002)(6506007)(186003)(71190400001)(386003)(53936002); DIR:OUT; SFP:1101; SCL:1; SRVR:VI1PR0401MB2237; H:VI1PR0401MB2237.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: gM93a7xTVs90m2Exz9pBbW57AfBXANCl+1uJGj435uJLtcyPRW3fxG1PHesqgA4lGeKP5ydXtbBDgsuT17gDXAdhBIJhlmXkXgn3//GF5X5dfyOA32D/pU69Glle5YsOR+uKYh8EaPtyCZsnVGrEvWxlSuw/u2/nzjZtqEVKOH22US/D1L4kbAVXk9QatzIght+PHy7qhHCErCWT1wrfjAkzuMMZIZW+ZAYSHfIQV59K56A7tR6JMyXjNCMpNFnP3oGzuMnf/H2kIAaNcTAM0ASYvetvr8TaHlu0sqNpGUeJs+LlVhUzK69YZBQqZb+p+bDF9SFOWFLIZ3+u830cWzE9EBnSSQgzd3DdU9tehNX2bYw1MiGKFHSNq5v2MW1eLQBPUd3phoFSnpS3EU3hVVdI4nIpPrQnEd2YlfKJw9I= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7e068aae-9765-4b61-811c-08d6adb63e94 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Mar 2019 04:32:36.8449 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0401MB2237 Subject: [U-Boot] [v2, 5/5] mmc: fsl_esdhc_imx: drop useless code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Dropped useless code for i.MX eSDHC driver. Signed-off-by: Yangbo Lu --- Changes for v2: - Added this patch. --- drivers/mmc/fsl_esdhc_imx.c | 96 ++----------------------------------- include/fsl_esdhc_imx.h | 4 -- 2 files changed, 4 insertions(+), 96 deletions(-) diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index a031c628ea..596542bec4 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -259,8 +259,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, { int timeout; struct fsl_esdhc *regs = priv->esdhc_regs; -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) dma_addr_t addr; #endif uint wml_value; @@ -273,8 +272,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->dest)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -303,8 +301,7 @@ static int esdhc_setup_data(struct fsl_esdhc_priv *priv, struct mmc *mmc, esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK, wml_value << 16); #ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) addr = virt_to_phys((void *)(data->src)); if (upper_32_bits(addr)) printf("Error found for upper 32 bits\n"); @@ -369,8 +366,7 @@ static void check_and_invalidate_dcache_range unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); -#if defined(CONFIG_FSL_LAYERSCAPE) || defined(CONFIG_S32V234) || \ - defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) +#if defined(CONFIG_S32V234) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M) dma_addr_t addr; addr = virt_to_phys((void *)(data->dest)); @@ -385,25 +381,6 @@ static void check_and_invalidate_dcache_range invalidate_dcache_range(start, end); } -#ifdef CONFIG_MCF5441x -/* - * Swaps 32-bit words to little-endian byte order. - */ -static inline void sd_swap_dma_buff(struct mmc_data *data) -{ - int i, size = data->blocksize >> 2; - u32 *buffer = (u32 *)data->dest; - u32 sw; - - while (data->blocks--) { - for (i = 0; i < size; i++) { - sw = __sw32(*buffer); - *buffer++ = sw; - } - } -} -#endif - /* * Sends a command out on the bus. Takes the mmc pointer, * a command pointer, and an optional data pointer. @@ -568,9 +545,6 @@ static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc, */ if (data->flags & MMC_DATA_READ) { check_and_invalidate_dcache_range(cmd, data); -#ifdef CONFIG_MCF5441x - sd_swap_dma_buff(data); -#endif } #endif } @@ -1053,12 +1027,8 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc) /* Disable the BRR and BWR bits in IRQSTAT */ esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR); -#ifdef CONFIG_MCF5441x - esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD); -#else /* Put the PROCTL reg back to the default */ esdhc_write32(®s->proctl, PROCTL_INIT); -#endif /* Set timout to the maximum value */ esdhc_clrsetbits32(®s->sysctl, SYSCTL_TIMEOUT_MASK, 14 << 16); @@ -1166,11 +1136,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, if (ret) return ret; -#ifdef CONFIG_MCF5441x - /* ColdFire, using SDHC_DATA[3] for card detection */ - esdhc_write32(®s->proctl, PROCTL_INIT | PROCTL_D3CD); -#endif - #ifndef CONFIG_FSL_USDHC esdhc_setbits32(®s->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN | SYSCTL_IPGEN | SYSCTL_CKEN); @@ -1195,15 +1160,6 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv, voltage_caps = 0; caps = esdhc_read32(®s->hostcapblt); -#ifdef CONFIG_MCF5441x - /* - * MCF5441x RM declares in more points that sdhc clock speed must - * never exceed 25 Mhz. From this, the HS bit needs to be disabled - * from host capabilities. - */ - caps &= ~ESDHC_HOSTCAPBLT_HSS; -#endif - #ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30); @@ -1355,45 +1311,6 @@ int fsl_esdhc_mmc_init(bd_t *bis) } #endif -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -void mmc_adapter_card_type_ident(void) -{ - u8 card_id; - u8 value; - - card_id = QIXIS_READ(present) & QIXIS_SDID_MASK; - gd->arch.sdhc_adapter = card_id; - - switch (card_id) { - case QIXIS_ESDHC_ADAPTER_TYPE_EMMC45: - value = QIXIS_READ(brdcfg[5]); - value |= (QIXIS_DAT4 | QIXIS_DAT5_6_7); - QIXIS_WRITE(brdcfg[5], value); - break; - case QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY: - value = QIXIS_READ(pwr_ctl[1]); - value |= QIXIS_EVDD_BY_SDHC_VS; - QIXIS_WRITE(pwr_ctl[1], value); - break; - case QIXIS_ESDHC_ADAPTER_TYPE_EMMC44: - value = QIXIS_READ(brdcfg[5]); - value |= (QIXIS_SDCLKIN | QIXIS_SDCLKOUT); - QIXIS_WRITE(brdcfg[5], value); - break; - case QIXIS_ESDHC_ADAPTER_TYPE_RSV: - break; - case QIXIS_ESDHC_ADAPTER_TYPE_MMC: - break; - case QIXIS_ESDHC_ADAPTER_TYPE_SD: - break; - case QIXIS_ESDHC_NO_ADAPTER: - break; - default: - break; - } -} -#endif - #ifdef CONFIG_OF_LIBFDT __weak int esdhc_status_fixup(void *blob, const char *compat) { @@ -1421,10 +1338,6 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, compat, "clock-frequency", gd->arch.sdhc_clk, 1); #endif -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT - do_fixup_by_compat_u32(blob, compat, "adapter-type", - (u32)(gd->arch.sdhc_adapter), 1); -#endif } #endif @@ -1633,7 +1546,6 @@ static const struct udevice_id fsl_esdhc_ids[] = { { .compatible = "fsl,imx6q-usdhc", }, { .compatible = "fsl,imx7d-usdhc", .data = (ulong)&usdhc_imx7d_data,}, { .compatible = "fsl,imx7ulp-usdhc", }, - { .compatible = "fsl,esdhc", }, { /* sentinel */ } }; diff --git a/include/fsl_esdhc_imx.h b/include/fsl_esdhc_imx.h index e05b24e7e8..8abd28ea50 100644 --- a/include/fsl_esdhc_imx.h +++ b/include/fsl_esdhc_imx.h @@ -17,10 +17,6 @@ /* needed for the mmc_cfg definition */ #include -#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT -#include "../board/freescale/common/qixis.h" -#endif - /* FSL eSDHC-specific constants */ #define SYSCTL 0x0002e02c #define SYSCTL_INITA 0x08000000