From patchwork Fri Feb 22 23:37:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Chevallier X-Patchwork-Id: 1047180 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 445np36fWBz9sC1 for ; Sat, 23 Feb 2019 10:38:03 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727553AbfBVXh7 (ORCPT ); Fri, 22 Feb 2019 18:37:59 -0500 Received: from relay3-d.mail.gandi.net ([217.70.183.195]:59431 "EHLO relay3-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725774AbfBVXh6 (ORCPT ); Fri, 22 Feb 2019 18:37:58 -0500 X-Originating-IP: 86.201.231.99 Received: from mc-bl-xps13.lan (lfbn-tou-1-149-99.w86-201.abo.wanadoo.fr [86.201.231.99]) (Authenticated sender: maxime.chevallier@bootlin.com) by relay3-d.mail.gandi.net (Postfix) with ESMTPSA id 1F5606000D; Fri, 22 Feb 2019 23:37:52 +0000 (UTC) From: Maxime Chevallier To: davem@davemloft.net Cc: Maxime Chevallier , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Lunn , Florian Fainelli , Heiner Kallweit , Russell King , linux-arm-kernel@lists.infradead.org, Antoine Tenart , thomas.petazzoni@bootlin.com, gregory.clement@bootlin.com, miquel.raynal@bootlin.com, nadavh@marvell.com, stefanc@marvell.com, mw@semihalf.com Subject: [PATCH net-next v2 1/7] net: phy: marvell10g: Use get_features to get the PHY abilities Date: Sat, 23 Feb 2019 00:37:38 +0100 Message-Id: <20190222233744.25735-2-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190222233744.25735-1-maxime.chevallier@bootlin.com> References: <20190222233744.25735-1-maxime.chevallier@bootlin.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The Alaska family of 10G PHYs has more abilities than the ones listed in PHY_10GBIT_FULL_FEATURES, the exact list depending on the model. Make use of the newly introduced .get_features call to build this list, using genphy_c45_pma_read_abilities to build the list of supported linkmodes, and adding autoneg ability based on what's reported by the AN MMD. .config_init is still used to validate the interface_mode. Signed-off-by: Maxime Chevallier Reviewed-by: Andrew Lunn --- V2: Added missing blank line drivers/net/phy/marvell10g.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c index 586ae1bc5a50..89920b10d75b 100644 --- a/drivers/net/phy/marvell10g.c +++ b/drivers/net/phy/marvell10g.c @@ -233,8 +233,6 @@ static int mv3310_resume(struct phy_device *phydev) static int mv3310_config_init(struct phy_device *phydev) { - int ret, val; - /* Check that the PHY interface type is compatible */ if (phydev->interface != PHY_INTERFACE_MODE_SGMII && phydev->interface != PHY_INTERFACE_MODE_XAUI && @@ -242,6 +240,13 @@ static int mv3310_config_init(struct phy_device *phydev) phydev->interface != PHY_INTERFACE_MODE_10GKR) return -ENODEV; + return 0; +} + +static int mv3310_get_features(struct phy_device *phydev) +{ + int ret, val; + if (phydev->c45_ids.devices_in_package & MDIO_DEVS_AN) { val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); if (val < 0) @@ -416,7 +421,7 @@ static struct phy_driver mv3310_drivers[] = { .phy_id = 0x002b09aa, .phy_id_mask = MARVELL_PHY_ID_MASK, .name = "mv88x3310", - .features = PHY_10GBIT_FEATURES, + .get_features = mv3310_get_features, .soft_reset = gen10g_no_soft_reset, .config_init = mv3310_config_init, .probe = mv3310_probe, From patchwork Fri Feb 22 23:37:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Chevallier X-Patchwork-Id: 1047181 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 445np93rccz9sDn for ; Sat, 23 Feb 2019 10:38:09 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727599AbfBVXiF (ORCPT ); Fri, 22 Feb 2019 18:38:05 -0500 Received: from relay3-d.mail.gandi.net ([217.70.183.195]:49513 "EHLO relay3-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725774AbfBVXiE (ORCPT ); Fri, 22 Feb 2019 18:38:04 -0500 X-Originating-IP: 86.201.231.99 Received: from mc-bl-xps13.lan (lfbn-tou-1-149-99.w86-201.abo.wanadoo.fr [86.201.231.99]) (Authenticated sender: maxime.chevallier@bootlin.com) by relay3-d.mail.gandi.net (Postfix) with ESMTPSA id BC19060008; Fri, 22 Feb 2019 23:37:57 +0000 (UTC) From: Maxime Chevallier To: davem@davemloft.net Cc: Maxime Chevallier , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Lunn , Florian Fainelli , Heiner Kallweit , Russell King , linux-arm-kernel@lists.infradead.org, Antoine Tenart , thomas.petazzoni@bootlin.com, gregory.clement@bootlin.com, miquel.raynal@bootlin.com, nadavh@marvell.com, stefanc@marvell.com, mw@semihalf.com Subject: [PATCH net-next v2 2/7] net: phy: marvell10g: Use linkmode_set_bit helper instead of __set_bit Date: Sat, 23 Feb 2019 00:37:39 +0100 Message-Id: <20190222233744.25735-3-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190222233744.25735-1-maxime.chevallier@bootlin.com> References: <20190222233744.25735-1-maxime.chevallier@bootlin.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Cosmetic patch making use of helpers dedicated to linkmodes handling. Signed-off-by: Maxime Chevallier Reviewed-by: Andrew Lunn --- drivers/net/phy/marvell10g.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c index 89920b10d75b..821ef1b2f8cc 100644 --- a/drivers/net/phy/marvell10g.c +++ b/drivers/net/phy/marvell10g.c @@ -253,8 +253,8 @@ static int mv3310_get_features(struct phy_device *phydev) return val; if (val & MDIO_AN_STAT1_ABLE) - __set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, - phydev->supported); + linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, + phydev->supported); } ret = genphy_c45_pma_read_abilities(phydev); From patchwork Fri Feb 22 23:37:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Chevallier X-Patchwork-Id: 1047183 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 445npF4vJnz9sBr for ; Sat, 23 Feb 2019 10:38:13 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727624AbfBVXiK (ORCPT ); Fri, 22 Feb 2019 18:38:10 -0500 Received: from relay3-d.mail.gandi.net ([217.70.183.195]:46855 "EHLO relay3-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725774AbfBVXiI (ORCPT ); Fri, 22 Feb 2019 18:38:08 -0500 X-Originating-IP: 86.201.231.99 Received: from mc-bl-xps13.lan (lfbn-tou-1-149-99.w86-201.abo.wanadoo.fr [86.201.231.99]) (Authenticated sender: maxime.chevallier@bootlin.com) by relay3-d.mail.gandi.net (Postfix) with ESMTPSA id EA7426000F; Fri, 22 Feb 2019 23:38:02 +0000 (UTC) From: Maxime Chevallier To: davem@davemloft.net Cc: Maxime Chevallier , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Lunn , Florian Fainelli , Heiner Kallweit , Russell King , linux-arm-kernel@lists.infradead.org, Antoine Tenart , thomas.petazzoni@bootlin.com, gregory.clement@bootlin.com, miquel.raynal@bootlin.com, nadavh@marvell.com, stefanc@marvell.com, mw@semihalf.com Subject: [PATCH net-next v2 3/7] net: phy: marvell10g: Use 2500BASEX when using 2.5GBASET Date: Sat, 23 Feb 2019 00:37:40 +0100 Message-Id: <20190222233744.25735-4-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190222233744.25735-1-maxime.chevallier@bootlin.com> References: <20190222233744.25735-1-maxime.chevallier@bootlin.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The Marvell Alaska family of PHYs supports 2.5GBaseT and 5GBaseT modes, as defined in the 802.3bz specification. Upon establishing a 2.5GBASET link, the PHY will reconfigure it's MII interface to 2500BASEX. At 5G, the PHY will reconfigure it's interface to 5GBASE-R, but this mode isn't supported by any MAC for now. This was tested with : - The 88X3310, which is on the MacchiatoBin - The 88E2010, an Alaska PHY that has no fiber interfaces, and is limited to 5G maximum speed. Signed-off-by: Maxime Chevallier Reviewed-by: Andrew Lunn --- drivers/net/phy/marvell10g.c | 26 +++++++++++++++++++------- 1 file changed, 19 insertions(+), 7 deletions(-) diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c index 821ef1b2f8cc..9342d8c2ff7f 100644 --- a/drivers/net/phy/marvell10g.c +++ b/drivers/net/phy/marvell10g.c @@ -235,6 +235,7 @@ static int mv3310_config_init(struct phy_device *phydev) { /* Check that the PHY interface type is compatible */ if (phydev->interface != PHY_INTERFACE_MODE_SGMII && + phydev->interface != PHY_INTERFACE_MODE_2500BASEX && phydev->interface != PHY_INTERFACE_MODE_XAUI && phydev->interface != PHY_INTERFACE_MODE_RXAUI && phydev->interface != PHY_INTERFACE_MODE_10GKR) @@ -313,18 +314,29 @@ static int mv3310_aneg_done(struct phy_device *phydev) static void mv3310_update_interface(struct phy_device *phydev) { if ((phydev->interface == PHY_INTERFACE_MODE_SGMII || + phydev->interface == PHY_INTERFACE_MODE_2500BASEX || phydev->interface == PHY_INTERFACE_MODE_10GKR) && phydev->link) { /* The PHY automatically switches its serdes interface (and - * active PHYXS instance) between Cisco SGMII and 10GBase-KR - * modes according to the speed. Florian suggests setting - * phydev->interface to communicate this to the MAC. Only do - * this if we are already in either SGMII or 10GBase-KR mode. + * active PHYXS instance) between Cisco SGMII, 10GBase-KR and + * 2500BaseX modes according to the speed. Florian suggests + * setting phydev->interface to communicate this to the MAC. + * Only do this if we are already in one of the above modes. */ - if (phydev->speed == SPEED_10000) + switch (phydev->speed) { + case SPEED_10000: phydev->interface = PHY_INTERFACE_MODE_10GKR; - else if (phydev->speed >= SPEED_10 && - phydev->speed < SPEED_10000) + break; + case SPEED_2500: + phydev->interface = PHY_INTERFACE_MODE_2500BASEX; + break; + case SPEED_1000: + case SPEED_100: + case SPEED_10: phydev->interface = PHY_INTERFACE_MODE_SGMII; + break; + default: + break; + } } } From patchwork Fri Feb 22 23:37:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Chevallier X-Patchwork-Id: 1047184 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 445npH6pM4z9sBr for ; Sat, 23 Feb 2019 10:38:15 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727656AbfBVXiP (ORCPT ); Fri, 22 Feb 2019 18:38:15 -0500 Received: from relay3-d.mail.gandi.net ([217.70.183.195]:37189 "EHLO relay3-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725774AbfBVXiN (ORCPT ); Fri, 22 Feb 2019 18:38:13 -0500 X-Originating-IP: 86.201.231.99 Received: from mc-bl-xps13.lan (lfbn-tou-1-149-99.w86-201.abo.wanadoo.fr [86.201.231.99]) (Authenticated sender: maxime.chevallier@bootlin.com) by relay3-d.mail.gandi.net (Postfix) with ESMTPSA id 978B260008; Fri, 22 Feb 2019 23:38:07 +0000 (UTC) From: Maxime Chevallier To: davem@davemloft.net Cc: Maxime Chevallier , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Lunn , Florian Fainelli , Heiner Kallweit , Russell King , linux-arm-kernel@lists.infradead.org, Antoine Tenart , thomas.petazzoni@bootlin.com, gregory.clement@bootlin.com, miquel.raynal@bootlin.com, nadavh@marvell.com, stefanc@marvell.com, mw@semihalf.com Subject: [PATCH net-next v2 4/7] net: phy: marvell10g: Use a #define for 88X3310 family id Date: Sat, 23 Feb 2019 00:37:41 +0100 Message-Id: <20190222233744.25735-5-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190222233744.25735-1-maxime.chevallier@bootlin.com> References: <20190222233744.25735-1-maxime.chevallier@bootlin.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The PHY ID corresponding to the 88X3310 is also used for other PHYs in the same family, such as the 88E2010. Use a #define for the PHY id, that ignores the last nibble. Signed-off-by: Maxime Chevallier Reviewed-by: Andrew Lunn --- drivers/net/phy/marvell10g.c | 4 ++-- include/linux/marvell_phy.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c index 9342d8c2ff7f..9c0b8f16cec5 100644 --- a/drivers/net/phy/marvell10g.c +++ b/drivers/net/phy/marvell10g.c @@ -430,7 +430,7 @@ static int mv3310_read_status(struct phy_device *phydev) static struct phy_driver mv3310_drivers[] = { { - .phy_id = 0x002b09aa, + .phy_id = MARVELL_PHY_ID_88X3310, .phy_id_mask = MARVELL_PHY_ID_MASK, .name = "mv88x3310", .get_features = mv3310_get_features, @@ -448,7 +448,7 @@ static struct phy_driver mv3310_drivers[] = { module_phy_driver(mv3310_drivers); static struct mdio_device_id __maybe_unused mv3310_tbl[] = { - { 0x002b09aa, MARVELL_PHY_ID_MASK }, + { MARVELL_PHY_ID_88X3310, MARVELL_PHY_ID_MASK }, { }, }; MODULE_DEVICE_TABLE(mdio, mv3310_tbl); diff --git a/include/linux/marvell_phy.h b/include/linux/marvell_phy.h index 1eb6f244588d..70c17345e118 100644 --- a/include/linux/marvell_phy.h +++ b/include/linux/marvell_phy.h @@ -20,6 +20,7 @@ #define MARVELL_PHY_ID_88E1540 0x01410eb0 #define MARVELL_PHY_ID_88E1545 0x01410ea0 #define MARVELL_PHY_ID_88E3016 0x01410e60 +#define MARVELL_PHY_ID_88X3310 0x002b09a0 /* The MV88e6390 Ethernet switch contains embedded PHYs. These PHYs do * not have a model ID. So the switch driver traps reads to the ID2 From patchwork Fri Feb 22 23:37:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Chevallier X-Patchwork-Id: 1047185 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 445npR3CzTz9s1B for ; Sat, 23 Feb 2019 10:38:23 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727699AbfBVXiT (ORCPT ); Fri, 22 Feb 2019 18:38:19 -0500 Received: from relay3-d.mail.gandi.net ([217.70.183.195]:58745 "EHLO relay3-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725774AbfBVXiS (ORCPT ); Fri, 22 Feb 2019 18:38:18 -0500 X-Originating-IP: 86.201.231.99 Received: from mc-bl-xps13.lan (lfbn-tou-1-149-99.w86-201.abo.wanadoo.fr [86.201.231.99]) (Authenticated sender: maxime.chevallier@bootlin.com) by relay3-d.mail.gandi.net (Postfix) with ESMTPSA id C1C2B6000D; Fri, 22 Feb 2019 23:38:12 +0000 (UTC) From: Maxime Chevallier To: davem@davemloft.net Cc: Maxime Chevallier , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Lunn , Florian Fainelli , Heiner Kallweit , Russell King , linux-arm-kernel@lists.infradead.org, Antoine Tenart , thomas.petazzoni@bootlin.com, gregory.clement@bootlin.com, miquel.raynal@bootlin.com, nadavh@marvell.com, stefanc@marvell.com, mw@semihalf.com Subject: [PATCH net-next v2 5/7] net: phy: marvell10g: Force reading of 2.5/5G Date: Sat, 23 Feb 2019 00:37:42 +0100 Message-Id: <20190222233744.25735-6-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190222233744.25735-1-maxime.chevallier@bootlin.com> References: <20190222233744.25735-1-maxime.chevallier@bootlin.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org As per 802.3bz, if bit 14 of (1.11) "PMA Extended Abilities" indicates whether or not we should read register (1.21) "2.52/5G PMA Extended Abilities", which contains information on the support of 2.5GBASET and 5GBASET. After testing on several variants of PHYS of this family, it appears that bit 14 in (1.11) isn't always set when it should be. PHYs 88X3310 (on MacchiatoBin) and 88E2010 do support 2.5G and 5GBASET, but don't have 1.11.14 set. Their register 1.21 is filled with the correct values, indicating 2.5G and 5G support. PHYs 88E2110 do have their 1.11.14 bit set, as it should. Signed-off-by: Maxime Chevallier Reviewed-by: Andrew Lunn --- drivers/net/phy/marvell10g.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c index 9c0b8f16cec5..8f354c3f3876 100644 --- a/drivers/net/phy/marvell10g.c +++ b/drivers/net/phy/marvell10g.c @@ -27,6 +27,9 @@ #include #include +#define MV_PHY_ALASKA_NBT_QUIRK_MASK 0xfffffffe +#define MV_PHY_ALASKA_NBT_QUIRK_REV (MARVELL_PHY_ID_88X3310 | 0xa) + enum { MV_PCS_BASE_T = 0x0000, MV_PCS_BASE_R = 0x1000, @@ -231,6 +234,23 @@ static int mv3310_resume(struct phy_device *phydev) return mv3310_hwmon_config(phydev, true); } +/* Some PHYs in the Alaska family such as the 88X3310 and the 88E2010 + * don't set bit 14 in PMA Extended Abilities (1.11), although they do + * support 2.5GBASET and 5GBASET. For these models, we can still read their + * 2.5G/5G extended abilities register (1.21). We detect these models based on + * the PMA device identifier, with a mask matching models known to have this + * issue + */ +static bool mv3310_has_pma_ngbaset_quirk(struct phy_device *phydev) +{ + if (!(phydev->c45_ids.devices_in_package & MDIO_DEVS_PMAPMD)) + return false; + + /* Only some revisions of the 88X3310 family PMA seem to be impacted */ + return (phydev->c45_ids.device_ids[MDIO_MMD_PMAPMD] & + MV_PHY_ALASKA_NBT_QUIRK_MASK) == MV_PHY_ALASKA_NBT_QUIRK_REV; +} + static int mv3310_config_init(struct phy_device *phydev) { /* Check that the PHY interface type is compatible */ @@ -262,6 +282,21 @@ static int mv3310_get_features(struct phy_device *phydev) if (ret) return ret; + if (mv3310_has_pma_ngbaset_quirk(phydev)) { + val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, + MDIO_PMA_NG_EXTABLE); + if (val < 0) + return val; + + linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, + phydev->supported, + val & MDIO_PMA_NG_EXTABLE_2_5GBT); + + linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, + phydev->supported, + val & MDIO_PMA_NG_EXTABLE_5GBT); + } + return 0; } From patchwork Fri Feb 22 23:37:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Chevallier X-Patchwork-Id: 1047186 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 445npY3tDCz9sC1 for ; Sat, 23 Feb 2019 10:38:29 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727726AbfBVXiY (ORCPT ); Fri, 22 Feb 2019 18:38:24 -0500 Received: from relay3-d.mail.gandi.net ([217.70.183.195]:59205 "EHLO relay3-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725774AbfBVXiX (ORCPT ); Fri, 22 Feb 2019 18:38:23 -0500 X-Originating-IP: 86.201.231.99 Received: from mc-bl-xps13.lan (lfbn-tou-1-149-99.w86-201.abo.wanadoo.fr [86.201.231.99]) (Authenticated sender: maxime.chevallier@bootlin.com) by relay3-d.mail.gandi.net (Postfix) with ESMTPSA id 15FE760009; Fri, 22 Feb 2019 23:38:16 +0000 (UTC) From: Maxime Chevallier To: davem@davemloft.net Cc: Maxime Chevallier , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Lunn , Florian Fainelli , Heiner Kallweit , Russell King , linux-arm-kernel@lists.infradead.org, Antoine Tenart , thomas.petazzoni@bootlin.com, gregory.clement@bootlin.com, miquel.raynal@bootlin.com, nadavh@marvell.com, stefanc@marvell.com, mw@semihalf.com Subject: [PATCH net-next v2 6/7] net: mvpp2: Add 2.5GBaseT support Date: Sat, 23 Feb 2019 00:37:43 +0100 Message-Id: <20190222233744.25735-7-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190222233744.25735-1-maxime.chevallier@bootlin.com> References: <20190222233744.25735-1-maxime.chevallier@bootlin.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The PPv2 controller is able to support 2.5G speeds, allowing to use 2.5GBASET in conjunction with PHYs that use 2500BASEX as their MII interface when using this mode. Signed-off-by: Maxime Chevallier Reviewed-by: Andrew Lunn --- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c index 191d9ce85b7e..6638a3339efc 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c @@ -4403,6 +4403,7 @@ static void mvpp2_phylink_validate(struct net_device *dev, case PHY_INTERFACE_MODE_2500BASEX: phylink_set(mask, 1000baseT_Full); phylink_set(mask, 1000baseX_Full); + phylink_set(mask, 2500baseT_Full); phylink_set(mask, 2500baseX_Full); break; default: From patchwork Fri Feb 22 23:37:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Chevallier X-Patchwork-Id: 1047187 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 445npd2z8dz9sC1 for ; Sat, 23 Feb 2019 10:38:33 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727763AbfBVXi3 (ORCPT ); Fri, 22 Feb 2019 18:38:29 -0500 Received: from relay3-d.mail.gandi.net ([217.70.183.195]:40545 "EHLO relay3-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725774AbfBVXi0 (ORCPT ); Fri, 22 Feb 2019 18:38:26 -0500 X-Originating-IP: 86.201.231.99 Received: from mc-bl-xps13.lan (lfbn-tou-1-149-99.w86-201.abo.wanadoo.fr [86.201.231.99]) (Authenticated sender: maxime.chevallier@bootlin.com) by relay3-d.mail.gandi.net (Postfix) with ESMTPSA id EFED86000E; Fri, 22 Feb 2019 23:38:21 +0000 (UTC) From: Maxime Chevallier To: davem@davemloft.net Cc: Maxime Chevallier , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Andrew Lunn , Florian Fainelli , Heiner Kallweit , Russell King , linux-arm-kernel@lists.infradead.org, Antoine Tenart , thomas.petazzoni@bootlin.com, gregory.clement@bootlin.com, miquel.raynal@bootlin.com, nadavh@marvell.com, stefanc@marvell.com, mw@semihalf.com Subject: [PATCH net-next v2 7/7] net: phy: marvell10g: add support for the 88x2110 PHY Date: Sat, 23 Feb 2019 00:37:44 +0100 Message-Id: <20190222233744.25735-8-maxime.chevallier@bootlin.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190222233744.25735-1-maxime.chevallier@bootlin.com> References: <20190222233744.25735-1-maxime.chevallier@bootlin.com> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch adds support for the 88x2110 PHY, which is similar to the already supported 88x3310 PHY without the SFP interface. It supports 10/100/1000BASET along with 2.5GBASET, 5GBASET and 10GBASET, with the same interface modes that are used by the 3310. This PHY don't have the same issue as the 88x3310 regarding 2.5/5G abilities, and correctly follows the 802.3bz standard to list the supported abilities. Signed-off-by: Maxime Chevallier Suggested-by: Antoine Tenart Reviewed-by: Andrew Lunn --- drivers/net/phy/marvell10g.c | 13 +++++++++++++ include/linux/marvell_phy.h | 1 + 2 files changed, 14 insertions(+) diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c index 8f354c3f3876..580e91deadbc 100644 --- a/drivers/net/phy/marvell10g.c +++ b/drivers/net/phy/marvell10g.c @@ -478,12 +478,25 @@ static struct phy_driver mv3310_drivers[] = { .aneg_done = mv3310_aneg_done, .read_status = mv3310_read_status, }, + { + .phy_id = MARVELL_PHY_ID_88E2110, + .phy_id_mask = MARVELL_PHY_ID_MASK, + .name = "mv88x2110", + .features = PHY_10GBIT_FEATURES, + .probe = mv3310_probe, + .soft_reset = gen10g_no_soft_reset, + .config_init = mv3310_config_init, + .config_aneg = mv3310_config_aneg, + .aneg_done = mv3310_aneg_done, + .read_status = mv3310_read_status, + }, }; module_phy_driver(mv3310_drivers); static struct mdio_device_id __maybe_unused mv3310_tbl[] = { { MARVELL_PHY_ID_88X3310, MARVELL_PHY_ID_MASK }, + { MARVELL_PHY_ID_88E2110, MARVELL_PHY_ID_MASK }, { }, }; MODULE_DEVICE_TABLE(mdio, mv3310_tbl); diff --git a/include/linux/marvell_phy.h b/include/linux/marvell_phy.h index 70c17345e118..73d04743a2bb 100644 --- a/include/linux/marvell_phy.h +++ b/include/linux/marvell_phy.h @@ -21,6 +21,7 @@ #define MARVELL_PHY_ID_88E1545 0x01410ea0 #define MARVELL_PHY_ID_88E3016 0x01410e60 #define MARVELL_PHY_ID_88X3310 0x002b09a0 +#define MARVELL_PHY_ID_88E2110 0x002b09b0 /* The MV88e6390 Ethernet switch contains embedded PHYs. These PHYs do * not have a model ID. So the switch driver traps reads to the ID2