From patchwork Thu Feb 21 23:10:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Thiago Macieira X-Patchwork-Id: 1046497 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-496845-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="CIuDJ78/"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4459Dk4BN3z9s9T for ; Fri, 22 Feb 2019 10:10:30 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type :content-transfer-encoding; q=dns; s=default; b=V3WXgf1wGcdIkZVP YBhhPLtGmOYLaqB6iK424C5L7F7K3oPiefgde5XLm6TuIO21jOAPDKel2zWyhngw 8TNUx3qLTlOMqhbLR2sOEigTtUnKHkGRCad69OpzHrsTgP9yccSTrmJqeKndIQx6 9riQLD9vLy6So7LGAMX8QKtv8+g= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type :content-transfer-encoding; s=default; bh=x5AEChVTjFPPVqQpN1lrHI fOTIg=; b=CIuDJ78/htGOm7ZmMMwoYMFjWQ6e0Cu9HsAOK2pSfUsiPob+f25KWH qrtXxtUX6OygCwyuYDuvgdqy3X0KO1Zl0f2wrERoGn4Tb3yAjrpfvlJykvd+HVBf AT10XqWNx6YTKxY6vW0nH4smiubHwgjPXl9z+/sfZzWa08HCVJfoo= Received: (qmail 51273 invoked by alias); 21 Feb 2019 23:10:22 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 50084 invoked by uid 89); 21 Feb 2019 23:10:22 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY autolearn=ham version=3.3.2 spammy=generations X-HELO: mga05.intel.com Received: from mga05.intel.com (HELO mga05.intel.com) (192.55.52.43) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 21 Feb 2019 23:10:20 +0000 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Feb 2019 15:10:19 -0800 Received: from tjmaciei-desk.jf.intel.com (HELO tjmaciei-ctnr.jf.intel.com) ([10.54.75.9]) by fmsmga002.fm.intel.com with ESMTP; 21 Feb 2019 15:10:19 -0800 From: Thiago Macieira To: gcc-patches@gcc.gnu.org Cc: hjl.tools@gmail.com, =?utf-8?q?Martin_Li=C5=A1ka?= , Uros Bizjak Subject: [PATCH] x86: (Reapply) Move AESNI generation to Skylake and Goldmont Date: Thu, 21 Feb 2019 15:10:18 -0800 Message-Id: <20190221231018.378240-1-thiago.macieira@intel.com> MIME-Version: 1.0 This is a repeat of commit r263989, which commit r264052 accidentally reverted. Original commit message: The instruction set first appeared with Westmere, but not all processors in that and the next few generations have the instructions. According to Wikipedia[1], the first generation in which all SKUs have AES instructions are Skylake and Goldmont. I can't find any Skylake, Kabylake, Kabylake-R or Cannon Lake currently listed at https://ark.intel.com that says "Intel® AES New Instructions" "No". [1] https://en.wikipedia.org/wiki/AES_instruction_set 2018-08-30 Thiago Macieira * config/i386/i386.c (PTA_WESTMERE): Remove PTA_AES. (PTA_SKYLAKE): Add PTA_AES. (PTA_GOLDMONT): Likewise. --- gcc/config/i386/i386.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 4fd8bc40a34..2cb16d9fbf6 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -2360,7 +2360,7 @@ const wide_int_bitmask PTA_CORE2 = PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3 | PTA_CX16 | PTA_FXSR; const wide_int_bitmask PTA_NEHALEM = PTA_CORE2 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_POPCNT; -const wide_int_bitmask PTA_WESTMERE = PTA_NEHALEM | PTA_AES | PTA_PCLMUL; +const wide_int_bitmask PTA_WESTMERE = PTA_NEHALEM | PTA_PCLMUL; const wide_int_bitmask PTA_SANDYBRIDGE = PTA_WESTMERE | PTA_AVX | PTA_XSAVE | PTA_XSAVEOPT; const wide_int_bitmask PTA_IVYBRIDGE = PTA_SANDYBRIDGE | PTA_FSGSBASE @@ -2369,7 +2369,7 @@ const wide_int_bitmask PTA_HASWELL = PTA_IVYBRIDGE | PTA_AVX2 | PTA_BMI | PTA_BMI2 | PTA_LZCNT | PTA_FMA | PTA_MOVBE | PTA_HLE; const wide_int_bitmask PTA_BROADWELL = PTA_HASWELL | PTA_ADX | PTA_PRFCHW | PTA_RDSEED; -const wide_int_bitmask PTA_SKYLAKE = PTA_BROADWELL | PTA_CLFLUSHOPT +const wide_int_bitmask PTA_SKYLAKE = PTA_BROADWELL | PTA_AES | PTA_CLFLUSHOPT | PTA_XSAVEC | PTA_XSAVES | PTA_SGX; const wide_int_bitmask PTA_SKYLAKE_AVX512 = PTA_SKYLAKE | PTA_AVX512F | PTA_AVX512CD | PTA_AVX512VL | PTA_AVX512BW | PTA_AVX512DQ | PTA_PKU @@ -2387,7 +2387,7 @@ const wide_int_bitmask PTA_KNL = PTA_BROADWELL | PTA_AVX512PF | PTA_AVX512ER | PTA_AVX512F | PTA_AVX512CD; const wide_int_bitmask PTA_BONNELL = PTA_CORE2 | PTA_MOVBE; const wide_int_bitmask PTA_SILVERMONT = PTA_WESTMERE | PTA_MOVBE | PTA_RDRND; -const wide_int_bitmask PTA_GOLDMONT = PTA_SILVERMONT | PTA_SHA | PTA_XSAVE +const wide_int_bitmask PTA_GOLDMONT = PTA_SILVERMONT | PTA_AES | PTA_SHA | PTA_XSAVE | PTA_RDSEED | PTA_XSAVEC | PTA_XSAVES | PTA_CLFLUSHOPT | PTA_XSAVEOPT | PTA_FSGSBASE; const wide_int_bitmask PTA_GOLDMONT_PLUS = PTA_GOLDMONT | PTA_RDPID