From patchwork Thu Jan 24 20:22:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lina Iyer X-Patchwork-Id: 1030670 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=codeaurora.org header.i=@codeaurora.org header.b="VgiaJCZf"; dkim=pass (1024-bit key) header.d=codeaurora.org header.i=@codeaurora.org header.b="IR+lyG3q"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43ltqk3348z9s3q for ; Fri, 25 Jan 2019 07:22:26 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727587AbfAXUWZ (ORCPT ); Thu, 24 Jan 2019 15:22:25 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:53162 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726040AbfAXUWY (ORCPT ); Thu, 24 Jan 2019 15:22:24 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id F0BC260D06; Thu, 24 Jan 2019 20:22:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1548361343; bh=xCNFJvpJoucdMcv9Mi45On077kDW81gZ9ob80pgMpYw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VgiaJCZfP49HzysGFrCQnON4Pr50SDv3yHa/uULOdSGdCvHkoo1eMblE0niz9Qw7q RoeaVRFWokYMgNKmeBgdJQ/tOnXFfeA6bKz9XG77SCsZUcqDtUEaCEkjqmjEP79MKG vps4jvuYh3lvlI2BnAR/fcj0T31HR/y41AURByjA= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_INVALID, DKIM_SIGNED autolearn=no autolearn_force=no version=3.4.0 Received: from codeaurora.org (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: ilina@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 677E560C55; Thu, 24 Jan 2019 20:22:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1548361337; bh=xCNFJvpJoucdMcv9Mi45On077kDW81gZ9ob80pgMpYw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IR+lyG3q+J6iK/G+ePQ+h4u+6iuD6JaL5cuLe16Q2nDVpRdsjCX8yDZgtDlgzDL8P s+6c5Q7iiTQ2mXNiHH6XCWz7+oOEfWqqyUa0tt7BO5oYTFIk3DxYcGJp+utpjl06dt cDazQT3NbzKrqTr64L7Cxjd8vyHFdYcyqANU1QAk= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 677E560C55 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=ilina@codeaurora.org From: Lina Iyer To: swboyd@chromium.org, evgreen@chromium.org, marc.zyngier@arm.com Cc: linux-kernel@vger.kernel.org, rplsssn@codeaurora.org, linux-arm-msm@vger.kernel.org, thierry.reding@gmail.com, bjorn.andersson@linaro.org, dianders@chromium.org, linus.walleij@linaro.org, Lina Iyer , devicetree@vger.kernel.org Subject: [PATCH v2 4/8] dt-bindings: sdm845-pinctrl: add wakeup interrupt parent for GPIO Date: Thu, 24 Jan 2019 13:22:01 -0700 Message-Id: <20190124202205.7940-5-ilina@codeaurora.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190124202205.7940-1-ilina@codeaurora.org> References: <20190124202205.7940-1-ilina@codeaurora.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SDM845 SoC has an always-on interrupt controller (PDC) with select GPIO routed to the PDC as interrupts that can be used to wake the system up from deep low power modes and suspend. Cc: devicetree@vger.kernel.org Signed-off-by: Lina Iyer --- .../devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt index 665aadb5ea28..f0fedbc5d41a 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt @@ -29,6 +29,11 @@ SDM845 platform. Definition: must be 2. Specifying the pin number and flags, as defined in +- wakeup-parent: + Usage: optional + Value type: + Definition: A phandle to the wakeup interrupt controller for the SoC. + - gpio-controller: Usage: required Value type: @@ -53,7 +58,6 @@ pin, a group, or a list of pins or groups. This configuration can include the mux function to select on those pin(s)/group(s), and various pin configuration parameters, such as pull-up, drive strength, etc. - PIN CONFIGURATION NODES: The name of each subnode is not important; all subnodes should be enumerated @@ -160,6 +164,7 @@ Example: #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + wake-parent = <&pdc_intc>; qup9_active: qup9-active { mux {