From patchwork Wed Jan 23 06:56:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Zhang X-Patchwork-Id: 1029705 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="qBFQoxR5"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43kx0R1zvxz9s7T for ; Wed, 23 Jan 2019 17:56:39 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726029AbfAWG4i (ORCPT ); Wed, 23 Jan 2019 01:56:38 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:1716 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726026AbfAWG4i (ORCPT ); Wed, 23 Jan 2019 01:56:38 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 22 Jan 2019 22:56:12 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 22 Jan 2019 22:56:36 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 22 Jan 2019 22:56:36 -0800 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 23 Jan 2019 06:56:36 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Wed, 23 Jan 2019 06:56:36 +0000 Received: from localhost.localdomain (Not Verified[10.19.225.143]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Tue, 22 Jan 2019 22:56:35 -0800 From: Mark Zhang To: , CC: , Mark Zhang , Laxman Dewangan , Venkat Reddy Talla Subject: [PATCH 1/2] mfd: max77620: Add backup battery charger support Date: Wed, 23 Jan 2019 14:56:19 +0800 Message-ID: <20190123065620.22250-1-markz@nvidia.com> X-Mailer: git-send-email 2.19.2 MIME-Version: 1.0 X-NVConfidentiality: public DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1548226572; bh=OUDyElPhiPwMVEx8CTwkTQaz+hQEf3MSZtYJeqdam4Y=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: MIME-Version:X-NVConfidentiality:Content-Transfer-Encoding: Content-Type; b=qBFQoxR51Ya/f9CpnaojvqgGkffohWJO3vHFzQqkjnCuTzdwYpSdWIWEQHxKD+kI3 zSHsbjXvQo0tkAB+OP5jFOYUCoKszhuBNCzWs8MHoJULDQ7mYX8zFGR54vDWh5624h SkoGd6OXVzZupXOLXS0YDz9Kd1zVzUXFm1nEXK6TkX8ZfGXEz5a7HlQVuQ12NcESmL FnE55NN3AgXkEAzOhAiP77wtenjJhhWAXrzwMlLBU1QnlGLfFpfZkrrN2VNPdpSvG2 INW+lq1Cl/+UdAK0PI42XVCYSxQSnel0T/5oG91ZsETJHbWtlbvWudjQKMhTw9X468 BZ4U2ymLhOHsQ== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Add PMIC configurations for backup battery charger, which is a constant voltage and constant current style charger with a series output resistance. The max77620 register CNFGBBC(addr: 0x04) defines the parameters of backup battery charger. This patch adds support for it. Signed-off-by: Laxman Dewangan Signed-off-by: Venkat Reddy Talla Signed-off-by: Mark Zhang --- drivers/mfd/max77620.c | 80 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/drivers/mfd/max77620.c b/drivers/mfd/max77620.c index d8ddd1a6f304..f58143103185 100644 --- a/drivers/mfd/max77620.c +++ b/drivers/mfd/max77620.c @@ -398,6 +398,82 @@ static int max77620_initialise_fps(struct max77620_chip *chip) return 0; } +static int max77620_init_backup_battery_charging(struct max77620_chip *chip) +{ + struct device *dev = chip->dev; + struct device_node *np; + u32 pval; + u8 config; + int charging_current; + int charging_voltage; + int resistor; + int ret; + + np = of_get_child_by_name(dev->of_node, "backup-battery"); + if (!np) { + dev_info(dev, "Backup battery charging support disabled\n"); + ret = regmap_update_bits(chip->rmap, MAX77620_REG_CNFGBBC, + MAX77620_CNFGBBC_ENABLE, 0); + if (ret < 0) + dev_err(dev, "Failed to update CNFGBBC: %d\n", ret); + return ret; + } + + ret = of_property_read_u32(np, + "maxim,backup-battery-charging-current", &pval); + charging_current = (!ret) ? pval : 50; + + ret = of_property_read_u32(np, + "maxim,backup-battery-charging-voltage", &pval); + charging_voltage = (!ret) ? pval : 2500000; + charging_voltage /= 1000; + + ret = of_property_read_u32(np, + "maxim,backup-battery-output-resister", &pval); + resistor = (!ret) ? pval : 1000; + + config = MAX77620_CNFGBBC_ENABLE; + if (charging_current <= 50) + config |= 0 << MAX77620_CNFGBBC_CURRENT_SHIFT; + else if (charging_current <= 100) + config |= 3 << MAX77620_CNFGBBC_CURRENT_SHIFT; + else if (charging_current <= 200) + config |= 0 << MAX77620_CNFGBBC_CURRENT_SHIFT; + else if (charging_current <= 400) + config |= 3 << MAX77620_CNFGBBC_CURRENT_SHIFT; + else if (charging_current <= 600) + config |= 1 << MAX77620_CNFGBBC_CURRENT_SHIFT; + else + config |= 2 << MAX77620_CNFGBBC_CURRENT_SHIFT; + + if (charging_current > 100) + config |= MAX77620_CNFGBBC_LOW_CURRENT_DISABLE; + + if (charging_voltage <= 2500) + config |= 0 << MAX77620_CNFGBBC_VOLTAGE_SHIFT; + else if (charging_voltage <= 3000) + config |= 1 << MAX77620_CNFGBBC_VOLTAGE_SHIFT; + else if (charging_voltage <= 3300) + config |= 2 << MAX77620_CNFGBBC_VOLTAGE_SHIFT; + else + config |= 3 << MAX77620_CNFGBBC_VOLTAGE_SHIFT; + + if (resistor <= 100) + config |= 0 << MAX77620_CNFGBBC_RESISTOR_SHIFT; + else if (resistor <= 1000) + config |= 1 << MAX77620_CNFGBBC_RESISTOR_SHIFT; + else if (resistor <= 3000) + config |= 2 << MAX77620_CNFGBBC_RESISTOR_SHIFT; + else if (resistor <= 6000) + config |= 3 << MAX77620_CNFGBBC_RESISTOR_SHIFT; + + ret = regmap_write(chip->rmap, MAX77620_REG_CNFGBBC, config); + if (ret < 0) + dev_err(dev, "Reg 0x%02x write failed, %d\n", + MAX77620_REG_CNFGBBC, ret); + return ret; +} + static int max77620_read_es_version(struct max77620_chip *chip) { unsigned int val; @@ -483,6 +559,10 @@ static int max77620_probe(struct i2c_client *client, if (ret < 0) return ret; + ret = max77620_init_backup_battery_charging(chip); + if (ret < 0) + return ret; + ret = devm_mfd_add_devices(chip->dev, PLATFORM_DEVID_NONE, mfd_cells, n_mfd_cells, NULL, 0, regmap_irq_get_domain(chip->top_irq_data)); From patchwork Wed Jan 23 06:56:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Zhang X-Patchwork-Id: 1029706 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="rmDXFUZT"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43kx0c087Sz9s4s for ; Wed, 23 Jan 2019 17:56:48 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726175AbfAWG4m (ORCPT ); Wed, 23 Jan 2019 01:56:42 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:7568 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726026AbfAWG4j (ORCPT ); Wed, 23 Jan 2019 01:56:39 -0500 Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 22 Jan 2019 22:56:03 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Tue, 22 Jan 2019 22:56:38 -0800 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Tue, 22 Jan 2019 22:56:38 -0800 Received: from HQMAIL103.nvidia.com (172.20.187.11) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 23 Jan 2019 06:56:38 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Wed, 23 Jan 2019 06:56:38 +0000 Received: from localhost.localdomain (Not Verified[10.19.225.143]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Tue, 22 Jan 2019 22:56:38 -0800 From: Mark Zhang To: , CC: , Mark Zhang , Laxman Dewangan , Venkat Reddy Talla Subject: [PATCH 2/2] mfd: max77620: Add low battery monitor support Date: Wed, 23 Jan 2019 14:56:20 +0800 Message-ID: <20190123065620.22250-2-markz@nvidia.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190123065620.22250-1-markz@nvidia.com> References: <20190123065620.22250-1-markz@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1548226563; bh=BgG6FUugC1CevREJ1krBzbps1BGj7dMGa+3M+zudQjU=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:MIME-Version:X-NVConfidentiality: Content-Transfer-Encoding:Content-Type; b=rmDXFUZTgBkuTV6djIUC6vCbyQgV3cQPkoCjBWdrnd6Q0MXjviYVj1xCZyaHCGFxu Py9Xz5myAWfZB9VhuUFq1fnOBnxH2WZbwBXzWHR3m8bDdKkSmG/+iQ7Gjfwls/tGx0 xRaGvP2bgFxtKZY302Dovwmwcg1ThgSoX7NBfloHemIXhtpFbKfH9j4iNl9/eQO+zd Hal5OL0hTkF8o5DDxT2qWaCxIL5u7l1PtIr5/VVSLDo1t1IjcFnZuqUDUZQhH/pZgX 73k+VXmUPIPeKtEoWcBBhjSU49hd/9xFs7geq2s9pTFarRCWRnawbjYblDr0498gdZ LVQ+sJZmmm/6A== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This patch adds PMIC configurations for low-battery monitoring by handling max77620 register CNFGGLBL1. Signed-off-by: Laxman Dewangan Signed-off-by: Venkat Reddy Talla Signed-off-by: Mark Zhang --- drivers/mfd/max77620.c | 57 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 56 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/max77620.c b/drivers/mfd/max77620.c index f58143103185..9e50d145afd8 100644 --- a/drivers/mfd/max77620.c +++ b/drivers/mfd/max77620.c @@ -474,6 +474,57 @@ static int max77620_init_backup_battery_charging(struct max77620_chip *chip) return ret; } +static int max77620_init_low_battery_monitor(struct max77620_chip *chip) +{ + struct device *dev = chip->dev; + struct device_node *np; + bool pval; + u8 mask = 0; + u8 val = 0; + int ret; + + np = of_get_child_by_name(dev->of_node, "low-battery-monitor"); + if (!np) { + dev_info(dev, "Low battery monitoring support disabled\n"); + return 0; + } + + pval = of_property_read_bool(np, "maxim,low-battery-dac-enable"); + if (pval) { + mask |= MAX77620_CNFGGLBL1_LBDAC_EN; + val |= MAX77620_CNFGGLBL1_LBDAC_EN; + } + + pval = of_property_read_bool(np, "maxim,low-battery-dac-disable"); + if (pval) + mask |= MAX77620_CNFGGLBL1_LBDAC_EN; + + pval = of_property_read_bool(np, "maxim,low-battery-shutdown-enable"); + if (pval) { + mask |= MAX77620_CNFGGLBL1_MPPLD; + val |= MAX77620_CNFGGLBL1_MPPLD; + } + + pval = of_property_read_bool(np, "maxim,low-battery-shutdown-disable"); + if (pval) + mask |= MAX77620_CNFGGLBL1_MPPLD; + + pval = of_property_read_bool(np, "maxim,low-battery-reset-enable"); + if (pval) { + mask |= MAX77620_CNFGGLBL1_LBRSTEN; + val |= MAX77620_CNFGGLBL1_LBRSTEN; + } + + pval = of_property_read_bool(np, "maxim,low-battery-reset-disable"); + if (pval) + mask |= MAX77620_CNFGGLBL1_LBRSTEN; + + ret = regmap_update_bits(chip->rmap, MAX77620_REG_CNFGGLBL1, mask, val); + if (ret < 0) + dev_err(dev, "Reg CNFGGLBL1 update failed: %d\n", ret); + return ret; +} + static int max77620_read_es_version(struct max77620_chip *chip) { unsigned int val; @@ -563,7 +614,11 @@ static int max77620_probe(struct i2c_client *client, if (ret < 0) return ret; - ret = devm_mfd_add_devices(chip->dev, PLATFORM_DEVID_NONE, + ret = max77620_init_low_battery_monitor(chip); + if (ret < 0) + return ret; + + ret = devm_mfd_add_devices(chip->dev, PLATFORM_DEVID_NONE, mfd_cells, n_mfd_cells, NULL, 0, regmap_irq_get_domain(chip->top_irq_data)); if (ret < 0) {